RU2447487C2 - Method for developing machine instructions sequence of computer - Google Patents

Abstract

FIELD: information technology.

SUBSTANCE: method includes the following: building sequence of machine instructions executed by graphical scheme, consisting of at least forms representing memory cells combinations where each combination has one or more interpretations in processor unit which processes them in groups of one or more cells in finite number of combinations, where graphic forms representing combinations of cells are graphically distinguished according to graphical syntax in which each form has its own appropriate interpretation of cells combination in processor unit, where in the process of machine instructions building, processor module and machine instruction version is determined in accord with interpretation of combination of determined by type graphical form representing cells combination.

EFFECT: automatic testing SW/HW systems.

46 cl, 29 dwg

Description

Field of Technology:

The invention relates to computing systems, information technology and can be used in the process of developing a sequence of commands, determining the orders and methods of operation of computing devices, as well as systems for automatic and automated control of technical objects, technological processes, when controlling and / or monitoring physical processes or phenomena .

The prior art:

The present invention is based on the current level of technology in the field of information technology, computer technology, computing devices, methods of operation of computing devices and methods for determining the order of operation of computing devices.

Not all known methods give effective sequences of commands and rational use of storage spaces, which generally affects the efficiency and speed of solving a computing device problems for which it is used.

The basis of computing devices is an architecture consisting of two types of devices, namely processors and storage devices (memory). Storage devices consist of bit cells, each of which, as a rule, can have two states. The states, depending on the type of cells, are the levels of the signal of electric current, electric charge, level of magnetization or retroreflectivity, respectively, of a high or low level. The processor has registers - internal, high-speed memory, the states of which the processor can change according to certain logic in accordance with the set of instructions available in the arsenal of this processor. The loading and unloading of values from and to the memory is the transfer of states from the corresponding memory cells to the registers and vice versa. Computer operation is reduced to the processor reading the sequence of instructions from the memory of the storage devices and to the processor executing these instructions, which are loading from the memory into the registers, operations on the registers to change the states in them and unloading new values from the registers into the memory cells, as well as directly changing cells of storage devices in accordance with the current machine command and the states of cells and registers. Moreover, the registers are also storage devices.

For one command, the processor can operate with bit memory cells, processing them in groups in a finite number of combinations. Usually this is due to the number of cells that make up the processor registers and the processor instruction system defined during processor design.

A set of operations that can be performed by a processor with registers suggests that the set of states of register cells is treated in a certain way. A processor may have several sets of operations, with each set of operations interpreting register values in a specific way. In some cases, the set of operations for certain interpretations is implemented by a separate module in the processor - a command block or a coprocessor. Thus, each combination of cells can have one or more interpretations. For each interpretation of each combination, the logic diagram of the processor device determines: over which registers, which processor modules and what operations are performed. That is, the interpretation determines: the set of states that a given set of cells can take, the registers used, the set of operations, the processor module used, which can be applied to the sets, and the way to implement the storage of values and execution of operations.

Using computer technology, it is possible to remove and form signals of various physical quantities through parametrically proportional electrical signals. The conversion of quantities characterizing physical (including electrical) processes into electrical and vice versa is carried out using physical-electrical and electrical-physical converters of various designs, in particular current or voltage amplifiers, electric motors, generators, heaters, emitters, sensors of physical quantities and etc.

To capture and generate electrical signals and present them in the form of states of memory cells, DACs (digital-to-analog converters) and ADCs (analog-to-digital converters) are used.

The order of operation of computing devices, that is, the order of changing the states of bit storage devices, is determined by the sequence of commands.

The main problems in this area are the determination of the sequence of instructions of computing devices, the high complexity and low visibility and the duration of the development of sequences of instructions of computing systems, the high likelihood of errors, the low quality and insecure operation of automated systems with traditional methods of developing sequences of instructions of computing devices.

Analogs:

There is a way to develop a sequence of machine instructions and change the states of memory cells of a computing machine, based on the direct change in the state of memory devices (for example, punched cards, punched tape, jumpers from leashes, adhesions, slots, mechanical disk and drum devices). The processor reads a sequence of commands, for example, perforated, on the map through the holes punched in it and executes the sequence thus read [1].

Disadvantages:

- Almost not used at present, due to the incredible complexity and low efficiency.

The closest way to develop a sequence of machine instructions and change the state of the cells of memory devices of a computer is to obtain sequences of instructions by typing on a symbol input device (keyboard) while displaying on the screen and storing in the computer memory text in a programming language with subsequent compilation by the computer of the typed text into sequence of machine instructions. The programming language contains a syntax that allows you to reserve sets of cells and indicate the processor’s interpretation of the sets of cells whose state will be changed by the processor as the resulting sequence is executed, in addition, the text programming language contains a set of symbolic operations corresponding to the set of operations available for the processor, as well as additional operations , the equivalent action of which can be obtained as a result of processor actions by a combination of op eration [2] is a prototype.

It should be noted that the text programming language used in the prototype has structuring syntactic tools that allow describing structured collections of combinations of memory cells, the most common combinations of cell combinations for more efficient computing devices are executed in the form of processor registers, in addition, the arsenal of processor instructions is supplemented by instruction sets batch processing of such registers.

The sequence of commands can be developed with the processor interpreting the sets of cells, or with the construction of structured sets of cells, both features of the prototype can be used independently or jointly.

Disadvantages:

The method is associated with working with text, which in itself is significantly laborious, and the text obtained as a result of the development, in comparison with graphic schematic structures, for example, flowcharts, does not have sufficient visibility.

The aim of the invention is:

1) reduction of the development time of sequences of machine instructions of computing devices;

2) improving the quality of developed software and hardware-software systems;

3) improving the perception and increasing the visibility of software interfaces and graphic programs, and reducing the load of text information;

4) reducing the likelihood of errors during software development;

5) increasing the efficiency of the development process by automating the development and automation of the integration of software subsystems and computer-controlled devices;

6) facilitation of integration with existing systems, reintegration and transition to other platforms;

7) automation testing of hardware and software systems;

8) reducing the number of elements and simplifying the hardware implementation of electronic devices.

These goals are achieved by the fact that in the well-known technical solution based on the use of machine-implemented construction of a sequence of machine instructions from the sequence of actions indicated by the machine by a person in the process of interactive interaction, in which according to the invention, the construction of a sequence of machine instructions is performed according to a graphic diagram, at least consisting of figures representing combinations of cells, each combination having one or more interpretations in the processor that is processing and their groups of one or more cells in a finite number of combinations, moreover, graphic figures representing combinations of cells are graphically distinguished according to the graphic syntax according to which each figure has its own interpretation of the combination of cells in the processor, where the processor module and variant are determined during the construction of machine instructions machine command in accordance with the interpretation of the combination, determined by the type of graphic figure representing a combination of cells.

The construction of a sequence of commands consists of the stages of interactive development and construction of a circuit on a computer, by placing the mentioned figures representing combinations of cells and operation symbols in at least part of a subset of the operations included in the processor arsenal in the virtual workspace, and the stage at which the connecting lines between figures and operations, and the stage at which the process of constructing machine instructions is started, in which a sequence of machine Mand. Each interpretation by the processor of cell combinations corresponds to figures of a certain type, which allows, without using alphanumeric characters, and using only the manipulation input tool (mouse, touch screen, etc.), at the stage of creation and placement, specify the interpretation of the combination of cells by determining the figure, representing a combination of cells, and the development machine at the stage of constructing machine instructions allows you to determine the processor module and the machine command option in accordance with the interpretation of the combination, determined by the type of graphic A shape representing a combination of cells. It should be noted that the method does not require the visualization tools and operating systems to display the characters of the natural alphabet and does not depend on the presence of fonts containing the characters of the natural alphabet, it does not require the visualization tool to display colors or shades of the same color, and also does not require the means symbol input, only monochrome means of dynamic visualization and manipulation input tools (mouse, touch screen, etc.) are enough.

The second option to achieve these goals is a method of developing a sequence of machine instructions based on the use of a machine-implemented construction of a sequence of machine instructions from the sequence of actions indicated by a person to a machine in an interactive process, in which according to the invention, the construction of a sequence of machine instructions is performed according to a graphic diagram, at least consisting from figures representing a combination of cell combinations, where each combination of cells, in its a series is a combination of cell combinations, like nesting dolls that interactively detail, moreover, interactive detailing is reduced to a computer-implemented interactive representation of shapes, so that in response to user actions, a shape is interactively converted to a detailed view that displays cell combinations embedded in a combination of cell combinations, represented also in the form of figures corresponding to nested populations or combinations of populations that are part of the original aggregating payback of cell combinations, in this case, interactively constructing communication lines from or to any of the nested figures representing nested cell combinations or a combination of cell combinations with any degree of nesting, to any degree of detail, and accordingly, at the stage of constructing machine instructions, the circuits construct a sequence of commands for transfer and exchange of cell states individually with any of the cell combinations nested in the aggregate, with any degree of nesting, in any degree of detail.

In other words, this is an interactive-visual way of forming structured sets of memory cells and obtaining sequences of machine access commands to them. The structural graphical syntax proposed in the invention replaces elements accepted in textual programming languages, such as data structures, bit fields, and enumerations, and as selectors, fields that are indicated by a dot or arrow in textual programming languages used in the prototype to access individually nested elements, the invention provides interactive detailing.

The construction of a sequence of commands in the present invention consists of the steps of interactively constructing a circuit on a computer by placing the mentioned aggregating figures in a virtual workspace representing sets of combinations of cells and operation symbols of at least a part of a subset of operations included in the processor arsenal, the stage at which produce interactive detailing, and the stage at which the connecting lines between the figures and operations are drawn, and the stage at which the construction process is started the evolution of machine instructions, on which a sequence of machine instructions is generated according to the constructed scheme. At the same time, at the stage of connecting lines, it is possible to interactively build a communication line from or to any combination of cells nested in the aggregate set of cells represented by figures, due to which the technical goal of constructing a sequence of commands for transmitting and exchanging cell states is achieved at the stage of constructing machine instructions according to the scheme individually with any of the nested combinations of cells, with any degree of nesting. In the proposed solution, in the framework of the method of obtaining sequences of commands, structured populations are represented in a broader sense by means of granularity, which is achieved by constructing a sequence of commands for changing nested populations of cells that can be accessed elementwise due to the fact that aggregate populations can be expanded, with the degree of detail required by the developer, including subatomic, that is, to bits and enumeration elements.

It should be noted that the method does not require the visualization tools and operating systems to display the characters of the natural alphabet and does not depend on the presence of fonts containing the characters of the natural alphabet, it does not require the visualization tool to display colors or shades of the same color, and also does not require the means character input. For the implementation of the invention, only monochrome means of dynamic visualization and means of manipulation input (mouse, touch screen, etc.) are sufficient.

Differences of the proposed solution from the prototype under consideration:

The first difference is the use of a graphic input device (mouse, touch screen, etc.) instead of a character input device (keyboard), that is, it can be implemented even on phones, communicators or personal digital assistants.

The second difference is the use of graphic (instead of text) syntax to indicate how the processor interprets cell combinations, while in the process of interactive interaction with the machine, it is sufficient to use the graphic input means, and the method does not require the visualization tools and operating systems to display the characters of the natural alphabet and does not depend on the presence in them of fonts of the natural alphabet, that is, it can be implemented even on devices with a monochrome tool and even specialized s that support the proposed graphical syntax of segment indicators, as well as on phones, communicators or personal digital assistants.

The third difference is that the sequence of machine instructions is determined not in accordance with the sequence of operators taking into account the priority, but firstly, taking into account the directional lines of communication indicating the direction and connection of cells and operations with them, and secondly, taking into account that the considered cell sets, the value of which must be changed using the values of other cells, will not be changed before all the changes of all other cells are used, the values of which are used to determine the states considered sets of cells.

The proposed solutions in particular cases of execution or when interacting with other technologies may require a wider arsenal of tools, such as a keyboard, color display, the ability to display the characters of the natural alphabet, DAC, ADC, amplifiers, converters of electrical energy to other types of energy and vice versa.

A private embodiment of the element of the second embodiment of achieving the above objectives (the second variant of the method) is the proposed method, in which according to the invention there are interactive user scroll elements, or arrow elements of reduction-increase, and an additional step, whereby these user elements are removed or added to the area visibility representations of nested cell sets.

A private embodiment of an element of the second embodiment of achieving these goals (the second embodiment of the method) is the proposed method in which, according to the invention, cell combinations are groups of one or more cells in a finite number of combinations that can be processed by the processor in one operation.

A private embodiment of an element of the second embodiment of achieving the above objectives (the second embodiment of the method) is the proposed method, in which according to the invention cell combinations are cell combinations, where each population consists of cell combinations and / or cell combinations.

A private embodiment of the element of the second variant of achieving these goals (the second variant of the method) is the proposed method, in which according to the invention a figure corresponding to a set of cells in a detailed view is presented as interactively increased in size at the time of detailing and inside it displays figures corresponding to nested sets of cells included in this population.

A private embodiment of the element of the second embodiment of achieving these goals (the second variant of the method) is the proposed method, in which according to the invention, a figure corresponding to a set of cells in a detailed view is presented as interactively acquiring an additional field at the time of detailing and inside the additional field, figures corresponding to nested collections are displayed cells included in this population.

In addition, for both proposed methods for achieving these goals, a number of options for private performances are proposed.

Both variants of the method have identical elements.

A particular embodiment of the first variant of the method is the proposed method, in which according to the invention, operation symbols from a plurality of operations for changing the state of memory cells included in the processor arsenal or available for implementation on the processor are added to the circuit, and connecting lines are drawn between the operation symbols and figures representing cell combinations.

A particular embodiment of the second variant of the method is the proposed method, in which according to the invention, operation symbols from a plurality of operations for changing the state of memory cells included in the processor arsenal or available for implementation on the processor are added to the circuit, and connecting lines are drawn between the operation symbols and figures representing cell combinations.

A particular embodiment of the first variant of the method is the proposed method, in which according to the invention a sequence of machine instructions during execution changes the state of the cells of memory devices, including input and / or output registers of the DAC and / or ADC.

A private execution of the second variant of the method is the proposed method, in which according to the invention a sequence of machine instructions during execution changes the state of the cells of memory devices, including input and / or output registers of the DAC and / or ADC.

A particular embodiment of the first variant of the method is the proposed method, in which according to the invention, the input and / or output voltage levels of the DAC and / or ADC control and / or monitor connected physical-electrical or electrical-physical converters, whereby they solve the problems of analysis and control of physical processes and phenomena, in particular process control.

A particular embodiment of the second variant of the method is the proposed method, in which according to the invention, the input and / or output voltage levels of the DAC and / or ADC control and / or monitor connected physical-electrical or electrical-physical converters, whereby they solve the problems of analysis and control of physical processes and phenomena, in particular process control.

A particular embodiment of the first variant of the method is the proposed method, with the possibility of constructing subsystems, in which according to the invention, when interactively constructing a circuit, a subsystem is placed in the circuit, that is, a sequence of machine instructions presented in the form of an aggregating figure, where the figure aggregates the interface of the subsystem in the form of a set of ports, This exchange of information with the subsystem is carried out through the ports, which are a set of pins, each of which is a collection of memory cells, set and the change of states subsystem is performed for one inseparable from the standpoint of other subsystems, the action, the ports interactively visualized in the form of figures, and the pins interactively visualized using said graphical syntax, thus interactively carried out trunks pins with other circuit elements.

A particular embodiment of the second variant of the method is the proposed method, with the possibility of constructing subsystems, in which according to the invention, when interactively constructing the circuit, a subsystem is placed in the circuit, that is, a sequence of machine instructions presented in the form of an aggregating figure, where the figure aggregates the interface of the subsystem in the form of a set of ports, This exchange of information with the subsystem is carried out through the ports, which are a set of pins, each of which is a collection of memory cells, set and the change of states subsystem is performed for one inseparable from the standpoint of other subsystems, the action, the ports interactively visualized in the form of figures, and the pins interactively visualized using said graphical syntax, thus interactively carried out trunks pins with other circuit elements.

A particular embodiment of the first variant of the method is the proposed method with the possibility of building subsystems, in which according to the invention the sequence of commands for the subsystem is determined by additional steps, on each of which a circuit for each port is built on separate workspaces, and for the circuit of each port it is made available and displayed in the form figures of the set of cells of storage devices intended for the exchange of states with the subsystem through the corresponding port, and the set of cells, which are the fields of the subsystem, that is, cells whose states determine the state of the subsystem.

A particular embodiment of the second variant of the method is the proposed method with the possibility of building subsystems, in which according to the invention the sequence of commands for the subsystem is determined by additional steps, on each of which a circuit for each port is built on separate workspaces, and for the circuit of each port it is made available and displayed in the form figures of the set of cells of storage devices intended for the exchange of states with the subsystem through the corresponding port, and the set of cells, which are the fields of the subsystem, that is, cells whose states determine the state of the subsystem.

A particular embodiment of the first variant of the method is the proposed method with the possibility of building subsystems, in which according to the invention object-oriented analysis and object-oriented design are used, the class being interactively visualized in the aforementioned manner as a subsystem with the class interface, which is interactively visualized as ports using the proposed graphical notation, and each function-method, presented in this case as a port, is implemented in the form of a figure with associated It figures that represent the parameters of this function method.

A particular embodiment of the second variant of the method is the proposed method with the possibility of building subsystems, in which according to the invention object-oriented analysis and object-oriented design are used, the class being interactively visualized in the aforementioned manner as a subsystem with the class interface, which is interactively visualized as ports using the proposed graphical notation, and each function-method, presented in this case as a port, is implemented in the form of a figure with associated It figures that represent the parameters of this function method.

A particular embodiment of the first variant of the method is the proposed method with the possibility of constructing subsystems, in which according to the invention at least one subsystem together with a description of its interface is obtained automatically using reverse engineering of sequences of machine instructions or source texts.

A particular embodiment of the second variant of the method is the proposed method with the possibility of building subsystems, in which according to the invention at least one subsystem together with a description of its interface is obtained automatically using reverse engineering of sequences of machine instructions or source texts.

A particular embodiment of the first variant of the method is the proposed method with the possibility of building subsystems, in which according to the invention the construction of part of the resulting sequence of machine instructions is obtained by adding to the circuit a subsystem whose sequence of machine instructions is obtained by compiling the program text in a text programming language obtained from at least one from four sources, namely text typed by means of a character input device, text stored on m asynchronously readable medium, text obtained as a result of compilation of the circuit proposed in the invention, text obtained as a result of compilation of state diagrams of state machines.

A particular embodiment of the second variant of the method is the proposed method with the possibility of building subsystems, in which according to the invention the construction of part of the resulting sequence of machine instructions is obtained by adding to the circuit a subsystem whose sequence of machine instructions is obtained by compiling the program text in a text programming language obtained from at least one from four sources, namely text typed by means of a character input device, text stored on m asynchronously readable medium, text obtained as a result of compilation of the circuit proposed in the invention, text obtained as a result of compilation of state diagrams of state machines.

A particular embodiment of the first variant of the method is the proposed method with the possibility of building subsystems, in which according to the invention a part of the sequence of machine instructions is obtained by compiling an automaton diagram with a finite number of states, which is interactively constructed in the editor of state diagrams of finite automata, so that input events affecting on the state of finite state machines, and the output effects of finite state machines are represented as a subsystem interface, and as a result of compilation And such a state machine diagram of state machines generate a sequence of machine instructions such that instead of or along with the traditional approach of calling an external procedure, the output processor of finite state machines generates a sequence of commands that stores the output actions of state machines in memory cells with which the corresponding interface port pins of this subsystem are associated with based on the state diagram of finite state machines, which ensures the interaction of subsystems of this type with other odsistemami.

A particular embodiment of the second variant of the method is the proposed method with the possibility of constructing subsystems, in which according to the invention a part of the sequence of machine instructions is obtained by compiling an automaton diagram with a finite number of states, which is interactively constructed in the editor of state diagrams of finite automata, so that input events affecting on the state of finite state machines, and the output effects of finite state machines are represented as a subsystem interface, and as a result of compilation And such a state machine diagram of state machines generate a sequence of machine instructions such that instead of or along with the traditional approach of calling an external procedure, the output processor of finite state machines generates a sequence of commands that stores the output actions of state machines in memory cells with which the corresponding interface port pins of this subsystem are associated with based on the state diagram of finite state machines, which ensures the interaction of subsystems of this type with other odsistemami.

A particular embodiment of the first variant of the method is the proposed method, in which according to the invention each of the figures representing a combination of cells or an operation symbol is complemented by a figure-connector that visually differs in such a way that it makes it possible to distinguish the purpose of the cells corresponding to the reading and / or writing, due to which provides visual and actual determination of the direction of transmission of signals characterizing the state of the cells.

A particular embodiment of the second variant of the method is the proposed method, in which according to the invention each of the figures representing a combination of cells or an operation symbol is complemented by a figure-connector that visually differs in such a way that it makes it possible to distinguish the purpose of the cells corresponding to the reading and / or writing, due to which provides visual and actual determination of the direction of transmission of signals characterizing the state of the cells.

A particular embodiment of the first variant of the method is the proposed method with connectors, in which according to the invention the connector is visually displayed as a figure that is part of a line, while at the same time associatively resembling a connector, and in the diagram, which is the place from where and where the connecting lines can be drawn, which symbolize the fact of the connection to the given source or receiver of the connection, and the connecting lines between the operation symbols and the figures representing sets of cells and being receivers or sources, carried out from connectors and into connectors.

A particular embodiment of the second variant of the method is the proposed method with connectors, in which according to the invention the connector is visually displayed as a figure that is part of a line, while at the same time associatively resembling a connector, and in the diagram, which is the place from where and where the connecting lines can be drawn, which symbolize the fact of the connection to the given source or receiver of the connection, and the connecting lines between the operation symbols and the figures representing sets of cells and being receivers or sources, carried out from connectors and into connectors.

A particular embodiment of the first variant of the method is the proposed method, in which according to the invention, the connection lines are used in the circuit, which are directed branched connecting lines, with the origin coming from one source, that is, a combination of cells or the result of the operation, and one or more branches, each of which reaches the target receiver, which is a combination of cells or the input of the operation.

A particular embodiment of the second variant of the method is the proposed method, in which according to the invention, the connection lines are used in the circuit, which are directed branched connecting lines with the origin coming from one source, that is, a combination of cells or the result of the operation, and one or more branches, each of which reaches the target receiver, which is a combination of cells or the input of the operation.

A particular embodiment of the first variant of the method is the proposed method, in which, according to the invention, a part of the machine instructions being developed provides access to the states or device control on the field bus, the device interface being represented by the proposed graphic syntax and based on the device description according to the object field dictionary or according to the specification protocol or based on data from a self-documenting dynamic binding interface.

A particular embodiment of the second variant of the method is the proposed method, in which, according to the invention, part of the machine instructions being developed provides access to the states or device control on the field bus, the device interface being represented by the proposed graphic syntax and based on the device description according to the object field dictionary or according to the specification protocol or based on data from a self-documenting dynamic binding interface.

By a private execution of the first variant of the method, the proposed method, in which, according to the invention, part of the developed machine instructions provide access to information storage systems through a database management system, using a computer-aided design system of databases and / or data access systems, based on notation of the information methodology database modeling, in which to designate at least part of the sets of cells whose state changes and state transfers are usual construction machine instruction sequences, using the proposed graphical syntax.

A particular embodiment of the second variant of the method is the proposed method, in which, according to the invention, part of the developed machine instructions provide access to information storage systems through a database management system, using a computer-aided design system of databases and / or data access systems, based on methodology notation information modeling of databases, in which to designate at least part of the sets of cells whose state changes and state transfer cat ryh produced construction machine instruction sequences, using the proposed graphical syntax.

A particular embodiment of the first variant of the method is the proposed method, in which, according to the invention, an additional step is carried out, in which the resulting sequence of commands is executed for execution in debug mode, while the virtual workspace is displayed with a diagram corresponding to the sequence of commands executed at the corresponding moment.

A particular embodiment of the first variant of the method is the proposed method, in which, according to the invention, an additional step is carried out, in which the resulting sequence of commands is executed for execution in debug mode, while the virtual workspace is displayed with a diagram corresponding to the sequence of commands executed at the corresponding moment.

A particular embodiment of the first variant of the method is the proposed variant of the method with the possibility of debugging, in which according to the invention the status of the combinations of cells of the storage devices is visualized on the screen.

A particular embodiment of the second variant of the method is the proposed variant of the method with the possibility of debugging, in which according to the invention the status of the combinations of cells of the storage devices is visualized on the screen.

A particular embodiment of the first variant of the method is the proposed variant of the method with debugging, in which according to the invention for analyzing the sequence of commands during debugging, some of the connecting lines are highlighted, on the basis of which the lines are distinguished, which correspond to the currently executing machine command, which have already been executed to date and which are yet to be fulfilled.

A particular embodiment of the second variant of the method is the proposed variant of the method with debugging, in which according to the invention for analyzing the sequence of commands during debugging, some of the connecting lines are highlighted, on the basis of which the lines are distinguished, which correspond to the currently executing machine command, which are already executed to date and which are yet to be fulfilled.

A particular embodiment of the first variant of the method is the proposed variant of the method with debugging, in which according to the invention for analyzing the sequence of commands during debugging, the symbol of the operation currently being performed is highlighted, on the basis of which the operations that correspond to the currently executing machine command, which are already executed, are distinguished to date and which are yet to be executed.

A particular embodiment of the second variant of the method is the proposed variant of the method with debugging, in which according to the invention for analyzing the sequence of commands during debugging, the symbol of the operation currently being performed is highlighted, on the basis of which the operations that correspond to the currently executing machine command, which are already executed, are distinguished to date and which are yet to be executed.

The third solution to the tasks is a way to develop a sequence of machine instructions or change the state of the cells of memory devices of a computer, based on the use of a computer-implemented construction of a sequence of machine instructions from the sequence of actions indicated by the person in the process of interactive interaction, in which according to the invention the sequence of machine instructions is constructed using graphic diagram, at least consisting of figures, pre representing combinations of cells, each combination having one or more interpretations in the processor, which processes them in groups of one or more cells in a finite number of combinations, and graphic figures representing combinations of cells are graphically distinguished according to the graphic syntax according to which each figure has its own interpretation cell combinations in the processor, where in the process of constructing machine instructions, the processor module and the machine command variant are determined in accordance with the interpretation of the combination determined by the type a graphic figure representing a combination of cells, in this case, aggregating figures are used, representing sets of combinations of cells, where each combination of cells, in turn, is a set of combinations of cells that interactively detail where the interactive detail is reduced to a computer-implemented interactive representation of the figures, so that response to user actions, the figure is interactively converted to a detailed view that displays cell combinations nested in a combination of cells k, also represented in the form of figures corresponding to nested sets or combinations of sets included in the source aggregating set of cell combinations, while it is possible to interactively construct a communication line from or to any of the nested figures representing nested combinations of cells or a set of combinations of cells with any degree nesting, in any degree of detail, and accordingly, at the stage of constructing machine instructions, circuits construct a sequence of instructions To transfer and exchange states separately cells with any of a nested set of combinations of cells, with any degree of nesting, any degree of detail.

As an example, we consider the following implementation option of the proposed technical solution. A technical system consisting of a standard computer, including a monitor and keyboard, additionally equipped with a mouse, and software, consisting of a standard graphic operating system that supports the aforementioned input-output devices, and a special software system that implements interactive interaction with the user.

In this example, the system displays dashboards on the screen, one of which contains a set of buttons representing a set of operations, including a part of operations from a subset of an operation included in the arsenal of the target processor, and another dashboard includes buttons with graphic images representing cell sets storage devices. In the particular case, each figure (button), in accordance with the graphic syntax, determines the interpretation by the processor of the corresponding sets of cells. The system organizes an interactive response in response to user input by moving copies of figures on the screen from dashboards to the workspace, and moving the figures around the workspace in accordance with the user's intention. In addition, the system provides the ability to organize connections of figures arranged in the working field, which are a set of cells and operations by connecting lines, resulting in such interactive actions of the exchange circuit and change the state of the cells. The resulting scheme compiles and generates a sequence of machine instructions using the compiler. The compiler’s actions are reduced to determining the sequence of operations on the cells, in accordance with the scheme, based on the condition for reading the state of the cell after all operations that lead to a change in the state of this cell are performed.

The current version of the graphical syntax is represented by several figures:

figure 1 is a graphical syntax subatomic data element pseudo-type bits;

figure 2 is a graphical syntax of a subatomic data element of the pseudotype of a named enumeration element;

figure 3 is a graphical syntax of a data element of a real type (a colon and a name of an equivalent type for the language "C" are not required elements);

figure 4 - detail in the position of "abstracted" ("minimized");

figure 5 - detail in the position "detailed" ("deployed");

figure 6 is a graphical syntax of an unsigned integer type data element (a colon and a name of an equivalent type for the language "C" are not required elements);

figure 7 is a graphical syntax of an integer type data element with a sign (a colon and a name of an equivalent type for the language "C" are not required elements);

figure 8 is a graphical syntax of an enumerated data element;

figure 9 is a graphical syntax of a data element of a structured type;

figure 10 is a detailed graphical syntax of data of an integer type (a colon and a name of the equivalent type for the language "C" are not required elements);

figure 11 is a detailed graphical syntax of the data of the enumerated type;

figure 12 is a graphical syntax of the array;

figure 13 is a detailed graphical syntax of data of a structured type;

figure 14 is a graphical syntax of a generalized, implementation-dependent text string (in this case, a refinement of the type to the right of the colon shows an implementation for a string included in the standard C ++ library);

figure 15 is the graphic syntax of a text string in languages where the strings are represented as in Pascal, using a two-byte counter of the number of characters at the beginning of the string data (a colon and a name of the equivalent type for language "C" are not required elements);

figure 16 is a graphical syntax of the so-called null-terminated text string in such languages, where the strings are represented as in the language "C" or some operating systems, where the end of line is a character with a zero code (a colon and a name equivalent to the language "C" type are not required elements);

figure 17 is a graphical syntax of a data element that is a pointer to a memory region containing an unsigned integer type data element, and the proposed syntax should be used to indicate the data type of the element referenced by the pointer, and to indicate a pointer to a pointer to a data element, use accordingly, two or more arrow-like syntax elements in the upper right corner of the element (a colon and a name of the equivalent type for the language "C" are not required elements);

figure 18 is a graphic syntax of a data element of a real type of double precision (a colon and a name of an equivalent type for the language "C" are not required elements);

figure 19 is a graphical syntax of a structured data element called a hash, also known as a "map" or "associated array" (internal elements are displayed similarly to a data element of a structured type);

figure 20 is a graphical syntax of a generalized universal implementation-defined multi-type data element, as a rule, is implemented in the form of a union paired with an enumerated type element that indicates which particular data element of the union and type is used, and therefore the set of valid operations and processing order, in the composition of this element may also include additional data elements (internal elements, from a set of valid ones, are displayed similarly to a data element of a structured type);

figure 21 - connectors in the "not connected" state (constant in this context, data elements do not have input connectors);

figure 22 - connectors in the connected state;

figure 23 - connectors of aggregate types in the "not connected" state (constant in this context, data elements do not have input connectors);

figure 24 - connectors of aggregate types in the state of "connected";

figure 25 is a graphical syntax of elements representing unary operations;

figure 26 is a graphical syntax of elements representing binary operations;

figure 27 is a graphical syntax of elements representing ternary operations;

figure 28 is a comprehensive example describing a holistic system, including some of the expressive syntactic tools included in the arsenal of the proposed graphical syntax;

figure 29 is an example that demonstrates some of the possibilities of graphic typing, this example is a copy of the previous example (Fig. 28), which differs from it only in the absence of optional elements, namely delimiters and text type names, which is achieved without graphic information due to graphic typing (names equivalent for the language "C" type are absent, the processor interpretation is indicated graphically according to the invention), another difference is the use of one bundle of transmission of the aggregate data type together one hundred and two communication lines.

In more detail, in the example we consider the simplest typical task for automated control systems and sufficient to demonstrate the main capabilities of the invention, namely, a subsystem with two input and output ports and an embedded subsystem, the subsystem's task is to obtain data from the input port, transform them by the expression result = ( a + x) (b + x) and transferring the result to the input port of the nested subsystem, and transferring the value of the output port of the nested subsystem directly to the output port of the considered subsystem containing it, where values are stored in the appropriate cells.

The constructed scheme in accordance with the requirements of the task in accordance with the rules of the proposed graphic language is shown in Fig. 28 or identically in Fig. 29. The circuit interface consists of the first and second ports. The pin value of result of the first port is the expression result = (a + x) (b + x). The result pin of the second port is equal to the value obtained from the second port of block1, and since the pin type is a structure, that is, an aggregate type of the type, the communication line is thickened. The data pin of the first port of block1 is a structure, which is shown in an example in a detailed state, each field of which is filled with the value x and the result of the expression of the same expression, the value of which is assigned to the result pin of the first port of the circuit.

The diagram of this example, after interactively building on a machine and starting the process of building machine instructions, leads to the construction of a sequence of commands, which in a generalized form, using machine names with symbolic names in capital letters, can be as follows:

DOWNLOAD port1.x

ADD port1.a

MOVE TO STACK

DOWNLOAD port1.x

ADD port l.b

MULTIPLE VALUE FROM STACK

DOWNLOAD In block1.y

DOWNLOAD port1.x

DOWNLOAD IN block1.x

DOWNLOAD block1.out

DOWN TO port2.result

Thus, the use of the invention leads to the achievement of goals: reducing the time to develop sequences of machine instructions of computing devices; improving the quality of software and hardware systems under development; improving the perception and increasing the visibility of software interfaces and graphic programs, and reducing the load of text information; reducing the likelihood of errors in software development; increasing the efficiency of the development process by automating the development and automation of the integration of software subsystems and computer-controlled devices; facilitation of integration with existing systems, reintegration and transition to other platforms; Testing automation software and hardware systems; reducing the number of elements and simplifying the hardware implementation of electronic devices.

Information sources

1. Donnald E. Knut. The art of programming // St. Petersburg. Williams BBK Publishing House 32.973.26-018.2я75 K53 UDC 681.142.2 (t.1, p.185).

2. Aho Alfred V., Networks Ravi, Ulman Jeffrey D. Compilers: principles, technologies and tools .: Per. from English - M.: Williams Publishing House, 2001. - 768 p.: Ill. - Paral. tit. English (p.25).

Claims (46)

1. A method of developing a sequence of machine instructions of a computing machine, based on the use of a computer-implemented construction of a sequence of machine instructions from the sequence of actions indicated to the machine by a person in the process of interactive interaction, characterized in that the construction of a sequence of machine instructions is performed according to a graphic diagram, at least consisting of figures representing combinations of memory cells, each combination having one or more interpretations in the process an array that processes them in groups of one or more cells in a finite number of combinations; moreover, graphic figures representing combinations of cells are graphically distinguished according to the graphic syntax according to which each figure has its own interpretation of the combination of cells in the processor, where the module is determined in the process of constructing machine instructions processor and a variant of the machine command in accordance with the interpretation of the combination, determined by the type of graphic figure representing the combination of cells. 2. The method according to claim 1, characterized in that the symbols of operations are added to the circuit from a variety of operations to change the states of memory cells included in the processor arsenal or available for implementation on the processor, and connecting lines are drawn between the operation symbols and figures representing combinations cells. 3. The method according to claim 1, characterized in that the sequence of machine instructions during execution changes the state of the cells of the storage devices, including input and / or output registers of the DAC and / or ADC. 4. The method according to claim 3, characterized in that the input and / or output voltage levels of the DAC and / or ADC are controlled and / or monitored by connected physical-electrical or electrical-physical converters, whereby they solve the problems of analysis and control of physical processes and phenomena, in particular process control. 5. The method according to claim 1, characterized in that when interactively constructing the circuit, a subsystem is placed in the circuit, that is, a sequence of machine instructions presented in the form of an aggregating figure, where the figure aggregates the interface of the subsystem in the form of a set of ports, while the information is exchanged with the subsystem through ports, which are a set of pins, each of which is a collection of memory cells, the receipt and change of state of which is carried out by the subsystem in one inextricable, from the point of view of other sub in effect, the ports interactively visualized in the form of figures, and the pins were visualized interactively using said graphical syntax, thus interactively carried pins connecting lines to other circuit elements. 6. The method according to claim 5, characterized in that the sequence of commands for the subsystem is determined by additional steps, on each of which a circuit for each port is built on separate workspaces, moreover, for the circuit of each port is made available and displayed in the form of figures of a set of memory cells designed to exchange states with the subsystem through the corresponding port, and a set of cells that are fields of the subsystem, that is, cells whose states determine the state of the subsystem. 7. The method according to claim 5, characterized in that they use object-oriented analysis and object-oriented design, while the class is interactively visualized in the aforementioned manner as a subsystem with the class interface, which is interactively visualized in the form of ports using the proposed graphical notation, each the function-method, represented in this case as a port, is implemented in the form of a figure with figures connected with it representing the parameters of this function-method. 8. The method according to claim 5, characterized in that at least one subsystem, together with a description of its interface, is obtained automatically using reverse engineering of sequences of machine instructions or source codes. 9. The method according to claim 5, characterized in that the construction of part of the resulting sequence of machine instructions is obtained by adding a subsystem to the circuit, the sequence of machine instructions of which is obtained by compiling the program text in a text programming language obtained from at least one of the four sources, and namely, text typed by means of a symbol input device, text stored on a computer-readable medium, text obtained by compiling the circuit proposed in the invention, text a, obtained by compiling a state diagram of finite automata. 10. The method according to claim 5, characterized in that a part of the sequence of machine instructions is obtained by compiling a state machine diagram with a finite number of states, which is interactively built in the state machine state diagram editor, so that the input events affecting the state of the state machine and the output actions of finite state machines are represented as an interface of a subsystem, and as a result of compilation of such a state diagram of finite state machines, a sequence of machine instructions is generated such that a place, or along with the traditional approach of invoking an external procedure of a finite state machine output action processor, generate a sequence of commands that stores the output actions of state machines in memory cells with which the corresponding interface port pins of this subsystem are associated based on the state machine state diagrams, which ensures the interaction of subsystems of this type with other subsystems. 11. The method according to claim 2, characterized in that each of the figures representing a combination of cells or an operation symbol is supplemented with a connector figure that is visually different so that it can distinguish the purpose of the cells corresponding to the figure in reading and / or writing, thereby providing visual and actual determination of the direction of transmission of signals characterizing the state of the cells. 12. The method according to claim 11, characterized in that the connector is visually displayed as a figure, which is part of the line, at the same time associatively resembling a connector, and in the diagram, which is the place from where and where you can connect the connecting lines, thereby symbolizing the fact of connecting to the given source or receiver of the connection, and the connecting lines between the symbols of operations and figures representing the totality of cells and being receivers or sources are drawn from connectors and into connectors. 13. The method according to claim 1, characterized in that the circuit uses connecting lines, which are directed branched connecting lines, with the beginning coming from one source, that is, a combination of cells or the result of the operation, and one or more branches, each of which reaches the target receiver, which is a combination of cells or the input of an operation. 14. The method according to claim 1, characterized in that part of the developed machine instructions provide access to the states or control of the device on the field bus, moreover, the device interface during development is represented by the proposed graphical syntax and based on the description of the device according to the object dictionary of the field bus or according to the protocol specification or based on data from a self-documenting dynamic binding interface. 15. The method according to claim 1, characterized in that part of the developed machine instructions provide access to information storage systems through a database management system, while using a computer-aided design system for databases and / or data access systems, based on the notation of the information modeling methodology databases, in which to indicate at least part of the sets of cells whose state changes and state transfers of which produce the construction of sequences of machine instructions, use The notation for the proposed graphical syntax is given. 16. The method according to claim 1, characterized in that they carry out an additional step, in which the resulting sequence of commands is executed for execution in debug mode, while the virtual workspace is displayed with a diagram that corresponds to the sequence of commands executed at the corresponding moment. 17. The method according to p. 16, characterized in that they visualize on the screen the status of the combinations of cells of the storage devices. 18. The method according to clause 16, characterized in that to analyze the sequence of commands during debugging, some of the connecting lines are highlighted, on the basis of which lines are distinguished that correspond to the currently executing machine command, which are already executed by now and which will only be executed. 19. The method according to clause 16, characterized in that for analyzing the sequence of commands during debugging, the symbol of the currently executing operation is highlighted, on the basis of which the operations are distinguished, which correspond to the currently executing machine command, which are already executed to date and which will only be executed. 20. A method of developing a sequence of machine instructions of a computing machine, based on the use of a computer-implemented construction of a sequence of machine instructions from the sequence of actions indicated to the machine by a person in the process of interactive interaction, characterized in that the construction of the sequence of machine instructions is performed according to a graphic diagram, at least consisting of figures representing sets of combinations of cells of storage devices, where each combination of cells, in turn, is I am a combination of cell combinations that interactively drill down, and interactive detailing is reduced to a computer-implemented interactive representation of shapes so that, in response to user actions, the shape is interactively converted to a detailed view that displays cell combinations embedded in a combination of cell combinations, also represented as shapes corresponding to nested populations or combinations of populations that are part of the original aggregate population of cell combinations, when m, interactively build communication lines from or to any of the embedded figures representing nested cell combinations or a combination of cell combinations with any degree of nesting, to any degree of detail and, accordingly, at the stage of constructing machine instructions, the circuits construct a sequence of commands for transmitting and exchanging cell states by separately with any of the nested combinations of cells with any degree of nesting, in any degree of detail. 21. The method according to claim 20, characterized in that the set of cells having one or more interpretations in the processor are represented in the form of figures so that they are graphically distinguished according to the graphic syntax according to which each figure has its own interpretation of the set of cells in the processor, where the compilation process determines the processor module and the variant of the machine command in accordance with the interpretation of the combination, determined by the type of graphic figure representing a combination of cells, while detailing said figures for which interpretation in a processor. 22. The method according to claim 20, characterized in that the figure corresponding to the set of cells in a detailed view is represented in the form of a tree, each element of which is a figure corresponding to the set of cells, so that if it has nested sets of cells, it can be similar interactively deployed etc. 23. The method according to claim 20, characterized in that it contains interactive user scroll elements, or arrow keys decrease-increase, and an additional step in which, through said user elements, views of nested cell sets are removed or added to the scope. 24. The method according to claim 20, characterized in that the combinations of cells are represented as groups of one or more cells in a finite number of combinations that can be processed by the processor in one operation. 25. The method according to claim 20, characterized in that the combinations of cells are represented as sets of combinations of cells, where each set consists of combinations of cells and / or sets of combinations of cells. 26. The method according to claim 20, characterized in that the figure corresponding to the set of cells in a detailed view is presented as interactively increased in size at the time of detailing, and inside it, figures corresponding to the nested sets of cells included in this set are displayed. 27. The method according to claim 20, characterized in that the figure corresponding to the set of cells in a detailed view is presented as interactively acquiring an additional field at the time of detailing, and inside the additional field, figures corresponding to the nested sets of cells included in this set are displayed. 28. The method according to claim 20, characterized in that the symbols of the operations are added from the set of operations to change the state of the cells of the storage devices included in the arsenal of the processor or available for implementation on the processor, and connecting lines are drawn between the symbols of operations and figures representing combinations cells. 29. The method according to claim 20, characterized in that the sequence of machine instructions during execution changes the state of the cells of memory devices, including input and / or output registers of the DAC and / or ADC. 30. The method according to clause 29, wherein the input and / or output voltage levels of the DAC and / or ADC are controlled and / or monitored by connected physical-electrical or electrical-physical converters, that is, systems for solving problems, analyzing and controlling physical processes and phenomena, in particular process control. 31. The method according to claim 20, characterized in that during the interactive construction of the circuit, the subsystem is placed in the circuit, that is, the sequence of machine instructions presented in the form of an aggregating figure, where the figure aggregates the interface of the subsystem in the form of a set of ports, while the information is exchanged with the subsystem through ports, which are a set of pins, each of which is a collection of memory cells, the receipt and change of states of which by the subsystem is carried out in one inextricable, from the point of view of other subsystems tems, the action, the ports interactively visualized in the form of figures, and the pins were visualized interactively using said graphical syntax, thus interactively carried pins connecting lines to other circuit elements. 32. The method according to p. 31, characterized in that the sequence of commands for the subsystem is determined by additional steps, on each of which on a separate workspace build a circuit for each port, and for the circuit of each port make available and display in the form of figures the set of memory cells designed to exchange states with the subsystem through the corresponding port, and a set of cells that are fields of the subsystem, that is, cells whose states determine the state of the subsystem. 33. The method according to p. 31, characterized in that they use object-oriented analysis and object-oriented design, while the class is interactively visualized in the aforementioned manner as a subsystem with the class interface, which is interactively visualized in the form of ports using the proposed graphical notation, each the function-method, represented in this case as a port, is implemented in the form of a figure with figures connected with it representing the parameters of this function-method. 34. The method according to p, characterized in that at least one subsystem, together with a description of its interface, is obtained automatically using reverse engineering of sequences of machine instructions or source texts. 35. The method according to p. 31, characterized in that the construction of part of the resulting sequence of machine instructions is obtained by adding a subsystem to the circuit, the sequence of machine instructions of which is obtained by compiling the program text in a text programming language obtained from at least one of four sources namely, the text typed by means of the symbol input device, the text stored on a computer-readable medium, the text obtained by compiling the circuit proposed in the invention, the text a hundred obtained by compiling a state diagram of finite state machines. 36. The method according to p, characterized in that a part of the sequence of machine instructions is obtained by compiling a state machine diagram with a finite number of states, which is interactively built in the state machine state diagram editor, so that input events affecting the state of the state machine and the output actions of finite state machines are represented as an interface of a subsystem, and as a result of compilation of such a state diagram of finite state machines, a sequence of machine instructions is generated such that instead of or along with the traditional approach of calling an external procedure, the output processor of finite state machines generates a sequence of commands that stores the output of finite state machines in memory cells with which the corresponding interface port pins of this subsystem are associated based on the state machine diagram of finite state machines, which ensures the interaction of subsystems of this type with other subsystems. 37. The method according to p. 28, characterized in that each of the figures representing a combination of cells or an operation symbol is supplemented with a connector figure that is visually different so that it can distinguish the purpose of the cells corresponding to the figure for reading and / or writing, thereby providing visual and actual determination of the direction of transmission of signals characterizing the state of the cells. 38. The method according to clause 37, wherein the connector is visually displayed as a figure that is part of the line, at the same time associatively resembling a connector, and in the diagram, which is the place from where and where you can connect the connecting lines, and also symbolize the fact of connection to this connection source or receiver, and connecting lines between operation symbols and figures representing a set of cells and being receivers or sources are drawn from connectors and into connectors. 39. The method according to claim 20, characterized in that the circuit uses connecting lines, which are directed branched connecting lines, with the origin coming from one source, that is, a combination of cells or the result of the operation, and one or more branches, each of which reaches the target receiver, which is a combination of cells or the input of an operation. 40. The method according to claim 20, characterized in that part of the developed machine instructions provide access to the states or control of the device on the field bus, and the device interface during development is represented by the proposed graphic syntax and based on the description of the device according to the object dictionary of the field bus, or according to the specification protocol, or based on data from a self-documenting dynamic binding interface. 41. The method according to claim 20, characterized in that part of the developed machine instructions provides access to information storage systems through a database management system, using a computer-aided design system of databases and / or data access systems based on the notation of the information modeling database methodology data in which to indicate at least part of the sets of cells whose state changes and state transfers of which produce the construction of sequences of machine instructions, using the notation mentioned in the proposed graphical syntax. 42. The method according to claim 20, characterized in that they carry out an additional step, in which the resulting sequence of commands is executed for execution in debug mode, while the virtual workspace is displayed with a diagram that corresponds to the sequence of commands executed at the corresponding moment. 43. The method according to item 42, wherein the state of the combinations of cells of the storage devices is visualized on the screen. 44. The method according to § 42, characterized in that for analyzing the sequence of commands during debugging, part of the connecting lines are highlighted, on the basis of which lines are distinguished that correspond to the currently executing machine command, which are already executed by now and which will only be executed. 45. The method according to § 42, characterized in that for analyzing the sequence of commands during debugging, the symbol of the currently executing operation is highlighted, on the basis of which operations that correspond to the currently executing machine instruction that are already executed and which are distinguished are distinguished will only be executed. 46. A method of developing a sequence of machine instructions of a computing machine, based on the use of a machine-implemented construction of a sequence of machine instructions from the sequence of actions indicated to the machine by a person in the process of interactive interaction, characterized in that the construction of the sequence of machine instructions is performed according to a graphic diagram, at least consisting of figures representing combinations of memory cells, each combination having one or more interpretations in the process a core that processes them in groups of one or more cells in a finite number of combinations, and graphic figures representing combinations of cells are graphically distinguished according to the graphic syntax according to which each figure has its own interpretation of the combination of cells in the processor, where the processor module is determined during compilation and a variant of the machine command in accordance with the interpretation of the combination, determined by the type of graphic figure representing a combination of cells, while aggregating figures representing sets of cell combinations, where each combination of cells, in turn, is a set of cell combinations that interactively drill down, where interactive detailing is reduced to a computer-implemented interactive representation of shapes so that in response to user actions, the shape is interactively converted to a detailed view that displays cell combinations nested in a combination of cell combinations, also represented in the form of figures corresponding to nested populations or combinations of populations, in of the combinations of cells that are part of the initial aggregating aggregate, while interactively constructing communication lines from or to any of the nested figures representing nested cell combinations or a combination of cell combinations with any degree of nesting, to any degree of granularity, and, accordingly, at the stage of constructing machine circuit instructions construct a sequence of commands for transmitting and exchanging cell states individually with any of the cell combinations nested in the aggregate, with any degree of nested spine, in any degree of detail.

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