KR960032423A

KR960032423A - Digital signal playback equipment

Info

Publication number: KR960032423A
Application number: KR1019950001932A
Authority: KR
Inventors: 김규진
Original assignee: 구자홍; Lg 전자 주식회사
Priority date: 1995-02-03
Filing date: 1995-02-03
Publication date: 1996-09-17

Abstract

본 발명은 디지털 신호 재생장치에 관한 것으로, 입력되는 신호를 증폭시키기 위한 증폭부와, 상기 증폭부를 통해 입력된 신호의 펄스폴을 조절하기 위한 등화부와, 상기 증폭부를 통해 증폭된 신호의 클럭성분을 복원하기 위한 피엘엘과, 상기 피엘엘로부터 출력되는 신호를 분주 및 위상조절하기 위한 클럭분주 및 위상조정부와, 상기 동화부로부터 출력되는 신호를 기준 레벨에 따라 3영역으로 분리하기 위한 레벨분리부와, 상기 레벨분리부의 출력을 논리연산하기 위한 논리연산부와, 상기 클럭분주 및 위상 조정부와 논리연산부의 출력을 입력으로 하여 에러를 검출하기 위한 에러검출부와, 상기 에러검출부의 출력을 평활하기 위한 필터부와, 상기 필터부의 출력을 초기값과 가산하여 제어신호에 따라 상기 등화부로 출력함으로써 등화부의 계수값을 조절하기 위한 홀더를 포함하여 구성되며, 상기 레벨분리부를 통해 등화출력신호를 레벨분리하고 이를 피엘엘을 통한 클럭신호와 비교, 에러값을 검출하여 에러값에 따라 등화부의 계수를 조절하도록 함으로써 하드웨어를 간단히 할 수 있는 효과가 있다.The present invention relates to a digital signal reproducing apparatus, comprising: an amplifier for amplifying an input signal, an equalizer for adjusting a pulse pole of a signal input through the amplifier, and a clock component of the signal amplified by the amplifier. PEL for restoring the PLL, a clock divider and phase adjuster for dividing and phase adjusting the signal output from the PEL, and a level separator for separating the signal output from the moving part into three regions according to the reference level. A logic operation unit for logic operation of the output of the level separator, an error detection unit for detecting an error by inputting the outputs of the clock division and phase adjustment unit and the logic operation unit, and a filter for smoothing the output of the error detection unit A coefficient of the equalizing unit by adding an output of the filter unit and an initial value to the equalizing unit according to a control signal. It is configured to include a holder for adjusting the hardware level by separating the equalization output signal through the level separating unit and the clock signal through the PEL, by detecting the error value by adjusting the coefficient of the equalizer according to the error value hardware The effect is to simplify.

Description

Digital signal playback device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제3도는 본 발명에 의한 디지털 신호 재생장치의 구성 블럭도,3 is a block diagram of a digital signal reproducing apparatus according to the present invention;

제4도는 에러검출부의 입출력 상태도,4 is an input / output state diagram of the error detection unit.

제5도는 본 발명에 의한 디지털 신호 재생장치의 각 부 입출력 파형도.5 is a waveform diagram of each sub-input of the digital signal reproducing apparatus according to the present invention.

Claims

An amplifying unit for amplifying an input signal, a moving unit for adjusting a pulse width of a signal input through the amplifying unit, a Piel for restoring a clock component of a signal amplified through the amplifying unit, and a Piel A clock divider and phase adjuster for dividing and phase adjusting a signal output from the video signal, a level divider for separating the signal output from the moving picture into three regions according to a reference level, and a logic operation for outputting the output of the level divider. An error detection unit for detecting an error by inputting a logic operation unit, an output of the clock division and phase adjustment unit and a logic operation unit, a filter unit for smoothing the output of the error detection unit, and an output of the filter unit with an initial value And a holder for adjusting the coefficient value of the moving part by outputting the moving part according to a control signal. Digital signal reproducing apparatus for.

※ Note: The disclosure is based on the initial application.