KR940008386U - High speed data processing circuit - Google Patents

High speed data processing circuit

Info

Publication number
KR940008386U
KR940008386U KR2019920016676U KR920016676U KR940008386U KR 940008386 U KR940008386 U KR 940008386U KR 2019920016676 U KR2019920016676 U KR 2019920016676U KR 920016676 U KR920016676 U KR 920016676U KR 940008386 U KR940008386 U KR 940008386U
Authority
KR
South Korea
Prior art keywords
data processing
high speed
processing circuit
speed data
circuit
Prior art date
Application number
KR2019920016676U
Other languages
Korean (ko)
Other versions
KR950007044Y1 (en
Inventor
배정환
Original Assignee
금성일렉트론 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 금성일렉트론 주식회사 filed Critical 금성일렉트론 주식회사
Priority to KR92016676U priority Critical patent/KR950007044Y1/en
Publication of KR940008386U publication Critical patent/KR940008386U/en
Application granted granted Critical
Publication of KR950007044Y1 publication Critical patent/KR950007044Y1/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0656—Data buffering arrangements
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601—Interfaces specially adapted for storage systems
    • G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/061—Improving I/O performance
    • G06F3/0611—Improving I/O performance in relation to response time

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Human Computer Interaction (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Static Random-Access Memory (AREA)
KR92016676U 1992-09-02 1992-09-02 A circuit for high speed data processing KR950007044Y1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR92016676U KR950007044Y1 (en) 1992-09-02 1992-09-02 A circuit for high speed data processing

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR92016676U KR950007044Y1 (en) 1992-09-02 1992-09-02 A circuit for high speed data processing

Publications (2)

Publication Number Publication Date
KR940008386U true KR940008386U (en) 1994-04-18
KR950007044Y1 KR950007044Y1 (en) 1995-08-24

Family

ID=19339475

Family Applications (1)

Application Number Title Priority Date Filing Date
KR92016676U KR950007044Y1 (en) 1992-09-02 1992-09-02 A circuit for high speed data processing

Country Status (1)

Country Link
KR (1) KR950007044Y1 (en)

Also Published As

Publication number Publication date
KR950007044Y1 (en) 1995-08-24

Similar Documents

Publication Publication Date Title
DE69033042D1 (en) Data processing
DE69325415D1 (en) Data processing device
DE69312009D1 (en) Data processing system
DE69324839D1 (en) Data processing system
DE69321167T2 (en) Data processing system
DE69320915T2 (en) Data processing system
DE68927540D1 (en) Data processing equipment
DE69233282D1 (en) Data processing device
DE68928254T2 (en) Data processing equipment
DE69317200T2 (en) Data processing circuit
DE69331038D1 (en) Data processing unit
DE68925515T2 (en) Data processing equipment
DE69327043T2 (en) DATA PROCESSING DEVICE
KR940008386U (en) High speed data processing circuit
ATA52591A (en) DATA PROCESSING SYSTEM
DE68928011T2 (en) Data processing equipment
KR930003283U (en) Memory data processing circuit
DE69229648D1 (en) Data processing equipment
DE69129670T2 (en) Data processing system
KR940013353U (en) Parallel data comparison circuit
KR930012342U (en) Priority processing circuit
KR930003781U (en) Priority processing circuit
KR940008382U (en) Parallel data interface circuit
SE8802823D0 (en) DATA PROCESSING EQUIPMENT
KR910003149U (en) Word Line High Speed Enable Circuit

Legal Events

Date Code Title Description
A201 Request for examination
E701 Decision to grant or registration of patent right
REGI Registration of establishment
FPAY Annual fee payment

Payment date: 20040719

Year of fee payment: 10

LAPS Lapse due to unpaid annual fee