KR940006304Y1 - Noise preventing circuit of vcr - Google Patents

Abstract

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Description

Noise prevention circuit for VTR multifunction

1 is a circuit diagram of the present invention.

2 is a video signal waveform diagram showing a state in which noise is removed by the present invention.

* Explanation of symbols for main parts of the drawings

5: bias circuit 10: comparator

15: comparator reference voltage setting circuit 20: emitter follower

Q1-Q6: Transistor R1-R11: Resistor

VR1: Variable resistor

The present invention relates to a noise prevention circuit in the multi-function of the VTR to prevent the video noise generated when performing the multi-function operation of the video tape recorder (VTR), and in particular, by the video over-modulation generated by the RF converter during the multi-function mode of the VTR It affects the band to prevent the generation of voice noise.

In general, when performing the picture search and still mode multifunction in the VTR, a noise signal larger than the normal synchronization signal level is generated, and the image and modulation are generated inside the RF converter by the noise signal. When modulation affects the voice band, noise is generated in the voice signal.

That is, if there is a noise signal applied outside the synchronization signal level when performing the VTR multifunction, image and modulation occurs inside the RF converter, which affects the voice band, which causes voice noise during the VTR multifunction. Was.

In view of the above, the present invention relates to a noise prevention circuit for VTR multifunction which prevents voice noise due to video and modulation during multifunction of VTR. In this case, the noise level is cut so that voice noise due to image overmodulation is not generated.

In order to achieve the above object, the present invention provides a bias circuit for matching a video signal with a synchronization signal level, a comparator for removing noise below the synchronization signal level by comparing the synchronization signal level of an input video signal with a set reference voltage, The comparator is provided with a comparator reference voltage setting circuit for setting a reference voltage coinciding with the synchronization signal level, and an emitter follower for buffer-amplifying and outputting the output of the comparator.

Looking at the configuration and effect of the present invention in detail based on the accompanying drawings as follows.

The video signal output from the regeneration circuit of the VTR is passed to the comparator 10 through a bias circuit 5 matching the synchronization signal level, and at the other input side of the comparator 10, the synchronization signal level of the input video signal (bias circuit). The comparator reference voltage setting circuit 15 is connected and configured to apply a reference voltage set to 0.3 V less than the level set by (5).

The video signal from which noise below the synchronization signal level is removed by the comparator 10 is configured to be output as the final video signal through the emitter follower 20.

That is, the video signal is configured to be applied to the base of the transistors Q1 and Q3 constituting the comparator 10 through the bias circuit 5 set at the synchronization signal level by the resistors R1 and R2, and the transistor Q1. The comparator reference voltage setting circuit 15 is configured to apply a reference voltage set 0.3V less than the synchronization signal level to the base of the transistor Q2 in which the emitter and the emitter are in common, and the transistor is disposed on the emitter side of the transistors Q1 and Q2. The collector of Q3 is connected and the emitter of transistor Q3 is grounded via resistor R4.

The output of the comparator 10 is buffered and amplified by the transistor Q6 constituting the emitter follower 20, and then divided and output to the resistors R10 and R11.

At this time, the comparator reference voltage setting circuit 15 is configured to control the bias voltage of the transistor Q4 in the transistor Q5 in which the bias voltage is adjusted by the adjustment of the variable resistor VR1 and the comparator 10 in the transistor Q4. Is set to set the bias reference voltage of the transistor Q2.

That is, the comparator reference voltage setting circuit 15 sets the reference voltage of the comparator 10 to 0.3V lower than the synchronous signal level due to the variable resistor VR1.

In the present invention configured as described above, the video signal reproduced in the playback block of the VTR is applied to the connection point of the resistors R1 and R2 of the bias circuit 5 which sets the input video signal at the same level as the synchronization signal level. The video signal whose synchronization signal level is set in 5) is applied to the comparator 10.

At this time, by adjusting the bias voltage of the transistor Q5 by varying the variable resistor VR1 of the comparator reference voltage setting circuit 15, the bias voltage of the transistor Q4 is adjusted to the base of the transistor Q2 of the comparator 10. The applied reference voltage is set to be 0.3V less than the base voltage Q1B of the transistor Q1 to match the base voltage Q2B = Q1B-0.3V of the transistor Q2.

That is, the comparator reference voltage setting circuit 15 adjusts the variable resistor VR1 to adjust the base voltage Q2B of the transistor Q2 to be 0.3V lower than the base voltage Q1B of the transistor Q1.

If the noise signal included in the video signal signal applied to the base of the transistor Q1 of the comparator 10 is applied at a state lower than the synchronization signal level in this adjusted state (see FIG. The transistor Q1 is " turned off " and the transistor Q2 is " turned on " so that a constant DC voltage appears at the output of the emitter follower 20 of transistor Q6.

At this time, the DC voltage appearing at the output of the emitter follower 20 is Q5B ≒ Q2B (ignoring the base current flowing through the resistors R5, R6, and R9).

Will be determined.

That is, when a noise signal out of sync signal level is applied ( Part) Transistor Q1 is " turned off " and transistor Q2 is " turned on " so that a constant DC voltage is present at the output of emitter follower 20. ) Appears, so the noise noise below the sync signal ( Part) will not appear at the output.

However, when a normal video signal (same as the solid line display in FIG. 2) above the synchronization signal level is applied, the base voltage Q1B of the transistor Q1 by the bias circuit 5 is equal to the base voltage Q2B = of the transistor Q2. Since it is set to 0.3V higher than Q1B-0.3V, the transistor Q1 is " turned on " and the transistor Q2 is " turned off " at this time.

At this time, the resistors R3 and R4 and the transistor Q3 act as an emitter load of the transistor Q1 to form the emitter follower including the transistor Q1.

Therefore, at this time, the output is finally output through the emitter follower 20 of the output terminal consisting of the transistor Q6 and the resistors R10 and R11 without changing the magnitude of the signal level.

At this time, the pedestal level of the video signal output from the emitter follower 20 becomes 0.3V higher than when the transistor Q2 is "turned on".

(Like the city of FIG. 2)

As a result, no noise signal lower than the synchronization signal level is output in the video signal output to the output terminal of the emitter follower 20.

As described above, the present invention removes excessive noise below the synchronization signal level generated when performing the VTR multifunction, thereby affecting the audio band due to the image and modulation generated by the RF converter due to the excessive noise signal, thereby generating voice noise. It is to prevent it.

Therefore, even when performing the VTR multifunction, there is an effect that does not generate voice noise due to image and modulation.

Claims (2)

A noise reduction circuit of a VTR that removes a noise signal lower than a synchronization signal level of a video signal, comprising: a bias circuit 5 for matching a synchronization signal level of a reproduction video signal, and a synchronization signal of an input video signal whose synchronization signal level is identical A comparator 10 for removing noise below a synchronous signal level in comparison with the reference voltage level at which the level is set, and a comparator reference voltage setting circuit 15 for setting and supplying a reference voltage matching the synchronous signal level to the comparator 10. And an emitter follower (20) for buffering and amplifying and outputting the video signal of the comparator (10). The transistor of claim 1, wherein the comparator 10 includes a transistor Q1 to which an input video signal is applied to a base, a transistor Q2 to which a reference voltage of the comparator reference voltage setting circuit 15 is applied to a base, and the transistor ( A transistor is connected to the processed emitter of Q1) and Q2, and an input video signal is input to a base, and a transistor Q3 is output to output a video signal from which noise is removed on the collector side. Noise prevention circuit.