KR940001381Y1 - Scanning line number changing device for monitor - Google Patents

Scanning line number changing device for monitor Download PDF

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Publication number
KR940001381Y1
KR940001381Y1 KR2019890002494U KR890002494U KR940001381Y1 KR 940001381 Y1 KR940001381 Y1 KR 940001381Y1 KR 2019890002494 U KR2019890002494 U KR 2019890002494U KR 890002494 U KR890002494 U KR 890002494U KR 940001381 Y1 KR940001381 Y1 KR 940001381Y1
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KR
South Korea
Prior art keywords
monitor
signal
led display
display device
circuit
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KR2019890002494U
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Korean (ko)
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KR900017945U (en
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이하정
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대우전자주식회사
김용원
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3266—Details of drivers for scan electrodes

Abstract

내용 없음.No content.

Description

모니터의 주사선수 변환장치Monitor Inverter Inverter

제1도는 본 고안의 구성도.1 is a block diagram of the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

1ㅡ1ㅡn : 쉬프트 래지스터(Shift Register) 2ㅡ2ㅡn : 래치회로1 ㅡ 1 ㅡ n: Shift Register 2 ㅡ 2 ㅡ n: Latch Circuit

3 : 가산기 4 : LED 표시장치3: adder 4: LED display

5, 6 : 분주회로5, 6: frequency division circuit

D.E : 디스플레이 이네이불(Display enable)신호D.E: Display enable signal

H.s .H. S' : 수평동기신호 V. S, V. S' : 수직동기신호H.s.H. S ': Horizontal sync signal V. S, V. S': Vertical sync signal

D. E : 디스플레이 이네이블(Display enable)신호D. E: Display enable signal

CLK, CLK' : 클럭신호CLK, CLK ': Clock Signal

본 고안은 컴퓨터의 모니터에 주어진 영상 데이타(DATA)를 주사선수가 다른 LED 표시장치에 표현하고자할 경우에 이를 인터페이스(Interface)할 수 있는 모니터 주사선수 변화, 장치에 관한 것이다.The present invention relates to a monitor scan player change and a device that can interface the image data DATA given to the monitor of a computer when the scan player wants to express it on another LED display device.

일반적으로 텔레비젼 또는 모니터는 많은 주사선을 가지고 있지만 LED 표시장치는 크기, 부피의 관계로 수용할 수 있는 주사선이 극히 제한되어 있으며 또한 모니터상에 나타나는 영상을 LED 표시장치에 표현시킬 경우에는 서로의 주사선이 일치하지 않으므로 쉽게 표현되지 않게 된다.In general, televisions or monitors have many scanning lines, but LED display devices have a very limited scanning line in terms of size and volume. Also, when an image on a monitor is displayed on an LED display, the scanning lines of each other are different. Since they do not match, they are not easily expressed.

따라서 본 고안은 모니터에 나타난 영상 화면을 LED 표시 장치에 표현하기 위하여 두 장치의 주사선을 일치시킬 수 있도록 한 것으로서 모니터의 주사 선수가 LED 표시장치의 주사선보다 정수배 만큼 많은 경우 그 정수만큼 주사선 데이타를 합하거나 평균하여 새로운 한 개의 주사선을 형성시켜 LED 표시장치의 주사선수와 동일하게 만들어 모니터 상에 나타난 영상을 LED 표시 장치에 표현될 수 있는 장치를 제공함으로서 모니터의 기능 향상에 기여할 수 있도록 하는데 본 고안의 목적이 있는 것이다.Therefore, the present invention allows the scanning lines of two devices to be matched in order to express the image screen displayed on the monitor on the LED display device. When the scan player of the monitor is an integer multiple of the scanning lines of the LED display device, the scan line data is added by that integer. In order to contribute to the improvement of the monitor function by providing a device that can express the image displayed on the monitor by making it equal to the scan player of the LED display device by forming a single scan line or average. There is a purpose.

이하 첨부된 도면에 의해 상세히 설명하면 다음과 같다.Hereinafter, described in detail by the accompanying drawings as follows.

제1도에서와 같이 디스플레이 이네이블(D.E) 신호와 데이타(DATA) 그리고 클럭(CLK) 신호가 인가되는 쉬프트 레지스터(1)의 출력을 다른 쉬프트 레지스터(1-1)와 모니터의 주사선과 LED 표시 장치의 주사선과 동일하게 하기 위하여 정수배로 묶은 n개의 래치회로(2-2-n)에 연결하고 상기 래치회로(2-2-n)는 병렬로 연결하되 수평동기신호(H.S)가 되게 하고 이의 출력을 각각의 쉬프트 레지스터(1-2-1-n)에 인가함과 동시에 디스플레이 이네이블(D.E)신호를 LED 표시장치(4)의 주사선에 맞게 디바이더회로(5)에 의해 정수배로 나누어져 수평동기신호(H.S)와 함께 앤드회로 (AND)에 입력되며 이의 출력단을 각 쉬프트 레지스터(1-1-1-n)에 접속하고 또한 클럭(CLK) 신호와 디스플레이 이네이블(D.E) 신호가 동시에 인가되는 앤드회로 (AND2)의 출력 신호인 클럭(CLK)을 정수배로 (CLK') 각 쉬프트 레지스터(1-1-1-n)에 입력하고 이의 출력단을 가산기(3)를 통하여 LED 표시장치(4)에 연결하여서 된 것이다.As shown in FIG. 1, the output of the shift register 1 to which the display enable signal DE, the data DATA and the clock CLK signal are applied is displayed on the scan lines and the LEDs of the other shift register 1-1 and the monitor. In order to be equal to the scanning line of the device, it is connected to n latch circuits (2-2-n) enclosed by integers, and the latch circuits (2-2-n) are connected in parallel to be a horizontal synchronization signal (HS). While the output is applied to each shift register (1-2-1-n), the display enable (DE) signal is divided by an integer multiple by the divider circuit 5 in accordance with the scan line of the LED display device 4 and is horizontal. It is input to the AND circuit (AND) together with the synchronization signal (HS), and its output terminal is connected to each shift register (1-1-1-n), and the clock (CLK) signal and the display enable (DE) signal are simultaneously applied. an AND circuit which is a clock (CLK) output signals (AND 2) an integral multiple (CLK ') each rest Input to the bit register (1-1-1-n) and to the hayeoseo connected to the LED display device 4 through the output terminal thereof an adder (3).

상기와 같은 구성으로 이루어진 본 고안의 작용 및 효과를 설명하면 다음과 같다.Referring to the operation and effects of the present invention made of the above configuration as follows.

먼저 모니터의 주사선수와 LED 표시장치의 주사선을 동일하게 일치시키기 위하여 모니터의 주사선수를 정수배로 나누어야 하는데 가령 예를 들어 주사선수를로 한다고 가정하면, n개의 래치회로(2-2-n)와 쉬프트 레지스터(1-1-1-n)가 필요하게 되며 병렬로 연결하여야 한다.First of all, to match the scan line of the monitor with the scan line of the LED display device, the scan line of the monitor should be divided by an integer multiple In this case, n latch circuits 2-2-n and shift registers 1-1-1-n are required and must be connected in parallel.

따라서 쉬프트 레지스터(1)에 디스플레이 이네이블(D.E) 신호를 받아 동작 가능한 상태가 되면 영상 데이타는 클럭(CLK) 신호에 의해 쉬프트(Shift)함과 동시에 모든 래치회로(2-2-n)에 수평동기신호(H.S)에 기인하여 영상 데이타가 저장되기 시작한다(이때개의 주사선이 각 래치회로에 저장됨) 각 래치회로(2-2-n)에 n개의 데이타 저장이 완료되면 분주회로(2)에서 디스플레이 이네이블(D.E) 신호를 LED 표시장치(4)의 주사선수에 맞도록로 분주하여 수평동기신호(H.S)와 함께 앤드회로 (AND1)에 인가된다.Therefore, when the display enable signal (DE) is received in the shift register (1) and becomes an operable state, the image data is shifted by the clock (CLK) signal and is horizontal to all latch circuits (2-2-n). Image data starts to be stored due to the synchronization signal HS (at this time Scan lines are stored in each latch circuit) When n data is stored in each latch circuit (2-2-n), the display enable (DE) signal is scanned in the LED display device (4) by the division circuit (2). To match the player Is distributed to the AND circuit AND 1 together with the horizontal synchronization signal HS.

따라서 상기 앤드회로(AND1)의 최초 출력은 수평동기신호(H.S)가로 변화된 새로운 수평동기신호(H.S')가 되며 또한 앤드회로(AND2)에는 디스플레 이네이블 (D.E) 신호와 클럭(CLK)이 동시에 입력되어 이의 출력을 분주회로(6)에서 상기와 동일하게로 분주하여 LED 표시장치(4)에 맞는 새로운 클럭(CLK')이 출력되며 이의 신호가 각 쉬프트 레지스터(1-1-1-n)에 인가되어져 모든 래치회로(2-2-n)에 저장된 영상 데이타를 n개의 주사선에 대해 각 쉬프트 레지스터(1-1-1-2)에 동시 쉬프트하게 되고 이때 수평동기신호(H.S')가 인가되어 가산기(3)에 데이타를 공급하게 된다.Therefore, the first output of the AND circuit AND 1 has a horizontal synchronization signal HS. It becomes the new horizontal synchronizing signal H.S 'changed to, and the display signal DE and the clock CLK are simultaneously input to the AND circuit AND 2 , and the output thereof is the same as the above in the frequency divider circuit 6. to do The new clock CLK 'corresponding to the LED display device 4 is outputted, and its signal is applied to each shift register (1-1-1-n) and stored in all latch circuits (2-2-n). Image data is simultaneously shifted to each shift register (1-1-1-2) for n scan lines, and a horizontal synchronization signal (H.S ') is applied to supply the data to the adder (3).

즉 가산기(3)에서 출력되는 데이타는 모니터의 주사선이 n개 모인 영상 데이타인 것이다.That is, the data output from the adder 3 is image data in which n scan lines of the monitor are collected.

따라서 가산기(3)의 데이타 출력과 그에 알맞은 수평동기신호(H,S) 그리고 클럭(CLK')에 LED 표시장치(4)에 인가되어 모니터의 많은 주사선이 LED 표시장치(4)의 주사선과 동일하게 되어 모니터에 표현된 영상을 LED 표시장치(4)에 재현할 수 있는 것이다.Therefore, the data output of the adder 3 and the corresponding horizontal synchronization signals H and S and the clock CLK 'are applied to the LED display device 4 so that many of the scan lines of the monitor are the same as the scan lines of the LED display device 4. The image displayed on the monitor can be reproduced on the LED display device (4).

이상에서 상술한 바와 같이 작용하는 본 고안은 모니터에 나타난 영상을 LED 표시장치(4)에 표현하고자 할 경우 두 장치간에 주사선이 일치되도록 모니터의 주사선을 정수배로 나누고 이의 데이타를 수렴할 수 있는 인터페이스 장치를 구성함으로서 무리없이 모니터의 영상 화면을 LED 표시장치(4)에 재현할 수 있어 모니터의 신뢰성 향상에 크게 기여할 수 있는 유용한 고안인 것이다.According to the present invention, which works as described above, when the image displayed on the monitor is to be represented on the LED display device 4, an interface device capable of dividing the scan line of the monitor by an integer multiple and converging the data thereof so that the scan line is matched between the two devices. By constructing the video screen of the monitor can be reproduced on the LED display device 4 without difficulty, it is a useful design that can greatly contribute to improving the reliability of the monitor.

Claims (1)

디스플레이 이네이블(D.E) 신호와 데이타(DATA) 그리고 클럭(CLK) 신호가 인가되는 쉬프트 레지스터(1)의 출력을 다른 쉬프트 레지스터(1-1)와 모니터의 주사선과 LED 표시장치의 주사선과 동일하게 하기 위하여 정수배로 묶은 n개의 래치회로(2-2-n)에 연결하고, 상기 래치회로(2-2-n)는 병렬로 연결하되 수평동기 신호(H.S)가 되게 하고 이의 출력을 각각의 쉬프트 레지스터(1-2-1-n)에 인가함과 동시에 디스플레이 이네이블(D.E) 신호를 LED 표시장치(4)의 주사선에 맞게 디바이더회로(5)에 의해 정수배로 나누어져 수평동기신호(H.S)와 함께 앤드회로(AND)에 입력되며 이의 출력단을 각 쉬프트 레지스터(1-1-1-n)에 접속하고, 또한 클럭 (CLK) 신호와 디스플레이 이네이블(D.E) 신호가 동시에 인가되는 앤드회로(AND2)의 출력 신호인 클럭(CLK)을 정수배로 나누어 클럭(CLK') 각 쉬프트 레지스터(1-1-1-n)에 입력하고 이의 출력단을 가산기(3)를 통하여 LED 표시장치(4)에 연결하여서 된 것을 특징으로 하는 모니터의 주사선수 변환장치.The output of the shift register 1 to which the display enable signal DE, the data DATA, and the clock CLK signal are applied are the same as the scan lines of the other shift registers 1-1, the monitor, and the scan lines of the LED display device. In order to be connected to n latch circuits (2-2-n) enclosed by integer multiples, the latch circuits (2-2-n) are connected in parallel to each other to be a horizontal synchronization signal (HS), and their outputs are shifted to each other. At the same time as the register (1-2-1-n), the display enable signal (DE) is divided by an integer multiple by the divider circuit (5) in accordance with the scan line of the LED display device (4) and the horizontal synchronization signal (HS). The AND circuit is input to the AND circuit AND, and its output terminal is connected to each shift register 1-1-1-n, and an AND circuit to which the clock CLK signal and the display enable signal DE are simultaneously applied. The clock CLK, which is an output signal of AND 2 ), is divided by an integer multiple of each shift of the clock CLK '. A scanning player converting device for a monitor, characterized in that it is inputted to a register (1-1-1-n) and its output terminal is connected to an LED display device (4) through an adder (3).
KR2019890002494U 1989-03-04 1989-03-04 Scanning line number changing device for monitor KR940001381Y1 (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100486846B1 (en) * 1997-11-29 2005-08-24 국방과학연구소 Check Valve Structure for Oil Filling of Line Array Sound Detector

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100486846B1 (en) * 1997-11-29 2005-08-24 국방과학연구소 Check Valve Structure for Oil Filling of Line Array Sound Detector

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