KR930022771A - Speed Matching and Multiple / Demultiplex Controller of Electronic Switch - Google Patents

Speed Matching and Multiple / Demultiplex Controller of Electronic Switch Download PDF

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Publication number
KR930022771A
KR930022771A KR1019920006820A KR920006820A KR930022771A KR 930022771 A KR930022771 A KR 930022771A KR 1019920006820 A KR1019920006820 A KR 1019920006820A KR 920006820 A KR920006820 A KR 920006820A KR 930022771 A KR930022771 A KR 930022771A
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KR
South Korea
Prior art keywords
demultiplexing
packet
speed
multiplexing
communication means
Prior art date
Application number
KR1019920006820A
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Korean (ko)
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KR950006570B1 (en
Inventor
한치문
박천관
정의석
정철환
Original Assignee
경상현
재단법인 한국전자통신연구소
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Priority to KR1019920006820A priority Critical patent/KR950006570B1/en
Publication of KR930022771A publication Critical patent/KR930022771A/en
Application granted granted Critical
Publication of KR950006570B1 publication Critical patent/KR950006570B1/en

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/02—Details
    • H04L12/16—Arrangements for providing special services to substations

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Data Exchanges In Wide-Area Networks (AREA)

Abstract

본 발명은 전전자 교환기내의 패킷 교환 장치에 구현되는 속도 정합 및 다중/역다중화 제어기에 관한 것이다The present invention relates to a speed matching and multiple / demultiplex controller implemented in a packet switching device in an electronic switchboard.

본 발명은, 공중 전화망과 ISDN 이 연동하는 경우 ISDN 에서 스위치 장치를 통하여 입력된 표준 속도로 다중화된 공중 전화망의 비동기 단말 가입자의 데이타를 속도 변환과 다중/역다중화 기능을 통하여 공중 전화망에 수용된 가입자가 입력한 속도와 같은 속도로 가입자별로 변환시켜 비동기 통신 기능을 통하여 개별적으로 처리할 수 있게 하므로서, 망사이의 효율적인 연동을 수행할 수 있는 효과가 있다.According to the present invention, when a public telephone network and an ISDN are interworked, a subscriber accommodated in the public telephone network through a speed conversion and multiplex / demultiplex function converts data of an asynchronous terminal subscriber of a public telephone network multiplexed at a standard speed inputted through a switch device in the ISDN. By converting each subscriber at the same speed as the input speed and processing them individually through the asynchronous communication function, there is an effect that efficient interworking can be performed between networks.

Description

전전자 교환기의 속도 정합 및 다중/역다중화 제어기Speed Matching and Multiple / Demultiplex Controller of Electronic Switch

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 패킷 교환장치 구성도.1 is a block diagram of a packet switching device.

제2도는 패킷 조립/분해 장치 구성도.2 is a block diagram of the packet assembly / disassembly device.

제3도는 본 발명인 속도 정합 및 다중/역다중화 제어기 구성도.3 is a schematic diagram of speed matching and multiple / demultiplexing controller of the present invention.

제4도는 제어부에 의한 제어 흐름도.4 is a control flowchart of the control unit.

Claims (1)

패킷 호제어장치(1), 패킷 버스장치(2), 패킷 처리 장치(3), 패킷 조립/분해장치(4)를 구비한 패킷교환 장치의 상기 패킷 조립/분해장치(4)에 적용되는 속도 정합 및 다중/역다중화 제어기에 있어서, 외부의 스위치 장치에 연결되어 공중 전화망에 수용된 비동기 단말 가입자들이 입력한 데이타를 입력한 속도와 같은 속도로 가입별로 변환하여 다중화하고, 외부의 스위치 장치로 출력되는 데이타를 역다중화 하여 전달하는 속도 변환 및 다중/역다중화 수단(7)과, 상기 속도 변환 및 다중/역다중화 수단(7)을 거쳐 전달될 데이타를 가입자 별로 분리하는 비동기 통신 수단(8)과, 상기 속도 변환 및 다중/역다중화 수단(7)과 상기 비동기 통신 수단(8)을 통해 가입자별로 분류된 문자형 정보 각각에 대하여 일부 패킷 조립 기능을 부과하여 입력하는 공통 메모리(11)와, 상기 공통메모리(11)에 저장된 데이타를 트랜스 패어런트하게 패킷 조립/분해 제어기(5)로 전송하고, 상기 패킷 조립/분해 제어기(5)로 부터 입력되는 데이타를 상기 공통 메모리(11)로 인터페이스 하는 HDLC 통신 수단(9), 상기 속도 변환및 다중/역다중화 수단(7)과, 비동기 통신 수단(8)과, 공통 메모리(11)와, HDLC 통신 수단(9)에 연결되어 입출력되는 데이타의 다중화 및 역다중화를 제어하도록 마이크로 프로세서와 제어 프로그램으로 이루어진 제어수단(10)을 구비한 것을 특징으로 하는 전전자 교환기의 속도 정합 및 다중/역다중화 제어기.Speed applied to the packet assembling / decomposing apparatus 4 of the packet switching apparatus equipped with the packet call control apparatus 1, the packet bus apparatus 2, the packet processing apparatus 3, and the packet assembling / decomposing apparatus 4 In the matching and multiple / demultiplexing controller, connected to an external switch device, the asynchronous terminal subscribers accommodated in the public telephone network convert the input data at the same rate as the input rate and multiplex by subscription, and output to an external switch device. Speed conversion and multiplexing / demultiplexing means (7) for demultiplexing and transferring data, asynchronous communication means (8) for separating data to be transmitted by subscribers through the speed conversion and multiplexing / demultiplexing means (7), The common memory 11 which imposes and inputs a part packet assembling function for each of character information classified for each subscriber through the speed converting and multiplexing / demultiplexing means 7 and the asynchronous communication means 8. Transmitting data stored in the common memory 11 transparently to the packet assembly / decomposition controller 5 and interface data input from the packet assembly / decomposition controller 5 to the common memory 11. HDLC communication means 9, speed conversion and multiplexing / demultiplexing means 7, asynchronous communication means 8, common memory 11, HDLC communication means 9 A speed matching and multiple / demultiplexing controller of an electronic switching system comprising a control means (10) comprising a microprocessor and a control program to control multiplexing and demultiplexing. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임※ Note: The disclosure is based on the initial application.
KR1019920006820A 1992-04-22 1992-04-22 Rate matching and mux/demux controller of full electronic switching system KR950006570B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019920006820A KR950006570B1 (en) 1992-04-22 1992-04-22 Rate matching and mux/demux controller of full electronic switching system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019920006820A KR950006570B1 (en) 1992-04-22 1992-04-22 Rate matching and mux/demux controller of full electronic switching system

Publications (2)

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KR930022771A true KR930022771A (en) 1993-11-24
KR950006570B1 KR950006570B1 (en) 1995-06-16

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100557108B1 (en) * 1998-08-21 2006-05-25 삼성전자주식회사 Timing Synchronizer of Switching System

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100557108B1 (en) * 1998-08-21 2006-05-25 삼성전자주식회사 Timing Synchronizer of Switching System

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KR950006570B1 (en) 1995-06-16

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