KR920008616A - Switching element for circuit type multi-stage interconnection network - Google Patents

Switching element for circuit type multi-stage interconnection network Download PDF

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Publication number
KR920008616A
KR920008616A KR1019900017338A KR900017338A KR920008616A KR 920008616 A KR920008616 A KR 920008616A KR 1019900017338 A KR1019900017338 A KR 1019900017338A KR 900017338 A KR900017338 A KR 900017338A KR 920008616 A KR920008616 A KR 920008616A
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KR
South Korea
Prior art keywords
signal
input
circuit
path
stop
Prior art date
Application number
KR1019900017338A
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Korean (ko)
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KR930005844B1 (en
Inventor
김덕진
김혁구
안희일
손원일
임기욱
윤석환
Original Assignee
경상현
재단법인 한국전자통신연구소
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Application filed by 경상현, 재단법인 한국전자통신연구소 filed Critical 경상현
Priority to KR1019900017338A priority Critical patent/KR930005844B1/en
Publication of KR920008616A publication Critical patent/KR920008616A/en
Application granted granted Critical
Publication of KR930005844B1 publication Critical patent/KR930005844B1/en

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/16Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs

Abstract

내용 없음.No content.

Description

회선방식 다단 상호 접속망용 스위칭 소자Switching element for circuit type multi-stage interconnection network

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제1도는 본 발명의 스위치소자의 여러가지 연결 상태를 나타낸 개략도.1 is a schematic diagram showing various connection states of a switch element of the present invention.

제2도는 본 발명의 회선 스위칭소자의 블럭도.2 is a block diagram of a circuit switching device of the present invention.

제3도는 본 발명의 스위칭소자의 동작상태를 나타낸 개략도.3 is a schematic diagram showing an operating state of the switching device of the present invention.

제4도는 본 발명의 스위칭소자에서 사용되는 각 신호들의 타이밍도.4 is a timing diagram of respective signals used in the switching device of the present invention.

제5도는 본 발명의 스우칭소자의 동작상태를 나타내는 플로우챠트.5 is a flowchart showing an operating state of the stitching element of the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

1 : 태그해석회로 2 : 중복요구저지회로1: Tag Analysis Circuit 2: Overlap Request Circuit

3 : 경로상태저장회로 4 : 보조제어신호회로3: Path state storage circuit 4: Auxiliary control signal circuit

5 : 경로제어회로 11,12 : 멀티플렉서5: path control circuit 11, 12: multiplexer

Claims (2)

경로설정요구신호또는 해제신호(REL)와 태그신호(TAG) 또는 분배태그신호(BTAG)가 각각 하나의 입력단으로 입력되어 경로설정요구신호가 입력되면 경로설정용신호를 출력하는 태그해석회로(1)와, 상기 태그해석회로(1)로부터 경로설정용신호가 입력되면서 상기의 입력신호, (REL), (TAG), (BTAG)들이 동일한 방법으로 입력되어 저지신호(BCK)나 선로접속신호를 보내는 중복요구 저지회로(2)와, 상기 중복저지회로(2)로 부터 저지신호또는 선로접속신호가 입력되면서 리세트신호(RESET) 및 클럭신호(CLOCK)가 입력되어 현재 설정된 경로상태를 기억하는 경로상태저장회로(3)와, 상기 경로상태 저장회로(3)로 부터 경로설정상태 신호가 입력되면서 상기 중복 요구저지회로(2)로 부터 저지신호또는 신로접속신호를 입력받아 입출력포트(i)(j), (k)(l)로 응답신호, 저지신호및 제어신호(), (),들을 양방향으로 전달하는 보조제어신호회로(4)와, 상기 경로상태 저장회로(3)로 부터 경로설정상태 신호를 입력받아 경로부(20)의 두 멀티플렉서(11), (12)로 제어신호를 출력하여 입력포트(i)(j)와 출력포트(k)(l)의 접속상태를 제어하는 경로제어회로(5)들로 구성됨을 특징으로 하는 회선방식 다단상호 접속망용 스위칭소자.Route request signal Alternatively, the release signal REL, the tag signal TAG, or the distributed tag signal BTAG are input to one input terminal, respectively, so that the routing setting request signal is input. When is input, the tag analysis circuit 1 for outputting the route setting signal and the route setting signal are input from the tag analysis circuit 1, and the above input signal is input. , (REL), (TAG), and (BTAG) are input in the same way to send a stop signal (BCK) or a line connection signal and a duplicate request stop circuit (2) and a stop signal from the duplicate stop circuit (2) Or a path state storage circuit 3 for storing a currently set path state by inputting a reset signal RESET and a clock signal CLOCK while the line connection signal is input, and setting a path from the path state storage circuit 3. As the status signal is input, the stop signal from the overlapping request stop circuit 2 Alternatively, the response signal is input to the input / output ports (i) (j) and (k) (l). , Stop signal And control signals ( ), ( ), Auxiliary control signal circuit (4) for transmitting them in both directions and the path setting state signal from the path state storage circuit (3) receives the control signal to the two multiplexers (11), (12) of the path section 20 And a path control circuit (5) which outputs and controls a connection state between an input port (i) (j) and an output port (k) (l). 제1항에 있어서, 상기 경로부(20)의 멀티플렉서(11), (12)는 직선 접속, 교차접속 또는 분배접속의 방법에 의해 입·출력포트(i)(j)(k)(l)를 연결하도록한 회선방식 다단 상호접속망용 스위칭소자.The input / output ports (i) (j) (k) (l) of claim 1, wherein the multiplexers 11 and 12 of the path section 20 are connected by a straight line connection, a cross connection or a distribution connection. Switching device for a circuit-type multi-stage interconnection network to be connected. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019900017338A 1990-10-29 1990-10-29 Switching device for cascade of multilevel interconnection KR930005844B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019900017338A KR930005844B1 (en) 1990-10-29 1990-10-29 Switching device for cascade of multilevel interconnection

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019900017338A KR930005844B1 (en) 1990-10-29 1990-10-29 Switching device for cascade of multilevel interconnection

Publications (2)

Publication Number Publication Date
KR920008616A true KR920008616A (en) 1992-05-28
KR930005844B1 KR930005844B1 (en) 1993-06-25

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019900017338A KR930005844B1 (en) 1990-10-29 1990-10-29 Switching device for cascade of multilevel interconnection

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KR (1) KR930005844B1 (en)

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Publication number Publication date
KR930005844B1 (en) 1993-06-25

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