KR20180112920A - Display device - Google Patents

Abstract

A display device includes a base layer, a driving chip disposed on the base layer, a flat layer which covers the driving chip and is disposed on the base layer and in which a via hole and a pad via hole connected to the driving chip are defined, a display layer disposed on the flat layer and including a plurality of pixels and a plurality of signal lines electrically connected through the via hole, and a pad disposed on the flat layer and connected to the pad via hole. Accordingly, the present invention can enlarge a display area by reducing a bezel area.

Description

Display device {DISPLAY DEVICE}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display device, and more particularly, to a display device capable of reducing a bezel area.

2. Description of the Related Art Generally, a display device performs a process of electrically connecting a display panel and a driving chip in a module assembly equipment as a post-process equipment of a display panel. In such a combining process, a chip on glass (COG) ) Mounting method and TAB (Tape Automated Bonding) mounting method.

In the COG mounting method, a driver chip is directly mounted on a gate region and a data region of a display panel and an electrical signal is transmitted to the display panel. In general, an anisotropic conductive film (ACF) Bonding.

The TAB mounting method is a method of bonding a tape carrier package on which a driving chip is mounted to a display panel. This method also uses an anisotropic conductive film to bond the display panel to one end of the tape carrier package and to bond the main circuit board to the other end of the tape carrier package.

However, a general COG mounting method or a TAB mounting method includes a non-display area, i.e., a bezel area, to which the driving chip is bonded to the display panel. As a result, the display area is reduced as the non-display area is secured by the area where the driving chip is disposed.

An object of the present invention is to provide a display device in which a display area is enlarged by reducing a bezel area.

According to an aspect of the present invention, there is provided a display device including a base layer, a driving chip disposed on the base layer, a via hole and a pad via hole, which are disposed on the base layer and cover the driving chip, A display layer disposed on the flat layer and including a plurality of signal lines and a plurality of pixels electrically connected through the via hole; a pad disposed on the flat layer and connected to the pad via hole; do.

According to an embodiment of the present invention, a driving chip for providing an electrical signal to the display panel is covered with a flat layer, and a display layer may be disposed on the flat layer. In this case, the display panel and the driving chip can be electrically connected through the flat layer in which the via hole is defined. As a result, the display area for displaying the image can be enlarged as a whole.

1 is an exploded perspective view of a display device according to an embodiment of the present invention.
2 is a block diagram of a display device according to an embodiment of the present invention.
3 is a cross-sectional view of a display panel according to an embodiment of the present invention.
4 is a top view of the base layer shown in FIG.
5 is a plan view of the flat layer shown in Fig.
6A is a cross-sectional view taken along line I-I 'shown in FIG.
And FIG. 6B is a cross-sectional view taken along the line II-II 'shown in FIG.
7 is a display device according to another embodiment of the present invention.

While the invention is susceptible to various modifications and its various forms, it will be apparent to those skilled in the art that various changes and modifications can be made therein without departing from the spirit and scope of the invention. The present invention will be described in detail below. It should be understood, however, that the invention is not intended to be limited to the particular forms disclosed, but includes all modifications, equivalents, and alternatives falling within the spirit and scope of the invention.

Like reference numerals are used for like elements in describing each drawing. In the attached drawings, the dimensions of the structures are shown enlarged or reduced in size for clarity of the present invention. The terms first, second, etc. may be used to describe various components, but the components should not be limited by the terms. The terms are used only for the purpose of distinguishing one component from another. For example, without departing from the scope of the present invention, the first component may be referred to as a second component, and similarly, the second component may also be referred to as a first component. The singular expressions include plural expressions unless the context clearly dictates otherwise.

In the present application, the terms "comprises" or "having" and the like are used to specify that there is a feature, a number, a step, an operation, an element, a component or a combination thereof described in the specification, But do not preclude the presence or addition of one or more other features, integers, steps, operations, components, parts, or combinations thereof.

1 is an exploded perspective view of a display device according to an embodiment of the present invention. 2 is a block diagram of a display device according to an embodiment of the present invention.

As an embodiment of the present invention, a display device (DD) that can be applied to a smartphone is shown. However, the present invention is not limited thereto, and the display device DD according to an embodiment of the present invention may be applied to electronic devices such as a large-sized TV, a personal computer, a notebook computer, a car navigation unit, a game machine, an acoustic electronic device, a smart watch, . It should be understood that these are merely examples, and may be employed in other electronic devices as long as they do not deviate from the concept of the present invention.

As an embodiment of the present invention, a display device (DD) that can be applied to a smartphone is shown. However, the present invention is not limited thereto, and the display device DD according to an embodiment of the present invention can be applied to an electronic device such as a television, a personal computer, a notebook computer, a car navigation unit, a game machine, an acoustic electronic device, a smart watch, have. It should be understood that these are merely examples, and may be employed in other electronic devices as long as they do not deviate from the concept of the present invention.

The display device DD includes a plurality of regions that are distinguished on the display surface. Here, the display surface may be any one side of the display device in which the image is viewed directly by the user. The display device DD includes a display area DA for displaying an image and a non-display area NDA adjacent to the display area DA. That is, the non-display area NDA can be defined as a bezel area. For example, the non-display area NDA may surround the display area DA. For example, the non-display area NDA may be adjacent to any part of the display area DA, or may be omitted.

First, referring to FIG. 1, the display device DD may include a window member WM, a display panel 100, and a receiving member BC.

The window member WM is disposed on the display panel 100 and can transmit an image provided from the display panel 100 through the display area DA. Illustratively, the window member may be made of glass, sapphire, plastic, or the like. The window member WM may include a display area DA and a non-display area NDA, which may overlap the display area DA and the non-display area NDA of the display device DD defined above. have.

1, although the window member WM is shown as a single layer, the window member WM may comprise a plurality of layers. In one example, the window member WM may include at least one bezel layer disposed on the bottom surface of the base layer corresponding to the base layer and the non-display area NDA. On the other hand, the window member WM may be omitted according to the embodiment of the present invention.

The display panel 100 is parallel to the plane defined by the first direction DR1 and the second direction DR2. The normal direction of the display panel 100 is indicated by the third direction DR3. The third direction DR3 indicates the thickness direction of the display device DD. The upper surface (front surface) and the lower surface (back surface) of each of the members are divided by the third direction DR3. However, the directions indicated by the directions DR1, DR2, DR3 can be converted into different directions as relative concepts.

The display panel 100 is disposed between the window member WM and the accommodation member BC. According to an embodiment of the present invention, the display panel 100 may include an organic light emitting diode display panel, a liquid crystal display panel, a plasma display panel, an electrophoretic display panel, a microelectromechanical system display panel, and an electrowetting display panel.

The display panel 100 can generate an image and transmit it to the window member WM. The display panel 100 may include a display area DA and a non-display area NDA, which may overlap the display area DA and the non-display area NDA of the display device DD defined above. have.

On the other hand, although not shown separately, a touch sensing member may be disposed on the display panel 100. The touch sensing member can acquire the coordinate information of the external input.

The housing member BC can house the display panel 100 and the window member WM.

2, the display device DD includes a display panel 100, a signal controller 200, a gate driver circuit 300, and a data driver circuit 400. [

As shown in FIG. 1, the display panel 100 includes a first substrate S1 and a second substrate S2. A plurality of signal lines and a plurality of pixels PX11 to PXnm may be disposed on the first substrate S1. The signal lines may include a plurality of gate lines GL1 to GLn and a plurality of data lines DL1 to DLm. The second substrate S2 may be disposed on the first substrate S1.

For example, when the display panel 100 according to the present invention is applied to a liquid crystal display panel, a liquid crystal layer may be disposed between the first substrate S1 and the second substrate S2. As another example, when the display panel 100 according to the present invention is applied to an organic light emitting display panel, the organic light emitting device may be disposed between the first substrate S1 and the second substrate S2.

On the other hand, the second substrate S2 may be omitted according to the embodiment, or may be replaced with a thin film sealing layer. Although not shown in the present invention, when the second substrate S2 is provided as a thin film sealing layer, the touch sensing member may be disposed on the thin sealing layer.

The gate lines GL1 to GLn extend in the first direction DR1 and are arranged in the second direction DR2. The data lines DL1 to DLm are insulated from the gate lines GL1 to GLn. The gate lines GL1 to GLn are connected to the gate driving circuit 300 and the data lines DL1 to DLm are connected to the data driving circuit 400. [

The pixels PX11 to PXnm may be arranged in a matrix form. Each of the plurality of pixels PX11 to PXnm is connected to the corresponding one of the gate lines GL1 to GLn and the data lines DL1 to DLm and the corresponding data line.

Although not shown, the signal controller 200 can receive a plurality of video signals and a plurality of control signals from the outside. The signal controller 200 converts the external video signals into video signals RGB corresponding to the operation mode of the display panel 100 and transmits the video signals RGB to the data driving circuit 400. Here, the image signals RGB may be a digital signal.

The signal controller 200 receives as control signals a vertical synchronization signal, a horizontal synchronization signal, a main clock signal, and a data enable signal, and outputs a gate control signal G-CS and a data control signal D- CS). The signal controller 200 provides the gate control signal G-CS to the gate driving circuit 300 and provides the data driving circuit 400 with the data control signal D-CS.

The gate driving circuit 300 outputs gate signals to the gate lines GL1 to GLn in response to the gate control signal G-CS. For example, the gate control signal (G-CS) includes a vertical start signal for starting the operation of the gate drive circuit 300, a gate clock signal for determining the output timing of the gate voltage, and an output An enable signal, and the like.

The data driving circuit 400 receives the data control signal D-CS and the video signals RGB. In response to the data control signal D-CS, the data driving circuit 400 converts the video signals RGB into a plurality of data voltages and provides them to the data lines DL1 to DLm. For example, the data control signal D-CS includes a horizontal start signal for starting the operation of the data driving circuit 400, an inverted signal for inverting the polarity of the data voltages, An output instruction signal for determining a timing, and the like.

According to the embodiment of the present invention, the gate driving circuit 300 and the data driving circuit 400 may be connected to the display panel 100 based on the COG method. On the other hand, when the gate driving circuit and the data driving circuit are arranged on the same layer as the plurality of pixels as in the conventional art, a separate area for arranging the regions of the driving circuits is required.

However, the gate driving circuit 300 and the data driving circuit 400 according to the present invention can be disposed on a different layer from the display layer where the plurality of pixels PX11 to PXnm among the plurality of layers constituting the display panel are disposed have. As a result, the display area DA can be enlarged by an area of the drive circuits 300 and 400. [ This will be described in detail with reference to Figs. 3 to 6B.

3 is a cross-sectional view of a display panel according to an embodiment of the present invention. 4 is a top view of the base layer shown in FIG. 5 is a plan view of the flat layer shown in Fig.

First, the display panel 100 may be electrically connected to a printed circuit board (not shown) through a flexible printed circuit board. Here, the printed circuit board may include a signal controller 200 (see FIG. 2) that provides electrical signals to the gate driver circuit 300 and the data driver circuit 400.

3 to 5, the display panel 100 includes a first substrate S1 and a second substrate S2. The first substrate S1 includes a base layer BY, a flat layer PY, and a display layer DY. According to the description of the present invention, the first substrate S1 of the display panel 100 is described as being composed of three layers, but it is not limited thereto. That is, the first substrate S1 may be composed of various layers according to the embodiment.

According to FIG. 4, the driving chip may be disposed on the base layer BY. The driving chip can provide the pixels with electrical signals necessary for image display. The driving chip may include a gate driving circuit 300 and a data driving circuit 400.

5, the flat layer PY covers the gate driving circuit 300 and the data driving circuit 400 and may be disposed on the base layer BY. According to an embodiment of the present invention, the planarizing layer PY may be provided with a plurality of organic film layers. In another embodiment, the planarizing layer PY may be provided with a plurality of organic film layers and a plurality of inorganic film layers. As such, since the flat layer PY is provided with a plurality of organic film layers, the top surface of the flat layer PY can be made flat like the top surface of the base layer BY.

A plurality of pads PDa to PDd may be disposed on the planarizing layer PY. 4, four pads are disposed on the flat layer PY. However, the present invention is not limited to this, and a plurality of pads may be disposed. In this case, the pads PDa to PDd may be disposed on the flat layer PY so as to overlap the non-display area NDA. One end of the flexible circuit board is bonded to the pads PDa to PDd and the other end is bonded to one end of the printed circuit board. Some pads of the pads PDa to PDd may be electrically connected to the gate driving circuit 300 and the remaining pads may be electrically connected to the data driving circuit 400. [

In addition, according to the embodiment of the present invention, the planarizing layer PY includes a plurality of first via holes VHa and a plurality of data lines DL1 to DLn corresponding to the plurality of gate lines GL1 to GLn, And a plurality of second via holes VHb corresponding to the first via holes DLm.

The first via holes VHa may be connected to the gate driving circuit 300 disposed on the base layer BY. The second via holes VHb may be connected to the data driving circuit 400 disposed on the base layer BY. That is, an electrical signal transmitted through the pads PDa to PDd is supplied to the gate driving circuit 300 and the data driving circuit (not shown) disposed on the base layer BY via the first and second via holes VHa and VHb 400.

The gate driving circuit 300 applies gate signals GL1 to GLn to the plurality of gate lines GL1 to GLn through the first subordinate holes VHa in response to an electrical signal transmitted from some of the pads PDa to PDd, Respectively. The data driving circuit 400 outputs data signals DL1 to DLm to the plurality of data lines DL1 to DLm through the second idle holes VHb in response to the electrical signals transmitted from the remaining pads among the pads PDa to PDd, Respectively.

On the other hand, as described above with reference to FIG. 3, the display layer DY may be disposed on the flat layer PY. The display layer DY includes pixels PX11 to PXnm and signal lines, and can display an image through the pixels PX11 to PXnm to the outside.

6A is a cross-sectional view taken along line I-I 'shown in FIG. And FIG. 6B is a cross-sectional view taken along the line II-II 'shown in FIG.

6A, the gate driving circuit 300 is disposed on the base layer BY so as to overlap the display area DA in the third direction DR3. However, the technical idea of the present invention is not limited to this, and the gate driving circuit 300 may overlap a part of the non-display area NDA or only the non-display area NDA.

According to the embodiment, the flat layer PY may further include a pad via hole VHc connecting the pad PD and the gate driving circuit 300. That is, the pad via holes VHc may be provided in the planarizing layer PY, respectively, corresponding to the number of the pads PDa to PDd shown in FIG. For example, when there are four pads PDa to PD4, four pad via holes VHc may be provided in the planarizing layer PY.

The electric signal transmitted through the pad PD is transmitted to the gate drive circuit 300 through the pad via hole VHc. Here, the electrical signal may be a gate control signal. The gate drive circuit 300 may provide a gate signal to the gate line GL through the first via hole VHa in response to an electrical signal received via the pad PD.

According to the above description, the gate driving circuit 300 is disposed on the base layer BY, and the pixels and the gate lines can be disposed on the flat layer PY. As a result, the region where the conventional gate driving circuit is disposed corresponds to the non-display region, but the region where the gate driving circuit 300 according to the present invention is disposed can be defined as the display region DA. The gate drive circuit 300 may overlap the display area DA in the third direction DR3, as shown in Fig. 6A.

Referring to FIG. 6B, the data driving circuit 400 is disposed on the base layer BY so as to overlap the display area DA in the third direction DR3. Likewise, the data driving circuit 400 may partially overlap the non-display area NDA or overlap only the non-display area NDA.

According to the embodiment, the data driving circuit 400 may be electrically connected to the gate driving circuit 300. In this case, although not shown, a signal wiring for electrically connecting the data driving circuit 400 and the gate driving circuit 300 may be further disposed on the flat layer PY. That is, the data control signal and the video signals are transmitted to the pad via hole VHc through some of the pads PDa to PDd. Thereafter, data control signals and image signals are provided to the data driving circuit 400 through the gate driving circuit 300 connected to the pad via hole VHc and the signal wiring.

The data driving circuit 400 is electrically connected to the data line DL through the second via hole VHb. The data driving circuit 400 can supply the data voltage to the data line DL in response to the data control signal.

According to the above description, the data driving circuit 400 is disposed on the base layer BY, and the pixels and the gate lines can be disposed on the flat layer PY. As a result, although the area where the existing data driver circuit is disposed corresponds to the non-display area, the area where the data driving circuit 400 according to the present invention is disposed can be defined as the display area DA.

In the meantime, according to the embodiment of the present invention, the structure in which the pads PDa to PDd are connected to the gate driving circuit 300 through the pad via hole VHc has been described, but the present invention is not limited thereto. That is, the pads PDa to PDd may be connected to the data driving circuit 400 via the pad via hole VHc. In this case, the gate driving circuit 300 can be electrically connected to the data driving circuit 400 through the signal wiring. That is, the positions of the gate driving circuit 300 and the data driving circuit 400 shown in FIG. 5 may be changed.

7 is a display device according to another embodiment of the present invention.

Referring to Fig. 7, a plurality of display panels DP1 to DP4 may be provided. These display panels DP1 to DP4 can be applied to a large display device. Each of the display panels DP1 to DP4 may be implemented with the display panel described above with reference to Figs. 3 to 6B. In this case, only the pads connected to the printed circuit board can be connected to one side of the display panels DP1 to DP4.

For example, the pads may be disposed adjacent to the first gate drive circuit 300a and the third gate drive circuit 300c. The electrical signals transmitted through the pads are transmitted through the first to fourth gate driving circuits 300a, 300b, 300c, and 300d and the first to fourth data driving circuits 400a, 400b, 400c, and 400d, Respectively, through the via holes. More specifically, an electrical signal transmitted through the pads is transmitted to the first gate driving circuit 300a and the third gate driving circuit 300c via a via hole, and the remaining driving circuits are connected through signal lines arranged on the flat layer And receives an electrical signal. These signal wirings electrically connect the first gate drive circuit 300a and the third gate drive circuit 300c to the remaining drive circuits.

The embodiments have been disclosed in the drawings and specification as described above. Although specific terms have been employed herein, they are used for purposes of illustration only and are not intended to limit the scope of the invention as defined in the claims or the claims. Therefore, those skilled in the art will appreciate that various modifications and equivalent embodiments are possible without departing from the scope of the present invention. Accordingly, the true scope of the present invention should be determined by the technical idea of the appended claims.

WM: absence of window
BC: storage member
100: display panel
200:
300: gate drive circuit
400: Data driving circuit

Claims (1)

A base layer;
A driving chip disposed on the base layer;
A flat layer covering the driving chip and disposed on the base layer, wherein a via hole and a pad via hole connected to the driving chip are defined;
A display layer disposed on the flat layer, the display layer including a plurality of signal lines and a plurality of pixels electrically connected through the via hole; And
And a pad disposed on the flat layer and connected to the pad via hole.

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