KR20100006224A - Light emitting device and method for fabricating the same - Google Patents

Abstract

PURPOSE: A light-emitting device and a manufacturing method thereof are provided to prevent electrical properties from being degraded by attaching the by-products of a protective metal layer on the side of the compound semiconductor layer. CONSTITUTION: A light-emitting device comprises a compound semiconductor layer, a metal reflective layer(61), a dielectric structure(62), a metal protective layer(63), and a substrate. The compound semiconductor layer comprises a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer. The metal reflective layer is formed in a part of the second conductive semiconductor layer. The dielectric structure is formed in order to cover the side of the second conductive semiconductor layer and the active layer. The metal protective layer is formed in order to cover the dielectric structure and a second conductive semiconductor layer(59). The substrate is bonded in the metal protective layer.

Description

LIGHT EMITTING DEVICE AND METHOD FOR FABRICATING THE SAME}

The present invention relates to a light emitting device and a method of manufacturing the same. Specifically, the metal by-products by etching are attached to the side surfaces of the compound semiconductor layer exposed during the etching process, so that the compound semiconductor layer is not exposed so as not to impair the electrical and optical properties. A light emitting device formed by protecting a side surface with an insulating structure and a method of manufacturing the same.

In general, nitrides of Group III elements, such as gallium nitride (GaN) and aluminum nitride (AlN), have excellent thermal stability and have a direct transition energy band structure. As a lot of attention. In particular, blue and green light emitting devices using gallium nitride (GaN) have been used in various applications such as large-scale color flat panel display devices, traffic lights, indoor lighting, high density light sources, high resolution output systems, and optical communications.

The nitride semiconductor layer of such a group III element, in particular GaN, is difficult to fabricate a homogeneous substrate capable of growing it, and thus, it is difficult to fabricate a homogeneous substrate capable of growing it. MBE) and other processes. As a hetero substrate, a sapphire substrate having a hexagonal structure is mainly used. However, since sapphire is an electrically insulator, it restricts the light emitting diode structure and is very stable mechanically and chemically, making it difficult to process such as cutting and shaping, and low thermal conductivity. Accordingly, in recent years, after the nitride semiconductor layers are grown on a dissimilar substrate such as sapphire, a technique of manufacturing a light emitting diode having a vertical structure by separating the dissimilar substrate has been studied.

1 is a cross-sectional view illustrating a vertical light emitting diode according to the prior art.

Referring to FIG. 1, the vertical light emitting diode includes a conductive substrate 31. Compound semiconductor layers including an N-type semiconductor layer 15, an active layer 17, and a P-type semiconductor layer 19 are positioned on the conductive substrate 31. In addition, a metal reflective layer 23, a protective metal layer 25, and an adhesive layer 27 are interposed between the conductive substrate 31 and the P-type semiconductor layer 19.

Compound semiconductor layers are generally grown on a sacrificial substrate (not shown), such as a sapphire substrate, using metalorganic chemical vapor deposition or the like. Thereafter, the metal reflective layer 23, the protective metal layer 25, and the adhesive layer 27 are formed on the compound semiconductor layers, and the conductive substrate 31 is attached. Subsequently, the sacrificial substrate is separated from the compound semiconductor layers using laser lift-off techniques or the like, and the N-type semiconductor layer 15 is exposed. Thereafter, the compound semiconductor layers are separated into respective light emitting cell regions on the conductive substrate 31 through etching. Subsequently, an electrode pad 33 is formed on the N-type half body layer 15 for each of the separated light emitting cell regions, and the conductive substrate 31 is diced for each light emitting cell region and separated into individual elements. Accordingly, by adopting the conductive substrate 31 having excellent heat dissipation performance, the light emitting efficiency of the light emitting diode can be improved, and the light emitting diode of FIG. 1 having a vertical structure can be provided.

However, in the case of the vertical type light emitting diode using the conductive substrate as described above, dry etching is typically performed to separate each cell during fabrication. Since this etching is a separation of the device itself, the etching is deep (more than 2um) unlike the mesa etching process to form the electrode. Therefore, the etching is performed deeper than the actual etching depth in order to remove what remains in some exposed portions after etching.

In this etching process, the protective metal layer 25 protecting the metal reflective layer 23 is etched and the etched by-products are adsorbed on the side of each cell. By-products adsorbed to each cell electrically connect the N-type semiconductor layer 15 and the P-type semiconductor layer 19 to cause a short (short circuit). These by-products that may be generated during the etching process should be removed by wet etching, but metals such as W, Pt, and Ni, which are typically used as the protective metal layer 25, are difficult to remove because they have properties that are not removed even by wet etching.

The problem to be solved by the present invention is to provide a light emitting device and a method for manufacturing the same by which the by-products of the protective metal layer generated in the dry etching process is attached to the compound semiconductor layer to reduce the electrical properties as described above.

According to an aspect of the present invention for solving this problem, a compound semiconductor layer comprising a first conductive semiconductor layer, an active layer and a second conductive semiconductor layer; A metal reflective layer formed on a portion of the second conductive semiconductor layer; An insulating structure formed to cover at least side surfaces of the active layer and the second conductive semiconductor layer; A second conductive semiconductor layer having the metal reflective layer formed thereon and a protective metal layer formed to cover the insulating structure; And a substrate bonded to the protective metal layer, wherein the insulating structure is provided to expose a portion of the protective metal layer.

Preferably, the light emitting device includes: a first electrode formed on the first conductivity type semiconductor layer; The display device may further include a second electrode formed on the protective metal layer exposed through the insulating structure.

Preferably, the protective metal layer in contact with the second electrode may be filled up to an upper surface of the insulating structure.

Preferably, the second electrode in contact with the protective metal layer may be filled to the lower surface of the insulating structure.

Preferably, the insulating structure may be formed to further cover at least a portion of the side surface of the first conductivity type semiconductor layer.

Preferably, the insulating structure may include at least one of SiO ₂ , SiN, MgO, TaO, TiO ₂ , and a polymer.

Preferably, the insulating structure may be formed to extend at least a portion of the lower surface of the second conductivity type semiconductor layer.

Preferably, the insulating structure may extend to cover at least a portion of the metal reflective layer.

According to another aspect of the present invention, a compound semiconductor layer including a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer is formed on a sacrificial substrate, and the sacrificial substrate or the first conductive semiconductor layer is exposed. Performing mesa matching; Forming a metal reflective layer on a portion of the upper portion of the second conductive semiconductor layer; Forming an insulating structure surrounding at least the active layer and the second conductive semiconductor layer on the first conductive semiconductor layer or the sacrificial substrate exposed through the mesa etching; Exposing the first conductive semiconductor layer by forming a protective metal layer and a bonding substrate on top of the second conductive semiconductor layer on which the metal reflective layer is formed and on the insulating structure, and removing the sacrificial substrate; Performing etching to separate the compound semiconductor layer into individual elements with at least the side surfaces of the active layer and the second conductive semiconductor layer covered by the insulating structure, wherein the insulating structure is the protective metal layer. There is provided a light emitting device manufacturing method formed to expose a portion of the light emitting device.

Preferably, the light emitting device manufacturing method comprises the steps of forming a first electrode on the first conductivity type semiconductor layer; And forming a second electrode on the protective metal layer exposed through the insulating structure.

Preferably, the protective metal layer in contact with the second electrode may be filled up to an upper surface of the insulating structure.

Preferably, the second electrode in contact with the protective metal layer may be filled to the lower surface of the insulating structure.

Preferably, the insulating structure may be formed to further cover at least a portion of the side surface of the first conductivity type semiconductor layer.

Preferably, the insulating structure may include at least one of SiO ₂ , SiN, MgO, TaO, TiO ₂ , and a polymer.

Preferably, the insulating structure may be formed to extend at least a portion of the lower surface of the second conductivity type semiconductor layer.

The insulating structure may extend to cover at least a portion of the metal reflective layer.

According to an embodiment of the present invention, in manufacturing a light emitting device by forming a metal reflective layer, a protective metal layer, a bonding substrate on the compound semiconductor layer, by protecting the side surfaces of the compound semiconductor layer with an insulating structure in the conventional dry etching process to protect the problem By-products of the metal layer can be effectively prevented from adhering to the sides of the compound semiconductor layers to degrade the electrical properties.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. The following embodiments are provided as examples to ensure that the spirit of the present invention can be fully conveyed to those skilled in the art. Accordingly, the present invention is not limited to the embodiments described below and may be embodied in other forms. And, in the drawings, the width, length, thickness, etc. of the components may be exaggerated for convenience. Like numbers refer to like elements throughout.

2 is a cross-sectional view illustrating a light emitting diode according to an embodiment of the present invention.

Referring to FIG. 2, compound semiconductor layers including an N-type semiconductor layer 55, an active layer 57, and a P semiconductor layer 59 are positioned on the bonding substrate 71. The bonding substrate 71 may be a sapphire substrate, but is not limited thereto and may be another hetero substrate. Meanwhile, the compound semiconductor layers are III-N series compound semiconductor layers. For example, it is a (Al, Ga, In) N semiconductor layer.

A metal reflective layer 61, an insulating structure 62, and a protective metal layer 63 are interposed between the compound semiconductor layers and the bonding substrate 71.

The metal reflective layer 61 is formed of a metal material having a high reflectance such as silver (Ag) or aluminum (Al).

The insulating structure 62 is formed to surround the side surfaces of the compound semiconductor layers and a part of the surface on which the metal reflective layer 61 is formed. For example, SiO ₂ , SiN, MgO, TaO, TiO ₂ , or a polymer may be used as the insulating layer 62. In order that the insulating structure 62 is formed to surround side surfaces of the compound semiconductor layers, a portion of the P semiconductor layer 59, the active layer 57, and the N-type semiconductor layer 55 is mesa-etched, and then the compound is exposed through mesa-etching. An insulating film 62 is formed to surround side portions of the semiconductor layers. In this case, the insulating structure 62 includes inner portions 62b and 62c surrounding the side surfaces of the compound semiconductor layers and outer portions 62a and 62d formed with a portion filled with the protective metal layer 63 to form an electrode therebetween. Can be. The insulating structure 62 may be formed with an open area so that at least a portion thereof exposes the protective metal layer 63. Accordingly, the insulating structure 62 may be formed such that the inner parts 62b and 62c and the outer parts 62a and 62d are separated by the open area in which the protective metal layer 63 is filled, and the inner parts 62b and 62c. The outer side portions 62a and 62d may not be completely separated from each other, but the protective metal layer 63 may be filled in the open regions formed at positions. In addition, although the inner portions 62b and 62c of the insulating structure 62 are formed to cover the side surfaces of the compound semiconductor layers and a part of the P-type semiconductor layer 59 in which the metal reflective layer 61 is formed, the present invention is limited thereto. The insulating structure 62 may be formed to cover only the side surfaces of the compound semiconductor layers even if the insulating structure 62 does not cover the portion of the P-type semiconductor layer 59.

The protective metal layer 63 may prevent metal elements from diffusing from the adhesive layer 67 into the metal reflective layer 61 to maintain the reflectivity of the metal reflective layer 61. The protective metal layer 63 not only protects the metal reflective layer 61 but also becomes a layer exposed when etching after removal of the sacrificial substrate. The protection metal layer 63 may generate by-products by dry etching. Nevertheless, these by-products are deposited on the insulating layer 62 formed around the side surfaces of the compound semiconductor layers, so that the by-products are electrically connected to the N-type semiconductor layer 55, the active layer 57, and the P semiconductor layer 59. You can block the impact.

In the embodiment, the protective metal layer 63 in contact with the P electrode 83b is shown as being filled up to the upper surface of the insulating structure 62. However, the present invention is not limited thereto, and the P electrode 83b is insulated from the insulating layer 62. It may be formed by filling up to the lower surface of the structure 62 or by filling up to an intermediate point of the insulating structure 62.

The adhesive layer 67 improves the adhesion between the bonding substrate 71 and the metal reflective layer 61 to prevent the bonding substrate 71 from being separated from the metal reflective layer 61.

On the other hand, an N electrode 83a is formed on the N-type semiconductor layer 55, and a P electrode 83b is formed on the protective metal layer 63 exposed through at least a portion (open region) of the insulating structure 62. do. Accordingly, light can be emitted by supplying a current through the conductive substrate 71 and the electrode pad 83.

3 to 11 are cross-sectional views illustrating a method of manufacturing a light emitting diode according to an embodiment of the present invention.

Referring to FIG. 3, compound semiconductor layers are formed on the sacrificial substrate 51. The sacrificial substrate 51 may be a sapphire substrate, but is not limited thereto and may be another hetero substrate. The compound semiconductor layers include an N semiconductor layer 55, an active layer 57, and a P-type semiconductor layer 59. The compound semiconductor layers are III-N-based compound semiconductor layers, and may be grown by a process such as metal organic chemical vapor deposition (MOCVD) or molecular beam deposition (MBE).

Meanwhile, before forming the compound semiconductor layers, a buffer layer (not shown) may be formed. The buffer layer is adopted to mitigate lattice mismatch between the sacrificial substrate 51 and the compound semiconductor layers, and may generally be a gallium nitride-based material layer.

Referring to FIG. 4, mesa etching is performed on the P-type semiconductor layer 59, the active layer 57, and the N-type semiconductor layer 55. Accordingly, some of the P-type semiconductor layer 59, the active layer 57, and the N-type semiconductor layer 55 are etched to form side surfaces of the P-type semiconductor layer 59 and the active layer 57, and the N-type semiconductor layer 55. At least some aspect of the In this case, the exposed N-type semiconductor layer 55 may have a different height of the side portion exposed according to the degree of etching.

Referring to FIG. 5, the metal reflective layer 61 is formed on a portion of the P-type semiconductor layer 59. The metal reflective layer 61 may be formed using, for example, plating or vapor deposition of silver (Ag) or aluminum (Al).

Thereafter, an insulating structure 62 is formed on the N-type semiconductor layer 55. The thickness of the insulating structure 62 may be higher than the thickness of the metal reflective layer 61. However, the present invention is not limited thereto and can be modified as many as possible. The insulating structure 62 is formed so as to surround and cover the side surfaces of the P-type semiconductor layer 59, the active layer 57, and the N-type semiconductor layer 55. At least a portion of the insulating structure 62 has an open region to expose the N-type semiconductor layer 55. Accordingly, the insulating structure 62 has an inner portion 62b, 62c surrounding the side surfaces of the compound semiconductor layers and an outer portion 62a, 62d formed with an open region filled with the protective metal layer 63 to form an electrode. It can be made of).

At this time, the open area formed so that the N-type semiconductor layer 55 is exposed to the insulating structure 62 may be formed in several places of the insulating structure 62, and the inner parts 62b and 62c and the outer part by the open area. 62a and 62d may be formed to be separated.

Referring to FIG. 6, after the insulating structure 62 is formed, the protective metal layer 63 is formed. The protective metal layer 63 may be formed of, for example, Ni, Ti, Ta, Pt, W, Cr, or Pd. The protective metal layer 63 is a portion of the N-type semiconductor layer 55 exposed through the open area of the insulating structure 62, the metal reflective layer 61, the inner portions 62b and 62c of the insulating structure and the metal reflective layer 61. It is formed on the P-type semiconductor layer 59 exposed in between.

Referring to FIG. 7, a first bonding metal 67a is formed on the insulating structure 62. For example, AuSn (80/20 wt%) may be formed to a thickness of 15,000 kPa.

Referring to FIG. 8, the bonding substrate 71 on which the second bonding metal 67b is formed is bonded on the first bonding metal 67a.

Referring to FIG. 9, the sacrificial substrate 51 is separated from the compound semiconductor layers. The sacrificial substrate 51 may be separated by laser lift off (LLO) technology or other mechanical or chemical methods. At this time, the buffer layer is also removed to expose the N-type semiconductor layer 55. When the sacrificial substrate 51 is removed and the exposed N-type semiconductor layer 55 faces upward, the sacrificial substrate 51 is in the form shown in FIG. 10.

Referring to FIG. 11, dry etching is performed to separate the compound semiconductor layer into unit cell regions and to expose the protective metal layer 63 required to supply current to the P-type semiconductor layer 59. A part of the N-type semiconductor layer 55 is etched through this dry etching process. A part of the protective metal layer 63 may be etched through dry etching, and thus a by-product of the protective metal layer 63 may be generated. However, the side surfaces of the N-type semiconductor layer 55, the active layer 57, and the P-type semiconductor layer 59 are surrounded by the insulating structure 62, so that the by-products of the protective metal layer 63 do not have any electrical influence. Will not. Subsequently, when the N-type electrode 83a is formed on the N-type semiconductor layer 55 and the P-type electrode 83b is formed on the protective metal layer 63 exposed through dry etching, the light emitting device of FIG. 2 is completed. In addition, as illustrated in FIG. 12, the light extraction efficiency may be improved by forming the uneven surface 55a on the N-type semiconductor layer 55 having the N-type electrode 83a formed by roughing.

The present invention is not limited to the above described embodiments, and various modifications and changes can be made by those skilled in the art, which are included in the spirit and scope of the present invention as defined in the appended claims.

For example, in one embodiment of the present invention, although the insulating structure 62 is illustrated as extending on at least a portion of the bottom surface of the second conductivity-type semiconductor layer 59, the present invention is not limited thereto.

In addition, although the insulating structure 62 is described as being spaced apart from the metal reflective layer 61 in one embodiment of the present invention, the present invention is not limited thereto. That is, in another embodiment of the present invention, the insulating structure 62 may extend to contact the side surface of the metal reflective layer 61. In another embodiment of the present invention, the insulating structure 62 may be extended to cover at least a portion of the metal reflective layer 61. In another embodiment of the present invention, the insulating structure 62 may extend to cover at least a portion of the metal reflective layer 61 while contacting the side surface of the metal reflective layer 61.

In addition, in one embodiment of the present invention, a portion of the side surface of the N-type semiconductor layer 55 is not covered by the insulating structure 62, but the present invention is not limited thereto, and all of the side surfaces of the N-type semiconductor layer 55 are insulated. It may be deformed to be covered by the structure 62.

In addition, as another modification of the present invention, as shown in FIGS. 13 and 14, a portion of the N-type semiconductor layer 55 may be extended to cover an upper portion of the insulating structure 62, and the extended portion of the N-type semiconductor layer 55 may be extended. The light extraction efficiency can be improved by forming the uneven surface through roughening on the surface of the part.

1 is a cross-sectional view illustrating a conventional vertical light emitting diode.

2 is a cross-sectional view illustrating a light emitting diode according to an embodiment of the present invention.

3 to 11 are cross-sectional views illustrating a method of manufacturing a light emitting diode according to an embodiment of the present invention.

12 is a cross-sectional view illustrating a method of manufacturing a light emitting diode according to another embodiment of the present invention.

13 and 14 are cross-sectional views illustrating a light emitting diode according to another embodiment of the present invention.

Claims (16)

A compound semiconductor layer including a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer; A metal reflective layer formed on a portion of the second conductive semiconductor layer; An insulating structure formed to cover at least side surfaces of the active layer and the second conductive semiconductor layer; A second conductive semiconductor layer having the metal reflective layer formed thereon and a protective metal layer formed to cover the insulating structure; And A substrate bonded to the protective metal layer, And the insulating structure is formed to expose a portion of the protective metal layer. The method according to claim 1, A first electrode formed on the first conductive semiconductor layer; And a second electrode formed on the protective metal layer exposed through the insulating structure. The method according to claim 2, And the protective metal layer in contact with the second electrode is filled up to an upper surface of the insulating structure. The method according to claim 2, The second electrode in contact with the protective metal layer is filled to the lower surface of the insulating structure. The method according to claim 1, And the insulating structure is formed to further cover at least a part of the side surface of the first conductivity-type semiconductor layer. The method according to claim 1, The insulating structure includes at least one of SiO ₂ , SiN, MgO, TaO, TiO ₂ , and a polymer. The method according to claim 1, And the insulating structure extends on at least a portion of a lower surface of the second conductivity type semiconductor layer. The method according to claim 1, And the insulating structure extends to cover at least a portion of the metal reflective layer. Forming a compound semiconductor layer including a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer on the sacrificial substrate, and performing mesa matching to expose the sacrificial substrate or the first conductive semiconductor layer; Forming a metal reflective layer on a portion of the upper portion of the second conductive semiconductor layer; Forming an insulating structure surrounding at least the active layer and the second conductive semiconductor layer on the first conductive semiconductor layer or the sacrificial substrate exposed through the mesa etching; Exposing the first conductive semiconductor layer by forming a protective metal layer and a bonding substrate on top of the second conductive semiconductor layer on which the metal reflective layer is formed and on the insulating structure, and removing the sacrificial substrate; Performing etching to separate the compound semiconductor layer into individual elements with at least the side surfaces of the active layer and the second conductivity-type semiconductor layer being covered by the insulating structure; And the insulating structure is formed to expose a portion of the protective metal layer. The method according to claim 9, Forming a first electrode on the first conductivity type semiconductor layer; And And forming a second electrode on the protective metal layer exposed through the insulating structure. The method according to claim 10, And the protective metal layer in contact with the second electrode is filled up to an upper surface of the insulating structure. The method according to claim 10, And the second electrode in contact with the protective metal layer is filled to the lower surface of the insulating structure. The method according to claim 9, The insulating structure is formed to cover at least a portion of the side of the first conductivity type semiconductor layer. The method according to claim 9, The insulating structure comprises at least one of SiO ₂ , SiN, MgO, TaO, TiO ₂ , polymer. The method according to claim 9, And the insulating structure extends on at least a portion of a lower surface of the second conductivity type semiconductor layer. The method according to claim 9, And the insulating structure extends to cover at least a portion of the metal reflective layer.

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