KR20030066990A - Clock circuit of gps receiving part in telematic system - Google Patents

Abstract

PURPOSE: A clock circuit of a GPS receiver within a data terminal for vehicle is provided to reduce manufacturing costs without an expensive inverter by forming an ASIC including a waveform converter and a GPS baseband portion. CONSTITUTION: A clock circuit of a GPS receiver within a data terminal for vehicle includes a GPS RF circuit portion(213), a TCXO(211), a level correction resistance(R21), a capacitor(C21), a circuit protection and level correction resistance(R22), and an ASIC portion(214). The TCXO generates a clock signal of 14.44MHz. The level correction resistance is used for attenuating and correcting a level of the clock signal of 14.44MHz. The capacitor is used for cutting off DC elements. The circuit protection and level correction resistance is used for protecting an internal circuit of a GPS baseband portion by attenuating and correcting the level of the clock signal. The ASIC portion includes a waveform conversion portion for converting the clock signal to a square wave and the GPS baseband portion for receiving the clock signal from the waveform conversion portion.

Description

CLOCK CIRCUIT OF GPS RECEIVING PART IN TELEMATIC SYSTEM}

The present invention relates to a clock circuit of a GPS receiver in a vehicle information terminal. Particularly, a waveform converter is implemented as an ASIC together with a GPS baseband unit without using expensive inverter components, thereby providing a clock of 14.4 MHz required by the GPS receiver through the waveform converter. The present invention relates to a clock circuit of a GPS receiver in an in-vehicle information terminal that can be miniaturized due to cost reduction and integration because it does not use a separate inverter component, thereby securing a competitiveness.

In general, the vehicle information terminal mounted on the vehicle transmits the vehicle status information including the vehicle identification information and the location information to the central control system, and in the event of an accident, requests the rescue from the central control system using the status information. In the event of theft, the location of the stolen vehicle can be tracked using the identification number and location information of the vehicle, and when a portable computer such as a laptop is connected, the mobile internet network can be accessed.

A vehicle information terminal (TLELMATIC SYSTEM) for performing such a function is shown in Figure 1, Figure 1 is a general schematic diagram of a general vehicle information terminal, referring to Figure 1, from the GPS satellite through the GPS antenna ANT1 GPS receiver 11 for receiving GPS satellite signals including the vehicle's own location information, sensing unit 12 for detecting the state of various devices of the vehicle, and data input unit 13 for inputting data by a user ), Store and update sensing information, self-identification information and location information, control the processing according to data input, and control the transmission of vehicle status information, including vehicle identification information and location information, through the mobile communication network, etc. The micro control unit 14 controls various operations, and communicates with the central control system through the communication antenna ANT2 under the control of the micro control unit 14. A CDMA modem 15 for performing a scene, a display unit 16 for outputting a screen necessary for operation, a voice processing unit 17 for outputting set information as voice, and an RS-232C interface unit for connecting a PC. It contains 18.

In addition, the vehicle information terminal includes a power supply unit 19. The power supply unit 19 receives a voltage of approximately 12 V from the battery B1 of the vehicle, and provides an operating voltage V1 required for each unit of the apparatus ( 2.5V, 3.3V and 5V) and the system backup voltage VB1 (3.3V), and the GPS receiver 11 of the vehicle information terminal provides a signal processing function for receiving location information, that is, a satellite signal. After capture, a reference clock signal is generated and provided for position calculation with this satellite signal.

FIG. 2 is a schematic diagram of a GPS receiver in a conventional command information terminal. Referring to FIG. 2, the GPS receiver generates a sawtooth wave clock signal of 14.4 MHz, and the TCXO 111. Inverter circuit unit 112 for inverting the clock signal of the square wave to provide a square wave, and GPS RF circuit unit for providing an intermediate frequency signal (IF) that performs a frequency conversion function according to the clock signal of the TCXO (111) 113 and a GPS baseband unit 114 for converting an intermediate frequency from the GPS RF circuit unit 113 into a baseband signal according to a clock signal provided through the inverter circuit unit 112 to restore original data. Doing.

However, such a conventional clock circuit of a GPS receiver in a vehicle information terminal includes an inverter circuit section 112 including a TCXO 111 and two inverters to perform a double inversion function to provide a clock. Due to the complexity of the circuit, the cost increases, thereby losing the competitiveness of the module of the GPS receiver.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems. Accordingly, an object of the present invention is to implement a waveform conversion unit with an ASIC together with a GPS baseband unit without using an expensive inverter component, so that a waveform of 14.4 MHz clock required by the GPS receiver unit is waveformd. The present invention provides a clock circuit of a GPS receiver in an in-vehicle information terminal that can be miniaturized due to cost reduction and integration since it does not use a separate inverter component, thereby securing a competitiveness.

1 is an overall schematic diagram of a general vehicle information terminal.

2 is a schematic diagram of a GPS receiver in a conventional command information terminal.

3 is a clock circuit diagram of a GPS receiver in a command information terminal according to the present invention.

Explanation of symbols on the main parts of the drawings

211: TCXO213: GPS RF circuit part

214: ASIC part R21: level correction resistor

C21: DC component blocking capacitor R22: circuit protection and level compensation resistor

As a technical means for achieving the above object of the present invention, the circuit of the present invention is a clock circuit for providing a clock to the GPS receiver of the vehicle information terminal including a GPS RF circuit section, GPS baseband section and GPS baseband section A TCXO for generating a clock signal of 14.4 MHz; A level correction resistor for attenuating and correcting the level of the clock signal of the TCXO; A DC component blocking capacitor connected to the TCXO to block DC components; And a circuit protection and level correction resistor connected to the DC component blocking capacitor to attenuate and correct the level of the clock signal to protect the internal circuit of the GPS baseband unit. And an ASIC unit including a waveform converting unit converting the clock signal of the TCXO through the circuit protection and level correction resistor into a square wave, and a GPS baseband unit receiving the clock signal of the waveform converting unit.

Hereinafter, the configuration and operation of the clock circuit of the GPS receiver in the vehicle information terminal according to the present invention will be described in detail with reference to the accompanying drawings.

3 is a clock circuit diagram of a GPS receiver in a vehicle information terminal according to the present invention. Referring to FIG. 3, a clock circuit of a GPS receiver in a vehicle information terminal according to the present invention includes a GPS RF circuit unit 213 and a GPS baseband unit. It is configured to provide a clock to the GPS receiver of the vehicle information terminal including a.

The clock circuit of the GPS receiver according to the present invention includes a TCXO 211 for generating a clock signal of 14.4 MHz, a level correction resistor R21 for attenuating and correcting the level of the clock signal of the TCXO 211, and the TCXO. A direct current component blocking capacitor C21 for connecting to 211 to block a direct current component; And a circuit protection and level correction resistor R22 connected to the DC component blocking capacitor C21 to attenuate and correct the level of the clock signal to protect the internal circuit of the GPS baseband unit, and the circuit protection and level correction. A waveform converting unit for converting the clock signal of the TCXO 211 through the resistor R22 into a square wave and an ASIC unit 214 including a GPS baseband unit for receiving the clock signal of the waveform converting unit.

Operation of the preferred embodiment of the present invention configured as described above will be described in detail below based on the accompanying drawings.

The GPS RF circuit unit 213 of the GPS receiver provided with the present invention mixes a primary oscillation frequency of 41.82 MHz and a received GPS satellite signal of 1575.42 MHz to create a primary IF frequency of 1533.6 MHz, and again, the 1 of 1533.6 MHz. The secondary IF frequency is mixed with the secondary oscillation frequency of 1495.26MHz to generate a second IF frequency of 38.34Mhz, and the final sine frequency of 3.48MHz is supplied to the GPS baseband unit of the ASIC unit 214. Here, the primary and secondary oscillation frequencies are generated at a stable frequency by dividing and multiplying the provided stable clock signal. In addition, the GPS baseband unit of the ASIC unit 214 converts the intermediate frequency from the GPS RF circuit unit 113 with the oscillation frequency according to the clock signal to convert the baseband signal into a baseband signal to restore the original data.

For this operation, a clock signal should be provided to the GPS RF circuit unit 213 of the GPS receiver unit and the GPS baseband unit of the ASIC unit 214, respectively.

Referring to FIG. 2, the conventional clock circuit includes a TCXO 111 for generating a sawtooth clock signal of 14.4 MHz and an inverter circuit unit 112 for inverting the clock signal of the TCXO 111, which is the TCXO. (111) and the inverter circuit section 112 are manufactured and used as a single clock IC. When the clock IC is used, the circuit is complicated and the price increases by the inverter circuit section 112 of the clock IC. As a result, the product becomes less competitive.

Therefore, in the present invention, the TCXO is used instead of the conventional clock IC described above, and instead of the inverter, which is a conventional discrete component, the waveform conversion unit is ASIC, and in order to adjust the level of the clock signal output from the TCXO, Level adjusting resistors R21 and R22 are respectively connected to the GPS RF circuit section 213 and the ASIC section 214 on the GPS receiver section, and the GPS baseband sections of the GPS RF circuit section 213 and the ASIC section 214 are requested. To the desired level. Here, the GPS baseband unit of the GPS RF circuit unit 213 and the ASIC unit 214 recognizes a clock signal of a square wave, and recognizes a frequency by detecting a rising edge that is above a predetermined level or a falling edge that is below a certain level. At this time, the waveform conversion unit of the ASIC unit 214 converts the clock signal of the TCXO 211 through the circuit protection and level correction resistor R22 into a square wave to provide the GPS baseband unit.

As such, the clock signal of 14.4 MHz provided from the TCXO 211 of the present invention is provided to the GPS RF circuit unit 213 after the level is adjusted through the level correction resistor R21, and the level correction resistor R22. After the level is adjusted through the waveform conversion unit of the ASIC unit 214 is provided to the GPS baseband unit.

As such, the GPS baseband units of the GPS RF circuit unit 213 and the ASIC unit 214 may perform the above-described operations by the clock signal provided by the clock circuit of the present invention.

The GPS receiver to which the present invention is applied as described above may include a device or a unit for performing a GPS receiver function, and the present invention is not only a vehicle information terminal, but also a device requiring GPS location information, such as. Or to the system.

According to the present invention as described above, by implementing the waveform conversion unit in the ASIC with the GPS baseband unit without using an expensive inverter component, by providing a 14.4MHz clock required by the GPS receiver through the waveform conversion unit, a separate inverter component Since it is not used, it is miniaturized due to cost reduction and integration, and thus has a special effect of securing competitiveness.

The above description is only a description of specific embodiments of the present invention, and the present invention is not limited to these specific embodiments, and various changes and modifications of the configuration are possible from the above-described specific embodiments of the present invention. It will be apparent to those skilled in the art to which the present invention pertains.

Claims (1)

A clock circuit for providing a clock to a GPS receiver of a vehicular information terminal including a GPS RF circuit section 213 and a GPS baseband section. A TCXO 211 for generating a clock signal of 14.4 MHz; A level correction resistor (R21) for attenuating and correcting the level of the clock signal of the TCXO 211; A DC component blocking capacitor C21 connected to the TCXO 211 to block a DC component; A circuit protection and level correction resistor (R22) connected to the DC component blocking capacitor (C21) to attenuate and correct the level of the clock signal to protect the internal circuit of the GPS baseband unit; And An ASIC unit 214 including a waveform converter for converting the clock signal of the TCXO 211 through the circuit protection and level correction resistor R22 into a square wave, and a GPS baseband unit for receiving the clock signal of the waveform converter; Clock circuit of the GPS receiver in the vehicle information terminal, characterized in that provided.