KR20000047051A - Method for forming fine pattern of semiconductor device - Google Patents
Method for forming fine pattern of semiconductor device Download PDFInfo
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- KR20000047051A KR20000047051A KR1019980063803A KR19980063803A KR20000047051A KR 20000047051 A KR20000047051 A KR 20000047051A KR 1019980063803 A KR1019980063803 A KR 1019980063803A KR 19980063803 A KR19980063803 A KR 19980063803A KR 20000047051 A KR20000047051 A KR 20000047051A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
- H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
- H01L21/0274—Photolithographic processes
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- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
Abstract
Description
본 발명은 반도체 소자의 미세패턴 형성방법에 관한 것으로, 특히 콘택홀 감광막 패터닝시 라인/스페이스 패턴을 사용하므로써 기존 콘택홀 형성시 노광장비의 광 근접 효과(Optic Proximity Effect)에 의한 코너 라운딩(Corner Rounding) 현상을 제거하여 고해상도의 콘택홀 패턴을 형성할 수 있는 반도체 소자의 미세패턴 형성방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a fine pattern of a semiconductor device. In particular, corner rounding due to optical proximity effect of exposure equipment when forming a contact hole by using a line / space pattern in patterning a contact hole photoresist layer The present invention relates to a method of forming a fine pattern of a semiconductor device capable of forming a high-resolution contact hole pattern by removing a phenomenon.
일반적으로 노광장비를 이용한 콘택홀 패터닝을 위해 감광막을 노광하기 위한 종래의 방법은 빛의 광 근접효과에 의해 형성된 감광막 패턴은 현상 후 아래의 도 1 과 같이 모양으로 된다.In general, in the conventional method for exposing the photoresist film for contact hole patterning using exposure equipment, the photoresist pattern formed by the light proximity effect of light is shaped as shown in FIG. 1 after development.
즉, 상기 도 1 은 레티클(1)을 사용하여 웨이퍼(9)상에 감광막 패턴(11)을 형성한 상태를 도시한 도면이다.That is, FIG. 1 is a view showing a state in which the photosensitive film pattern 11 is formed on the wafer 9 using the reticle 1.
도면에 도시된 바와 같이, 형성된 감광막 패턴(11)은 실제 디자인된 레티클(1)상의 패턴(3)의 모양과는 다름을 알 수 있다. 즉 패턴(3)의 코너부가 라운딩되어 나타나게 된다.As shown in the figure, it can be seen that the formed photosensitive film pattern 11 is different from the shape of the pattern 3 on the actually designed reticle 1. That is, the corners of the pattern 3 appear rounded.
상기한 현상은 빛이 노광장비 광학계를 투과하여 웨이퍼(9)상의 감광막(13)을 분해시킬 때 광학 장비 특성에 기인한 광 근접효과의 영향으로 패턴 코너부분이 원형으로 형성이 되는 것이다. 이런 문제는 또한 구현하려는 콘택홀의 임계치수(Critical Demension ; 이하 'CD'라 함)의 변형을 유발시켜 웨이퍼상의 CD 불균일성을 초래하게 되며, 또한 구현하려는 콘택홀의 사이즈가 작아지면서 감광막 패터닝시 언더 디파인(Under define) 현상을 발생시켜 후속 공정의 진행을 어렵게 하여 반도체 소자의 제조공정 수율 및 신뢰성을 저하시키게 되는 문제점이 있다.The above phenomenon is that when the light passes through the optical system of exposure equipment and decomposes the photosensitive film 13 on the wafer 9, the pattern corner portion is formed in a circular shape under the influence of the optical proximity effect due to the characteristics of the optical equipment. This problem also causes deformation of the critical dimension of the contact holes to be implemented (hereinafter referred to as 'CD'), resulting in CD nonuniformity on the wafer. Under-development), which makes it difficult to proceed with subsequent processes, thereby lowering the manufacturing process yield and reliability of the semiconductor device.
따라서 본 발명은 상기한 종래의 문제점을 해결하기 위하여 안출된 것으로, 종래의 광 근접 효과의 영향을 많이 받는 콘택홀 패턴을 사용하지 않고 동일한 극성(Polarity)을 갖는 라인-스페이스 패턴을 사용함으로써 노광장비 광학계의 광 근접효과의 영향을 받지 않아 고해상력의 패턴을 형성할 수 있게하는 반도체 소자의 미세패턴 형성방법을 제공함에 그 목적이 있다.Accordingly, the present invention has been made to solve the above-mentioned problems, and the exposure apparatus by using a line-space pattern having the same polarity (Polarity) without using a contact hole pattern affected by the conventional optical proximity effect It is an object of the present invention to provide a method for forming a fine pattern of a semiconductor device which is capable of forming a pattern having a high resolution without being affected by the optical proximity effect of the optical system.
도 1 은 종래의 콘택홀 형성용 노광 마스크를 사용하여 웨이퍼상에 감광막 패턴을 형성한 상태를 도시한 도면1 is a view showing a state in which a photosensitive film pattern is formed on a wafer using a conventional exposure mask for forming a contact hole.
도 2a 내지 도 2f 는 본 발명의 방법에 따른 반도체 소자의 미세패턴 형성공정단계를 도시한 단면도2A to 2F are cross-sectional views illustrating a micropattern forming process step of a semiconductor device according to the method of the present invention.
<도면의 주요 부분에 대한 부호의 설명><Explanation of symbols for the main parts of the drawings>
1 : 콘택홀 형성용 레티클 3 : 설계 패턴1: Reticle for forming contact hole 3: Design pattern
5 : 석영기판 7 : 크롬 도포부5: quartz substrate 7: chromium coated part
9 : 웨이퍼 11 : 실제 감광막 패턴9: wafer 11: actual photoresist pattern
31 : 반도체 기판 33 : 네거티브형 감광막31 semiconductor substrate 33 negative photosensitive film
37 : 네거티브 감광막 패턴 39 : 포지티브형 감광막37: negative photosensitive film pattern 39: positive photosensitive film
35 : 수평방향의 라인-스페이스 패턴이 형성된 제1 노광마스크35: first exposure mask with horizontal line-space pattern formed
41 : 수직방향의 라인-스페이스 패턴이 형성된 제2 노광마스크41: second exposure mask having a line-space pattern in a vertical direction
상기 목적을 달성하기 위한 본 발명에 따른 반도체 소자의 미세패턴 형성방법은,Method for forming a fine pattern of a semiconductor device according to the present invention for achieving the above object,
반도체 기판의 상부에 네거티브형 레지스트를 도포하는 단계와,Applying a negative resist on top of the semiconductor substrate,
수평방향의 라인-스페이스 패턴이 형성된 제1 노광마스크를 이용하여 1차 노광을 실시하는 단계와,Performing primary exposure using a first exposure mask having a horizontal line-space pattern formed thereon;
현상공정으로 제1 감광막 패턴을 형성하는 단계와,Forming a first photoresist pattern by a developing process;
전체 구조 상부에 포지티브형 감광막을 도포하는 단계와,Applying a positive photosensitive film on top of the whole structure,
수직방향의 라인-스페이스 패턴이 형성된 제2 노광 마스크를 이용하여 2차 노광을 실시하는 단계와,Performing second exposure using a second exposure mask having a vertical line-space pattern formed thereon;
노광된 웨이퍼를 현상하여 사각형상의 콘택 패턴을 형성하는 단계를 포함한 구성으로 됨을 특징으로 한다.And developing the exposed wafer to form a rectangular contact pattern.
이하 첨부된 도면을 참조하여 본 발명에 따른 반도체 소자의 미세패턴 형성방법에 대해 상세히 설명한다.Hereinafter, a method of forming a fine pattern of a semiconductor device according to the present invention will be described in detail with reference to the accompanying drawings.
도 2a 내지 도 2f 는 본 발명의 방법에 따른 반도체 소자의 미세패턴 형성 공정단계를 도시한 단면도이다.2A through 2F are cross-sectional views illustrating a process of forming a micropattern of a semiconductor device according to the method of the present invention.
도 2a를 참조하면, 반도체 기판(31)의 상부에 네거티브형 레지스트(33)를 도포한다.Referring to FIG. 2A, a negative resist 33 is coated on the semiconductor substrate 31.
도 2b를 참조하면, 종래의 콘택홀 형성용 레티클대신 수평방향의 라인-스페이스 패턴이 형성된 제1 노광마스크(35)를 사용하여 1차 노광을 실시한다.Referring to FIG. 2B, the first exposure mask 35 is formed using a first exposure mask 35 having a horizontal line-space pattern instead of a conventional reticle for forming contact holes.
도 2b 의 (b)는 상기 수평방향의 패턴이 형성된 라인-스페이스 패턴(35)의 평면상태를 도시하고 있다.FIG. 2B (b) shows the planar state of the line-space pattern 35 on which the horizontal pattern is formed.
도 2c 를 참조하면, 현상공정으로 감광막 패턴을 형성한다. 이때 상기 네거티브 감광막(33)은 노광된 부분에 감광막(33)이 남고 비노광지역의 감광막은 제거된다.Referring to FIG. 2C, a photosensitive film pattern is formed by a developing process. In this case, the negative photoresist layer 33 remains on the exposed portion and the photoresist layer of the non-exposed area is removed.
도 2c 의 (b)는 상기 도 2c 의 (a) 의 평면도이다.(B) of FIG. 2C is a top view of (a) of said FIG. 2C.
도 2d 를 참조하면, 네거티브 감광막 패턴(37)이 형성된 구조의 전체 상부에 포지티브형 감광막(39)을 도포한다.Referring to FIG. 2D, the positive photosensitive film 39 is coated on the entire structure of the structure where the negative photosensitive film pattern 37 is formed.
도 2d 의 (b)는 상기 도 2d 의 (a) 의 평면도이다.(B) of FIG. 2D is a top view of (a) of said FIG. 2D.
도 2e를 참조하면, 상기 네거티브 감광막(23)을 노광할 경우와는 반대로 수직방향의 라인-스페이스 패턴이 형성된 제2 노광마스크(41)를 사용하여 2차 노광한다.Referring to FIG. 2E, a second exposure mask 41 having a line-space pattern in the vertical direction is secondarily exposed as opposed to the case where the negative photosensitive film 23 is exposed.
도 2e 의 (b)는 상기 도 2d 의 (a) 의 평면도이고 (c) 는 상기 수직방향의 라인-스페이스 패턴이 형성된 제2 노광마스크(41)의 평면상태를 도시한 도면이다.FIG. 2E (b) is a plan view of FIG. 2D (a) and (c) is a view showing the planar state of the second exposure mask 41 in which the vertical line-space pattern is formed.
도 2f 를 참조하면, 노광된 웨이퍼를 현상시키면 포지티브형 감광막(39)은 상기 네거티브형 감광막(33)과는 반대로 노광된 부분의 감광막이 제거된다. 이때 남아 있던 네거티브 감광막(37)은 이미 1차 노광을 완료한 상태이므로 2차 노광에는 영향이 없다. 따라서 함께 도시된 평면도 (b)에 도시된 것 처럼, 콘택홀 레티클을 사용하지 않고도 콘택홀 패터닝이 가능하며, 또한 코너부가 라운딩되는 현상은 자연적으로 해결할 수가 있다.Referring to FIG. 2F, when the exposed wafer is developed, the positive photosensitive film 39 is removed as opposed to the negative photosensitive film 33. At this time, since the negative photosensitive film 37 remaining has already completed the primary exposure, there is no effect on the secondary exposure. Therefore, as shown in the plan view (b) shown together, contact hole patterning is possible without using a contact hole reticle, and the phenomenon of rounding corners can be naturally solved.
이상 상기에서 살펴본 바와 같이, 본 발명은 감광막 콘택홀 패터닝시, 종래의 콘택홀 형성용 레티클 대신 라인-스페이스 패턴 형성용 레티클을 사용하여 광학장비의 광 근접 효과의 영향을 최소화하여 실제 디자인된 패턴과 거의 동일한 수준의 감광막 패턴을 형성할 수 있어 패턴의 CD 변형 문제를 해결하여 반도체 소자의 제조공정 수율을 향상시키고, 또한 캐패시터 용량을 증가시킬 수 있다.As described above, the present invention uses a reticle for forming a line-space pattern instead of a conventional contact hole forming reticle when patterning a photoresist contact hole, thereby minimizing the influence of the optical proximity effect of optical equipment and The photoresist pattern of almost the same level can be formed to solve the CD deformation problem of the pattern to improve the manufacturing process yield of the semiconductor device, and also to increase the capacitor capacity.
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KR100431992B1 (en) * | 2001-11-08 | 2004-05-22 | 주식회사 하이닉스반도체 | Method for forming bit line bottom plug of semiconductor device Using the reticle |
KR100843870B1 (en) * | 2006-07-14 | 2008-07-03 | 주식회사 하이닉스반도체 | Method for manufacturing fine pattern of a semiconductor device |
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KR20150010065A (en) | 2013-07-18 | 2015-01-28 | 삼성디스플레이 주식회사 | Method of forming an oxide semiconductor device, and method of manufacturing a display device having an oxide semiconductor device |
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JPS56125832A (en) * | 1980-03-07 | 1981-10-02 | Hitachi Ltd | Iris aperture for shaping in charged particle radiation device |
JP3253686B2 (en) * | 1991-10-04 | 2002-02-04 | 富士通株式会社 | Method of forming resist pattern |
JPH05175193A (en) * | 1991-12-24 | 1993-07-13 | Oki Electric Ind Co Ltd | Formation of circuit pattern of semiconductor device |
JPH05259018A (en) * | 1992-03-11 | 1993-10-08 | Mitsubishi Electric Corp | Resist pattern forming method |
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KR100431992B1 (en) * | 2001-11-08 | 2004-05-22 | 주식회사 하이닉스반도체 | Method for forming bit line bottom plug of semiconductor device Using the reticle |
KR100843870B1 (en) * | 2006-07-14 | 2008-07-03 | 주식회사 하이닉스반도체 | Method for manufacturing fine pattern of a semiconductor device |
US7883836B2 (en) | 2006-07-14 | 2011-02-08 | Hynix Semiconductor Inc. | Method for forming fine pattern with a double exposure technology |
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