KR20000026436A - Method for manufacturing thin-film micromirror array-actuated - Google Patents

Abstract

PURPOSE: A method for manufacturing thin-film micro mirror array-actuated is provided to minimize a modification stress provided to a mirror by relieving an inner stress occurred by a shrinkage of a photoresist. CONSTITUTION: A second sacrificial layer(300) is formed on an upper portion of an actuator(210) and a supporting element using an accuflo. The accuflo is coated on the upper portion of the actuator(210) and the supporting element and is removed by an asking method. A fourth photoresist (320) is coated on a upper portion of the second sacrificial layer. A hard mask(330) having an aluminum or an oxidation silicon(SiO2) is formed on the upper portion of the fourth photoresist (320). The hard mask(330) is patterned using a conventional photo etching method. The fourth photoresist (320) and the second sacrificial layer are patterned according to the pattern of the hard mask(330).

Description

Manufacturing method of thin film type optical path control device

The present invention relates to a method of manufacturing a thin film type optical path control apparatus using thin-film micromirror array-actuated (TMA), and more particularly, to a method of manufacturing a thin film type optical path control apparatus capable of increasing the light efficiency of incident light.

Optical path control devices or spatial light modulators for projecting optical energy onto the screen can be applied to a variety of applications such as optical communications, image processing and information display devices. Typically, image processing apparatuses using such an optical modulator are classified into a direct view type image display device and a projection type image display device according to a method of displaying optical energy on a screen.

An example of a direct-view image display device is a CRT (Cathode Ray Tube). The CRT device is called a CRT, which has excellent image quality but increases in weight and volume as the screen is enlarged, leading to an increase in manufacturing cost. There is. Projection type image displays include liquid crystal displays (LCDs), deformable mirror devices (DMDs), and AMAs. Such projection image display devices can be further divided into two groups according to their optical characteristics. That is, devices such as LCDs can be classified as transmit light modulators, while DMD and AMA can be classified as reflected light modulators.

Transmission optical modulators, such as LCDs, have a very simple optical structure, which makes them thinner, lighter in weight, and smaller in volume. However, due to the polarity of the light, the light efficiency is low, there is a problem inherent in the liquid crystal material, for example, there is a disadvantage that the response speed is slow and the inside is easy to overheat. In addition, the maximum light efficiency of existing transmission light modulators is limited in the range of 1-2% and requires dark room conditions to provide acceptable display quality. Therefore, optical modulators such as DMD and AMA have been developed to solve the above problems.

Although DMD shows a relatively good light efficiency of about 5%, the hinge structure employed in the DMD not only causes serious fatigue problems, but also requires a very complicated and expensive driving circuit. AMA reflects the light incident from the light source at a predetermined angle, and each mirror installed therein adjusts the luminous flux so that the reflected light is projected on the screen through an opening such as a slit or pinhole to form an image. Device. Therefore, its structure and operation principle are simple, and high light efficiency (more than 10% light efficiency) can be obtained compared to LCD or DMD. In addition, the contrast of the image projected on the screen is improved to obtain a brighter and clearer image.

These AMA devices are largely divided into bulk type and thin film type. The bulk optical path control device is disclosed in US Pat. No. 5,085,497 to Gregory Um et al. The bulk optical path adjusting device is made by thinly cutting a multilayer ceramic to mount a ceramic wafer having a metal electrode formed therein in an active matrix in which a transistor is embedded, and then processing by using a sawing method and installing a mirror on the top. However, the bulk optical path control device requires very high precision in design and manufacturing, and has a disadvantage in that the response of the strained layer is slow.

Accordingly, a thin film type optical path control device (TMA) that can be manufactured using a semiconductor manufacturing process has been developed. Such a thin film type optical path control device is disclosed in Korean Patent Application No. 98-26308 (name of the invention: a method of manufacturing a thin film type optical path control device) filed by the applicant of the Korean Patent Office on June 30, 1998.

FIG. 1 shows a perspective view of a thin film type optical path adjusting device described in the above prior application, and FIG. 2 shows a cross-sectional view of the device of FIG. 1 taken along line A ₁ -A ₂ .

1 and 2, the thin film type optical path adjusting device includes an active matrix 1, a support element 75 formed on the active matrix, an actuator 90 formed on the support element 75, and an actuator. A mirror 99 formed on top of 90.

The active matrix 1 includes a substrate 2 having M × N (M, where N is a natural number) P-MOS transistors 10, a drain 3 and a source 5 of the P-MOS transistors 10. ), The first metal layer 20 formed on the substrate 2, the first protective layer 25, the second metal layer 30, and the second protective layer sequentially formed on the first metal layer 20. 35 and an etch stop layer 40.

The support element 75 is formed of a support line 74 formed on top of the active matrix 1, a support layer 73 formed integrally with the support line 74 and having a rectangular ring shape, and a support of the support layer 73. The first anchor 71 and the second anchors 72a and 72b respectively contact the active matrix 1 below the portion adjacent to the line 74 to support the support layer 73.

The actuator 90 has a mirror-shaped 'c' shape with respect to the support line 74 and is formed on the support layer 73. The actuator 90 includes a lower electrode 80, a first strained layer 82, a second strained layer 83, a first upper electrode 85, and a second upper electrode 86. The lower electrode 80 has a mirror-shaped 'c' shape spaced apart from the support line 74 by a predetermined distance, and protruding portions are stepped toward the first anchor 71 on one side of the lower electrode 80. Are formed corresponding to each other. The protrusions of the lower electrode 80 respectively extend to the circumference of the via hole formed in the first anchor 71.

The mirror 99 is centrally supported by the post 98 and both sides thereof are horizontally formed on the upper part of the actuator 90 via the second air gap 97.

Hereinafter, a method of manufacturing the above-described thin film type optical path control apparatus will be described with reference to the drawings.

3A to 3D are views for explaining a method of manufacturing the apparatus shown in FIGS. 1 and 2.

Referring to FIG. 3A, a device isolation layer 15 is formed on a substrate 2, which is an n-type doped silicon wafer, by using a silicon partial oxidation method (LOCOS) to distinguish between an active region and a field region. Subsequently, a gate 16 made of a conductive material such as poly-silicon is formed on the active region, and then p ⁺ source 5 and drain 3 are formed using an ion implantation process. Thus, M x N (M and N are integer) P-MOS transistors 10 are formed on the substrate 2.

After the insulating film 17 made of oxide is formed on the substrate 2 on which the P-MOS transistor 10 is formed, the upper portion of one side of the source 5 and the drain 3 is exposed using a photolithography method. Form a hole (not shown). Subsequently, after depositing the first metal layer 20 made of titanium, titanium nitride, tungsten, nitride, or the like on the resultant, the first metal layer 20 is patterned by photolithography. The patterned first metal layer 20 includes a drain pad extending from the drain 3 of the P-MOS transistor 10 to the first anchor 71 supporting the support layer 73.

On top of the substrate 2 on which the first metal layer 20 and the transistor 10 are formed, there is a first protective layer 25 which prevents damage to the substrate 2 having the transistor 10 embedded therein during a subsequent process. Is formed. The first protective layer 25 is formed of phosphorous silicate (PSG) to have a thickness of 8000 kPa by chemical vapor deposition (CVD).

Since light incident from the light source is incident on the upper portion of the first protective layer 25 as well as the mirror 99, the light current flows through the active matrix 1 so that the device The second metal layer 30 is formed to prevent the malfunction. The second metal layer 30 is composed of a titanium layer and a titanium nitride layer. The titanium layer is formed to have a thickness of 300 kW using a sputtering method, and the titanium nitride layer is formed to have a thickness of 1200 kW using a physical vapor deposition (PVD) method on the titanium layer. Subsequently, a portion of the second metal layer 30 in which the via hole 50 is to be formed in a subsequent process, that is, a portion in which the drain pad of the first metal layer 20 is formed is etched to the second metal layer 30. Form a hole (not shown).

On top of the second metal layer 30 a second protective layer 35 is laminated which prevents damage to the substrate 2 and the resulting products formed on the substrate 2 during subsequent processing. The second protective layer 35 is formed of phosphorous silicate (PSG) to have a thickness of 2000 kPa by a chemical vapor deposition method.

An upper portion of the second passivation layer 35 is stacked on the second passivation layer 35 and the etch stop layer 40 which prevents the products on the active matrix 1 from being etched due to a subsequent etching process. The etch stop layer 40 is made of low temperature oxide (LTO) such as silicon oxide (SiO ₂ ) or phosphorus pentoxide (P ₂ O ₅ ). The etch stop layer 40 is formed to have a thickness of 0.2-0.8 μm at a temperature of 350-450 ° C. by low pressure chemical vapor deposition (LPCVD). Accordingly, the substrate 2 having the transistor 10 embedded therein, the first metal layer 20, the first protective layer 25, the second metal layer 30, the second protective layer 250, and the etch stop layer 40 may be formed. The active matrix 1 containing is completed.

A first sacrificial layer 45 is formed on the etch stop layer 40 to facilitate the stacking of the thin films constituting the actuator 90. The first sacrificial layer 45 is formed of polysilicon so as to have a thickness of 2.0 to 3.0 μm by a low pressure chemical vapor deposition (LPCVD) method at a temperature of 500 ° C. or less. Subsequently, the surface of the first sacrificial layer 45 is polished using a chemical mechanical polishing (CMP) method to planarize the surface of the first sacrificial layer to have a thickness of 1.1 μm.

Subsequently, after applying and patterning a first photoresist (not shown) on top of the first sacrificial layer 45, the first photoresist is used as a mask and below the first sacrificial layer 45. The first anchors 71 and the second supporting the supporting layer 73 are formed by etching the portions in which the holes of the second metal layer 30 and the portions adjacent to both sides are etched to expose a portion of the etch stop layer 40. Make the position where anchors 72a and 72b are to be formed. Accordingly, the etch stop layer 40 is exposed in the shape of three squares spaced apart by a predetermined distance. Then, the first photoresist is removed.

Referring to FIG. 3B, the first layer 69 is stacked on the upper portion of the etch stop layer 40 and the first sacrificial layer 45 exposed in the shape of a quadrangle as described above. The first layer 69 is formed to have a thickness of 0.1 to 1.0 μm of a hard material such as nitride or metal by low pressure chemical vapor deposition (LPCVD). The first layer 69 is later patterned with a support element 75 comprising a support layer 73, a support line 74 and anchors 71, 72a, 72b.

The lower electrode layer 79 is stacked on top of the first layer 69. The lower electrode layer 79 is formed of a metal such as platinum (Pt), tantalum (Ta), or platinum-tantalum (Pt-Ta) to have a thickness of 0.1 to 1.0 μm using a sputtering method or a chemical vapor deposition method. The lower electrode layer 79 is later applied with a first signal (image signal) from the outside, respectively, and is patterned as a mirror-shaped 'c' shaped lower electrode 80 having stepped protrusions formed on one side thereof.

A second layer 59 made of a piezoelectric material such as PZT or PLZT is stacked on the lower electrode layer 79. Preferably, the second layer 59 is formed to have a thickness of 0.4 μm by sputtering PZT produced by the sol-gel method. Subsequently, the piezoelectric material constituting the second layer 59 is subjected to heat treatment by a rapid heat treatment (RTA) method to cause phase shift. The second layer 59 has a lower portion of the first strained layer 82 and the second upper electrode 86 and the lower portion which are later deformed by a first electric field generated between the first upper electrode 85 and the lower electrode 80. The second strained layer 83 causes deformation by the second electric field generated between the electrodes 80.

The upper electrode layer 87 is stacked on top of the second layer 59. The upper electrode layer 87 is formed of a metal such as platinum, tantalum, silver (Ag), or platinum-tantalum to have a thickness of 0.1 to 1.0 µm using a sputtering method or a chemical vapor deposition method. The upper electrode layer 87 is later patterned with first and second upper electrodes 85 and 86, each of which is applied a second signal (bias signal) and are spaced apart by a predetermined distance.

Referring to FIG. 3C, after applying and patterning a second photoresist (not shown) on the upper electrode layer 87, each of the upper electrode layers 87 may be formed by using the second photoresist as a mask. The first and second upper electrodes 85 and 86 have a shape, preferably, a rectangular flat plate and are formed to be spaced apart from each other by a predetermined distance (see FIG. 1). The second signal is applied to the first and second upper electrodes 85 and 86 through a common electrode line 77 formed later from the outside, respectively. Then, the second photoresist is removed.

Subsequently, the second layer 59 is patterned in the same manner as the method of patterning the upper electrode layer 87 to form a rectangular flat plate, and the first and second strained layers formed side by side with a predetermined distance apart from each other. (82, 83) are formed. In this case, as shown in FIG. 1, the first and second deformable layers 82 and 83 are patterned to have the shape of a rectangular flat plate having a slightly larger area than the first and second upper electrodes 85 and 86, respectively. .

Subsequently, the lower electrode layer 79 is patterned in the same manner as the method of patterning the upper electrode layer 87 to have a mirror-shaped 'c' shape for the support line 74 formed later, and the first anchor 71 may be formed. To form a lower electrode 80 having protrusions formed stepwise. In this case, the two arms of the lower electrode 80 have a rectangular planar shape with a larger area than the first and second deforming layers 82 and 83, respectively. In addition, when the lower electrode layer 79 is patterned, the common electrode line 77 is formed simultaneously with the lower electrode 80 in a direction perpendicular to the lower electrode 80 on one side of the first layer 69. The common electrode line 77 is formed to be spaced apart from the lower electrode 80 by a predetermined distance on the support line 74 formed later. Thus, the actuator 90 including the first and second upper electrodes 85 and 86, the first and second strained layers 82 and 83, and the lower electrode 80 is completed.

Subsequently, the first layer 69 is patterned to form a support element 75 comprising a support layer 73, a support line 74, a first anchor 71 and second anchors 72a, 72b. . At this time, both sides of the portion of the first layer 69 contacting the etch stop layer 40 exposed in the shape of the three quadrangles are the second anchors 72a and 72b, and the center portion of the first layer 69 is the first anchor 71. ) The first anchor 71 and the second anchors 72a and 72b each have a rectangular box shape, and a hole of the second metal layer 30 and a hole of the first metal layer 20 are disposed below the first anchor 71. A drain pad is formed.

The first and second deformable layers 82 and 83 are formed parallel to each other on two arms horizontally extending in a direction orthogonal to the support line 74 of the support layer 73, respectively. Accordingly, the first anchor 71 is formed below the mirror-shaped 'c' shaped lower electrode 80, and the second anchors 72a and 72b are formed on the outer lower portion of the lower electrode 80, respectively. .

Subsequently, a third photoresist (not shown) is applied and patterned on top of the support element 75 and the actuator 90 including the support layer 73 and the support line 74 to support the line 74. Portions of the first and second upper electrodes 85 and 86 are exposed from the common electrode line 77 formed on the substrate. At this time, even the protrusion of the lower electrode 80 is exposed together from the first anchor 71.

Subsequently, by depositing and patterning amorphous silicon or silicon oxide or phosphorus pentoxide, which is a low temperature oxide, on the exposed portion, the first strained layer 82 and the lower electrode (a part of the first upper electrode 85) may be formed. The first insulating layer 65 is formed through the 80 to a part of the support layer 73, and at the same time, the support layer (via the second strained layer 83 and the lower electrode 80 from a part of the second upper electrode 86). The second insulating layer 66 is formed up to a part of 73. The first and second insulating layers 65 and 66 are formed to have a thickness of 0.2 to 0.4 mu m, respectively, using low pressure chemical vapor deposition (LPCVD).

Subsequently, the first anchor 71, the etch stop layer 40, and the first anchor 71 are formed from a central portion of the first anchor 71, which is a portion where the hole of the second metal layer 30 and the drain pad of the first metal layer 20 are formed below. 2 to form the via hole 50 to the drain pad by etching the protective layer 35 and the first protective layer 25, and then via the via hole 50 to the protrusion of the lower electrode 80. A contact 89 is formed (see FIG. 1). At the same time, the first upper electrode connecting member 67 is formed from the first upper electrode 85 to the common electrode line 77 through a portion of the first insulating layer 65 and the supporting layer 73, and the second upper electrode The second upper electrode connecting member 68 is formed from the 86 through the second insulating layer 66 and the support layer 73 to the common electrode line 77.

After the via contact 89 and the first and second upper electrode connecting members 67 and 68 are deposited with platinum, tantalum or platinum-tantalum to have a thickness of 0.1 to 0.2 탆 by sputtering or chemical vapor deposition, respectively, The deposited metal is formed by patterning. The first and second upper electrode connecting members 67 and 68 connect the first and second upper electrodes 85 and 86 and the common electrode line 77, respectively, and the lower electrode 80 connects the via contact 89. It is connected to the drain pad of the first metal layer 20 through.

Referring to FIG. 3D, a second sacrificial layer 95 is formed using an accuflo on top of the actuator 90 and the support element 75. The second sacrificial layer 95 made of accucu is applied on top of the actuator 90 and the support element 75 using a spin coating method and subsequently removed using an ashing method.

Subsequently, a hard mask 93 made of aluminum or silicon oxide (SiO ₂ ) is formed on the second sacrificial layer 95 to form the mirror 99 and the post 98. After the hard mask 93 is patterned by an etching method, the second sacrificial layer 95 is patterned along the pattern of the hard mask 93 so that the support line 74 and the lower electrode 80 of the '?' A portion of the portion which is not adjacent and formed in parallel (that is, the portion where the first and second upper electrodes 85 and 86 are not formed thereon) is exposed. The hard mask 93 is formed by the sputtering method or the chemical vapor deposition method using the same aluminum as the mirror 99 formed later.

Next, a portion of the exposed lower electrode 80 and a metal such as aluminum (Al) having excellent reflectivity on the upper portion of the hard mask 93 have a thickness of about 0.1 to 1.0 mu m using a sputtering method or a chemical vapor deposition method. And the patterned metal to form a mirror 99 having a rectangular flat plate shape and a post 98 supporting the mirror 99 at the same time.

After the second sacrificial layer 95 is removed by a plasma ashing method, the first sacrificial layer 45 is removed using xenon fluoride (XeF ₂ ) or bromine fluoride (BrF ₂ ), and cleaning and drying are performed. Performed to complete the TMA device as shown in FIG. As described above, when the second sacrificial layer 95 is removed, the second air gap 97 is formed at the position of the second sacrificial layer 95, and when the first sacrificial layer 45 is removed, the first sacrificial layer 45 is removed. The first air gap 47 is formed at the position of.

However, in the above-described manufacturing method of the thin film type optical path control device, the periphery of the mirror is upward due to the internal stress caused by shrinkage of the second sacrificial layer during the patterning of the second sacrificial layer made of accucu. The problem of bending occurs. As described above, a mirror curved at its periphery is difficult to constantly reflect light, and as a result, the efficiency is significantly lowered, resulting in a problem of deteriorating the image quality of the image projected on the screen.

Accordingly, it is an object of the present invention to provide a method of manufacturing a thin film type optical path control apparatus which can improve the light efficiency by compensating the stress generated in the mirror during the mirror formation, thereby increasing the horizontal degree of the mirror.

1 is a perspective view of a thin film type optical path adjusting device described in the applicant's prior application.

FIG. 2 is a cross-sectional view of the apparatus shown in FIG. _{1 taken along} lines A ₁ -A ₂ .

3A to 3D are manufacturing process diagrams of the apparatus shown in FIG.

Figure 4 is a perspective view of a thin film type optical path control apparatus according to the present invention.

FIG. 5 is a cross-sectional view of the apparatus shown in FIG. _{4 taken along} line B ₁ -B ₂ .

6A to 6F are manufacturing process diagrams of the apparatus shown in FIG.

<Explanation of symbols for main parts of the drawings>

100: active matrix 101: substrate

120: transistor 135: first metal layer

140: first protective layer 145: second metal layer

150: second protective layer 155: etch stop layer

160: first sacrificial layer 170: support layer

171: first anchor 172a, 172b: second anchor

174: support line 175: support element

180: lower electrode 190, 191: first and second strained layers

200, 201: first and second upper electrodes 210: actuator

220, 221: first and second insulating layers

230, 231: first and second upper electrode connection members

250: Post 260: Mirror

270: Beer Hall 280: Beer Contact

300: second sacrificial layer 310: second air gap

320: fourth photoresist 330: hard mask

In order to achieve the object of the present invention described above, the present invention provides a method of manufacturing a thin film type optical path control device comprising the step of providing an active matrix, forming an actuator, forming a support element, and forming a mirror. to provide. An MOS transistor is embedded in the active matrix, and a first metal layer having a drain pad extending from the drain of the transistor is formed. The actuator and the support element are formed by forming a first layer, a lower electrode layer, a second layer and an upper electrode layer on top of the active matrix, and then patterning them sequentially from the upper electrode layer. The actuator includes a first and a second upper electrode, a first and a second deformable layer, and a lower electrode, wherein the support element includes a support layer, a support line, and a first anchor and a second anchor formed by patterning the first layer. It includes. The forming of the mirror may include forming a second sacrificial layer and a photoresist on the support means and the actuator, depositing a metal on the photoresist to form a hard mask, and forming the hard mask and the photoresist. After patterning the second sacrificial layer, the exposed photoresist is baked at a temperature of about 140 to 160 ° C. for about 10 to 30 minutes, and a mirror and the mirror are supported on the hard mask. By simultaneously forming posts.

According to the present invention, a photoresist and a hard mask are formed on the second sacrificial layer, patterned sequentially from the hard mask, and then baked at a temperature of about 140 to 160 ° C. for about 10 to 30 minutes. do. Thus, the stress applied to the mirror due to the shrinkage of the photoresist generated during patterning can be alleviated, thereby forming a flat mirror without warpage. Accordingly, the light efficiency of the incident light incident on the mirror from the light source can be increased.

Hereinafter, a thin film type optical path adjusting apparatus according to a preferred embodiment of the present invention will be described in detail with reference to the accompanying drawings.

Figure 4 shows a perspective view of a thin film type optical path control apparatus according to the present invention, Figure 5 shows a cross-sectional view of the device of Figure 4 cut along the line B ₁ -B ₂ .

4 to 5, the thin film type optical path adjusting device according to the present invention includes an active matrix 100, a support element 175 formed on the active matrix 100, and an actuator formed on the support element 175. 210 and a mirror 260 formed on the actuator 210.

The active matrix 100 includes a substrate 101 having M × N (M, N is an integer) P-MOS transistors 120, a drain 105 and a source 110 of the P-MOS transistors 120. Extending from the first metal layer 135 formed on the substrate 101, the first protective layer 140 formed on the first metal layer 135, and the second metal layer formed on the first protective layer 140. 145, a second passivation layer 150 formed on the second metal layer 145, and an etch stop layer 155 formed on the second passivation layer 150.

Referring to FIG. 4, the support element 175 includes a support line 174, a support layer 170, a first anchor 171, and second anchors 172a, 172b. The support line 174 and the support layer 170 are horizontally formed on the etch stop layer 155 through the first air gap 165. A common electrode line 240 is formed on a portion of the support line 174, and the support line 174 serves to support the common electrode line 240.

The support layer 170 has a rectangular annular shape, preferably a rectangular annular shape, and is integrally formed with the support line 174 along a direction orthogonal to the support line 174 in the same plane. The first anchor 171 is integrally formed with the two arms in the lower portion between the two arms horizontally extending in the direction orthogonal to the support line 174 of the support layer 170 having a rectangular ring shape to prevent the etch stop layer. The second anchors 172a and 172b may be integrally formed with the two arms and attached to the etch stop layer 155 at an outer lower portion of the two arms. The first anchor 171 and the second anchors 172a and 172b each have the shape of a rectangular box.

The support layer 170 is centrally supported by the first anchor 171 and both sides are supported by the second anchors 172a and 172b, so that the cross-sections of the support layer 170 and the anchors 171, 172a and 172b As shown in FIG. 5, it has a 'T' shape.

The first anchor 171 is formed on a portion in which the drain pad of the first metal layer 135 is formed below the etch stop layer 155. In the central portion of the first anchor 171, the first metal layer may be formed through the etch stop layer 155, the second passivation layer 150, the holes (not shown) of the second metal layer 145, and the first passivation layer 140. The via hole 270 is formed to the drain pad of the 135, and the via contact 280 is formed inside the via hole 270.

The actuator 210 has a mirror-shaped 'c' shape with respect to the support line 174 and is formed on the support layer 170. The actuator 210 includes a lower electrode 180, a first strained layer 190, a second strained layer 191, a first upper electrode 200, and a second upper electrode 201. The lower electrode 180 has a mirror-shaped 'c' shape spaced apart from the support line 174 by a predetermined distance, and protruding portions are stepped toward the first anchor 171 on one side of the lower electrode 180. Are formed corresponding to each other. Protrusions of the lower electrode 180 extend to the periphery of the via hole 270 formed in the first anchor 171, respectively.

The via contact 280 is formed from the drain pad to the protrusion of the lower electrode 180 through the via hole 280 to electrically connect the drain pad and the lower electrode 180.

The two arms of the lower electrode 180 each have a shape of a rectangular plate, and the first and second deformable layers 190 and 191 each have a shape of a rectangular plate having a smaller area than the two arms of the lower electrode 180. And is formed on top of the two arms of the lower electrode 180. In addition, the first and second upper electrodes 200 and 201 have a shape of a rectangular flat plate having a smaller area than the first and second deformable layers 190 and 191, respectively, and the first and second deformable layers 190 and 191. It is formed at the top of the.

The first insulating layer 220 is formed from one side of the first upper electrode 200 to a part of the support layer 170 through the first deforming layer 190 and the lower electrode 180, and the first upper electrode 200. The first upper electrode connecting member 230 is formed from one side of the first insulating layer 220 and the support layer 170 to the common electrode line 240. The first upper electrode connection member 230 connects the first upper electrode 200 and the common electrode line 240 to each other, and the first insulating layer 220 may include the first upper electrode 200 and the lower electrode 180. They are connected to each other to prevent electrical shorts.

In addition, a second insulating layer 221 is formed from one side of the second upper electrode 201 to a part of the support layer 170 through the second deforming layer 191 and the lower electrode 180. The second upper electrode connection member 231 is formed from one side of the second upper electrode 201 to the common electrode line 240 through a portion of the second insulating layer 221 and the support layer 170. The second insulating layer 221 and the second upper electrode connecting member 231 are formed to be parallel to the first insulating layer 220 and the first upper electrode connecting member 230, respectively. The second upper electrode connecting member 231 connects the second upper electrode 201 and the common electrode line 240 to each other, and the second insulating layer 221 is formed by the second upper electrode 201 and the lower electrode 180. They are connected to each other to prevent electrical shorts.

The post 250 supporting the mirror is a part of the mirror-shaped 'c'-shaped lower electrode 180 where the first and upper electrodes 200 and 201 are not formed, that is, formed side by side with respect to the support line 174. Is formed. A hard mask 330 having the same shape and size as the mirror 260 is formed between the post 250 and the mirror 260, and a mirror 260 is formed on the hard mask 330. do. The mirror 260 and the hard mask 330 are centrally supported by the post 250, and both sides thereof are horizontally formed on the actuator 210 via the second air gap 310. The mirror 260 serves to reflect light incident from a light source (not shown) at a predetermined angle.

In the above-described thin film type optical path control apparatus according to the present invention, the first signal transmitted from the outside is the MOS transistor 120 embedded in the active matrix 100, the drain pad of the first metal layer 135 and the via contact 280. The second signal is applied to the lower electrode 180, and at the same time, a second signal is applied to the first and second upper electrodes 200 and 201 through the common electrode line 240 from the outside, respectively, so that the first upper electrode 200 is applied. The first electric field is generated between the and the lower electrode 180 according to the potential difference, and the second electric field is generated between the second upper electrode 201 and the lower electrode 180 according to the potential difference. The first strained layer 190 formed between the first upper electrode 200 and the lower electrode 180 causes deformation by the first electric field, and simultaneously the second upper electrode 201 and the lower part by the second electric field. The second strained layer 191 formed between the electrodes 180 causes deformation.

As the first and second deformable layers 190 and 191 contract in directions perpendicular to the first and second electric fields, respectively, the actuator 210 including the first deformable layer 190 may be at a predetermined angle. Bent. The mirror 260 reflecting the light incident from the light source is inclined together with the actuator 210 because the mirror 260 is supported by the hard mask 330 and the post 250 and is formed on the actuator 210. Accordingly, the mirror 260 reflects incident light at a predetermined angle, and the reflected light passes through the slit to form an image on the screen.

Hereinafter, a method of manufacturing a thin film type optical path control device according to the present invention will be described in detail with reference to the drawings.

6A to 6F are diagrams for describing a method of manufacturing the apparatus shown in FIG. 5. 6A to 6F, the same reference numerals are used for the same members as in FIG.

Referring to FIG. 6A, a device isolation layer 125 is formed on a substrate 101, which is a wafer made of silicon doped with n-type, by using a silicon partial oxidation method (LOCOS) to distinguish between an active region and a field region. Subsequently, after forming the gate 115 made of a conductive material such as polycrystalline silicon doped with impurities on the active region, the p ⁺ source 110 and the drain 105 are formed using an ion implantation process. M × N (M, N is an integer) P-MOS transistors 120 are formed on the substrate 101.

After the insulating film 130 made of oxide is formed on the P-MOS transistor 120 formed thereon, the upper side of one side of the source 110 and the drain 105 by using a photolithography method on the insulating film 130, respectively. A hole (not shown) is formed to expose. Subsequently, after depositing the first metal layer 135 made of titanium, titanium nitride, tungsten, nitride, or the like on the insulating layer 130 on which the hole is formed, the first metal layer 135 is patterned by a photolithography method. The patterned first metal layer 135 includes a drain pad extending from the drain 105 of the P-MOS transistor 120 to the bottom of the first anchor 171 formed later.

The first passivation layer 140 is stacked on the substrate 101 on which the first metal layer 135 and the transistor 120 are formed. The first protective layer 140 is formed of a silicate glass (PSG) to have a thickness of about 8000 kPa using a chemical vapor deposition (CVD) method. The first protective layer 140 prevents the substrate 101 having the P-MOS transistor 120 from being damaged due to a subsequent process.

The second metal layer 145 is formed on the first protective layer 140. The second metal layer 145 forms a titanium layer having a thickness of about 300 kV using a sputtering method of titanium, and then forms a titanium nitride layer on the titanium layer using a physical vapor deposition (PVD) method. It is completed by. Since the light incident from the light source is incident on the second metal layer 145 not only the mirror 260 but also a portion other than the portion covered by the mirror 260, photocurrent flows through the active matrix 100, causing the device to malfunction. To prevent them. Subsequently, a portion of the second metal layer 145 in which the via hole 270 is to be formed in a subsequent process, that is, a portion in which the drain pad of the first metal layer 135 is formed is etched into the second metal layer 145. Holes (not shown) are formed.

The second passivation layer 150 is stacked on the second metal layer 145. The second protective layer 150 is formed of a silicate glass (PSG) to have a thickness of about 2000 kPa using a chemical vapor deposition method. The second protective layer 150 prevents the substrate 101 and the resulting products formed on the substrate 101 from being damaged during subsequent processing.

An etch stop layer 155 is stacked on the second passivation layer 150. The etch stop layer 155 prevents the second passivation layer 150 and the products on the substrate 101 from being etched due to the subsequent etching process. The etch stop layer 155 is made of low temperature oxide (LTO) such as silicon oxide (SiO ₂ ) or phosphorus pentoxide (P ₂ O ₅ ). The etch stop layer 155 is formed to have a thickness of about 0.2 to 0.8 μm at a temperature of about 350 to 450 ° C. using a low pressure chemical vapor deposition (LPCVD) method. Accordingly, an active layer including a substrate 101 having a transistor embedded therein, a first metal layer 135, a first passivation layer 140, a second metal layer 145, a second passivation layer 150, and an etch stop layer 155. The matrix 100 is completed.

The first sacrificial layer 160 is stacked on the etch stop layer 155. The first sacrificial layer 160 serves to facilitate stacking of the thin films constituting the actuator 210. The first sacrificial layer 160 is formed to have a thickness of about 2.0 to 3.0 μm by using a low pressure chemical vapor deposition (LPCVD) method at a temperature of less than 500 ℃ polysilicon. Subsequently, the surface of the first sacrificial layer 160 is polished using a chemical mechanical polishing (CMP) method to planarize the surface of the first sacrificial layer 160 to have a thickness of about 1.1 μm.

6B is a plan view illustrating a state in which the first sacrificial layer 160 is patterned. Referring to FIG. 7B, after applying and patterning a first photoresist (not shown) on the first sacrificial layer 160, the first sacrificial layer 160 is formed using the first photoresist as a mask. The second metal layer 145 has a hole (not shown) formed below and the portions adjacent to both sides are etched to expose a portion of the etch stop layer 155, thereby supporting the support layer 170 formed later. The position where the first anchor 171 and the second anchors 172a and 172b are to be formed is made. Therefore, the etch stop layer 155 is exposed in the shape of three squares spaced apart by a predetermined distance. Subsequently, the first photoresist is removed.

Referring to FIG. 6C, the first layer 169 is stacked on the upper portion of the etch stop layer 155 and the first sacrificial layer 160 exposed in the shape of a quadrangle as described above. The first layer 169 is formed to have a thickness of about 0.1 to 1.0 μm using a low pressure chemical vapor deposition (LPCVD) method of a hard material such as nitride or metal. The first layer 169 is later patterned with a support element 175 that includes a support layer 170, a support line 174, and anchors 171, 172a, 172b.

The lower electrode layer 179 is stacked on top of the first layer 179. The lower electrode layer 179 has a thickness of about 0.1 to 1.0 μm by sputtering or chemical vapor deposition using a metal having an electrical conductivity such as platinum (Pt), tantalum (Ta), or platinum-tantalum (Pt-Ta). Form to have. The lower electrode layer 179 is later applied with a first signal (image signal) from the outside and patterned into a lower electrode 180 having a mirror-shaped 'c' shape.

A second layer 189 made of a piezoelectric material such as PZT or PLZT is stacked on the lower electrode layer 179. Preferably, the second layer 189 is formed by spin coating PZT prepared by the sol-gel method to have a thickness of about 0.4 μm. Subsequently, the piezoelectric material constituting the second layer 189 is subjected to heat treatment by a rapid heat treatment (RTA) method to perform phase change. The second layer 189 is later formed with the first strained layer 190 and the second upper electrode 210 and the lower portion which are deformed by a first electric field generated between the first upper electrode 200 and the lower electrode 180. It is patterned into a second strained layer 191 causing strain by a second electric field generated between the electrodes 180.

The upper electrode layer 199 is stacked on top of the second layer 189. The upper electrode layer 199 is formed of a metal having electrical conductivity such as platinum, tantalum, silver, or platinum-tantalum to have a thickness of about 0.1 μm to 1.0 μm using a sputtering method or a chemical vapor deposition method. The upper electrode layer 199 is later patterned with the first and second upper electrodes 200 and 201 that are each applied with a second signal (bias signal) and are spaced apart by a predetermined distance.

Referring to FIG. 6D, after applying and patterning a second photoresist (not shown) on the upper electrode layer 199, the upper electrode layer 199 may be squared using the second photoresist as a mask. The first upper electrode 200 and the second upper electrode 201 have a shape of a flat plate, preferably a rectangular flat plate, and are separated from each other by a predetermined distance and formed side by side. The second signal is applied to the first and second upper electrodes 200 and 201 through the common electrode line 240 formed later from the outside, respectively. Subsequently, the second photoresist is removed.

Subsequently, the second deformable layer 190 is patterned in the same manner as the method of patterning the upper electrode layer 199, and each of the first deformable layer 190 is formed to have a rectangular shape and is separated by a predetermined distance from each other, and The second strained layer 191 is formed. In this case, as shown in FIG. 4, the first and second strained layers 190 and 191 are patterned to have a rectangular flat plate shape slightly wider than the first and second upper electrodes 200 and 201, respectively.

Subsequently, the lower electrode layer 179 is patterned in the same manner as the patterning of the upper electrode layer 199 to have a mirror-shaped 'c' shape for the support line 174 formed later, and the first anchor 171 may be formed. Toward the bottom electrode 180 having a protrusion formed in a stepped manner. In this case, the two arms of the lower electrode 180 have the shape of a rectangular plate having a larger area than the first and second deforming layers 190 and 191, respectively.

In addition, when the lower electrode layer 179 is patterned, the common electrode line 240 is simultaneously formed with the lower electrode 180 in a direction perpendicular to the lower electrode 180 on one side of the first layer 169. The common electrode line 240 is formed to be spaced apart from the lower electrode 180 by a predetermined distance on the support line 174 formed later. Accordingly, the actuator 210 including the first and second upper electrodes 200 and 201, the first and second strained layers 190 and 191, and the lower electrode 180 is completed.

Subsequently, the first layer 169 is patterned to form a support element 175 comprising a support layer 170, a support line 174, a first anchor 171 and second anchors 172a, 172b. . At this time, both sides of the portion of the first layer 169 contacting the etch stop layer 155 exposed in the shape of the three quadrangles are second anchors 172a and 172b, and the center portion of the first anchor 171 is located. ) Each of the first anchor 171 and the second anchors 172a and 172b has a rectangular box shape, and a hole (not shown) and a first hole of the second metal layer 145 are disposed below the first anchor 171. The drain pad of the metal layer 135 is formed.

The first and second upper electrodes 200 and 201 are formed parallel to each other on top of two arms horizontally extending in a direction orthogonal to the support line 174 of the support layer 170, respectively. Accordingly, the first anchor 171 is formed below the lower electrode 180, and the second anchors 172a and 172b are formed below the outer electrode 180, respectively.

Subsequently, a third photoresist (not shown) is applied and patterned on top of the support element 175 including the support layer 170 and the support line 174 and on the actuator 210 to pattern the support line 174. A portion of the first and second upper electrodes 200 and 201 are exposed from the common electrode line 240 formed on the C). At this time, even the protrusions of the lower electrode 180 are exposed together from the first anchor 171.

Subsequently, by depositing and patterning amorphous silicon or silicon oxide (SiO ₂ ) or phosphorus pentoxide (P ₂ O ₅ ), which is a low temperature oxide, on the exposed portion, a portion of the first upper electrode 200 may be formed. The first insulating layer 220 is formed to a part of the support layer 170 through the first strained layer 190 and the lower electrode 180, and at the same time, the second strained layer 191 is removed from a part of the second upper electrode 201. And a second insulating layer 221 to a part of the support layer 170 through the lower electrode 180. The first and second insulating layers 220 and 221 are formed to have a thickness of about 0.2 to 0.4 µm, and preferably about 0.3 µm, respectively, using low pressure chemical vapor deposition (LPCVD).

The first anchor 171 and the etch stop layer 155 are formed from the center of the first anchor 171, which is a portion where the hole of the second metal layer 145 and the drain pad 132 of the first metal layer 135 are formed. After etching the second protective layer 150 and the first protective layer 140 to form the via hole 270 up to the drain pad, protrusions of the lower electrode 180 through the via hole 270 from the drain pad. Until form via contact 280. At the same time, the first upper electrode connecting member 230 and the second upper electrode 201 from the first upper electrode 200 to the common electrode line 240 through a part of the first insulating layer 220 and the support layer 170. The second upper electrode connecting member 231 is formed from the second insulating layer 221 and the support layer 170 to the common electrode line 240.

The via contact 280 and the first and second upper electrode connecting members 230 and 231 are each deposited with platinum or platinum-tantalum to have a thickness of about 0.1 to 0.2 μm using a sputtering method or a chemical vapor deposition method. Then, the deposited metal is formed by patterning. The first and second upper electrode connecting members 230 and 231 connect the first and second upper electrodes 200 and 201 and the common electrode line 240, respectively, and the lower electrode 180 connects the via contact 280. It is connected to the drain pad through.

Referring to FIG. 6E, a second sacrificial layer 300 is formed on top of the actuator 210 and the support element 175 using an accuflo. This acuflow is applied on top of the actuator 210 and the support element 175 using a spin coating method and subsequently removed using an ashing method.

Subsequently, after applying the fourth photoresist 320 on the second sacrificial layer 300, a hard mask made of aluminum or silicon oxide (SiO ₂ ) on the fourth photoresist 320. After forming the 330 and patterning the hard mask 330 by a conventional photolithography method, the fourth photoresist 320 and the second sacrificial layer 300 are patterned along the hard mask 330 pattern. A portion of the lower electrode 180 of the mirror-shaped 'C' that is not adjacent to the support line 174 and formed in parallel (ie, a portion where the first and second upper electrodes 200 and 201 are not formed thereon). ).

Subsequently, the exposed fourth photoresist 320 is baked at a temperature of about 140 to 160 ° C., preferably at about 150 ° C. for about 10 to 30 minutes, preferably about 20 minutes. As such, when the fourth photoresist 320 and the second sacrificial layer are patterned and then baked, internal stress generated due to shrinkage of the fourth photoresist 320 during patterning is performed. As a result, the deformation stress applied to the mirror 260 to be formed on the fourth photoresist 320 and the hard mask 330 may be minimized. Accordingly, the flat mirror 260 without warpage can be formed, thereby increasing the light efficiency of the light incident on the mirror 260 from the light source, thereby improving the image quality of the image projected on the screen. Afterwards, the second sacrificial layer 300 and the fourth photoresist 320 are simultaneously removed using a plasma ashing method.

Referring to FIG. 6F, a metal, such as aluminum (Al), having a portion of the exposed lower electrode 180 and the reflective upper portion of the hard mask 330 is about 0.1 to 1.0 μm using a sputtering method or a chemical vapor deposition method. Deposition to a thickness of about, and patterning the deposited metal to form a mirror 260 having a rectangular flat plate shape and a post 250 for supporting the mirror 260 at the same time.

After the second sacrificial layer 300 and the photoresist 320 are removed by plasma ashing, the first sacrificial layer 160 is xenon fluoride (XeF ₂ ) or bromine fluoride (BrF ₂ ). The TMA element as shown in Fig. 4 is completed by removing the same, and performing washing and drying treatment. As described above, when the second sacrificial layer 300 and the photoresist 320 are removed, a second air gap 310 is formed at the positions of the second sacrificial layer 300 and the photoresist 320 and the first sacrificial layer ( When the 160 is removed, the first air gap 165 is formed at the position of the first sacrificial layer 160.

According to the manufacturing method of the thin film type optical path control apparatus according to the present invention, after patterning the photoresist and the second sacrificial layer, if baking is performed at a temperature of about 140 to 160 ℃ for about 10 to 30 minutes, patterning It is possible to alleviate internal stresses caused by the shrinkage of the photoresist during the process, thereby minimizing the deformation stress applied to the mirror to be formed on top of the photoresist and the hard mask, thereby bending A flat mirror without this can be formed. Accordingly, the light efficiency of the light incident on the mirror from the light source can be increased, and the image quality of the image projected on the screen can be improved.

As described above, although described with reference to a preferred embodiment of the present invention, those skilled in the art will be variously modified without departing from the spirit and scope of the invention described in the claims below. And can be changed.

Claims (3)

Providing an active matrix including a first metal layer having a MOS transistor embedded therein and having a drain pad extending from the drain of the transistor; After applying and patterning a first sacrificial layer on the active matrix, forming a first layer, a lower electrode layer, a second layer, and an upper electrode layer on the first sacrificial layer; Sequentially patterning the upper electrode layer, the second layer, and the lower electrode layer to form an actuator including a lower electrode, first and second strained layers, and first and second upper electrodes; Patterning the first layer to form support means; Forming a second sacrificial layer on top of said support means and said actuator; Depositing a photoresist on the second sacrificial layer; Forming a hard mask on top of the photoresist and patterning the hard mask, photoresist and sacrificial layer; Baking the photoresist; And And simultaneously forming a mirror and a post for supporting the mirror on an upper portion of the hard mask. The method of claim 1, wherein the baking of the photoresist is performed at a temperature of about 140 ° C. to about 160 ° C. for about 10 to 30 minutes. The method of claim 1, wherein the second sacrificial layer is formed by applying an accuflo by a spin coating method, and the hard mask and the mirror are formed by depositing aluminum by a sputtering method or a chemical vapor deposition method. Manufacturing method of thin film type optical path control device