KR101975071B1 - Plasma activated conformal dielectric film deposition - Google Patents

Abstract

A method of depositing a film on a substrate surface includes surface-mediated reactions wherein the film grows over one or more cycles of reactant adsorption and reaction. In one embodiment, the method is characterized by the intermittent transfer of dopant species into the membrane between cycles of adsorption and reaction.

Description

PLASMA ACTIVATED CONFORMAL DIELECTRIC FILM DEPOSITION [0002]

Cross-reference to related application

This application is a continuation-in-part of U.S. Provisional Patent Application No. 61 / 324,710, filed April 15, 2010; U. S. Patent Application No. 61 / 372,367, filed August 10, 2010; U. S. Patent Application No. 61 / 379,081, filed September 1, 2010; And United States Patent Application No. 61 / 417,807, filed November 29, 2010, which claims priority to US Patent Application No. 13 / 084,399, filed on April 11, 2011, as a further continuation- It asserts under §120. Each of these applications is incorporated herein by reference in its entirety for all purposes. This application is also a continuation-in-part of U.S. Patent Application No. 13 / 084,305 filed on April 11, 2011, the entire contents of which are incorporated herein by reference.

Various thin film layers for semiconductor devices can be deposited using atomic layer deposition (ALD) processes. However, conventional ALD processes may not be suitable for depositing highly conformal dielectric films.

The various aspects disclosed herein relate to methods and apparatus for depositing a film on a substrate surface. In certain embodiments, the method includes depositing a film by surface mediated reactions, wherein the film is deposited over one or more reactant adsorption and reaction cycles. In one aspect, the method is characterized by the intermittent transfer of dopant species to the membrane between adsorption and reaction cycles. At some point, the dopant species may be driven across the substrate surface to dope areas of the substrate.

In one aspect, the disclosed method deposits a film on a substrate surface in a reaction chamber. The method includes: (a) introducing the first reactant into the reaction chamber under conditions that cause the first reactant to adsorb onto the surface of the substrate; (b) introducing a second reactant into the reaction chamber while the first reactant is adsorbed onto the substrate surface; (c) exposing the substrate surface to a plasma to cause a reaction between the first reactant and the second reactant on the substrate surface to form a portion of the film; (d) repeating (a) to (c) at least once; (e) introducing the dopant-containing material into the reaction chamber under conditions that cause a dopant-containing material not introduced during (a) - (d) to contact the exposed surface of the film; And (f) introducing a dopant from the dopant-containing material into the film. The act of introducing the dopant into the film includes exposing the dopant-containing material to the plasma.

In various embodiments, the method further includes driving the dopant from the film into features of the substrate surface on which the film resides. The act of pulling the dopant from the film may be achieved by annealing the film. In some applications, the film resides on a three-dimensional feature of the substrate surface, and the act of driving the dopant from the film provides conformal diffusion of the dopant into the feature. In certain applications, the features have a width not greater than about 40 nanometers.

In certain embodiments, the film is a dielectric film. In some cases, the total film thickness is from about 10 to 100 angstroms. In various embodiments, the concentration of the dopant in the film is from about 0.01 to 10 weight percent.

In certain embodiments, the method of this aspect further comprises repeating (a) through (c) after (e) or (f). In certain embodiments, the method of this aspect further comprises repeating (a) through (e). In some embodiments, the amount of film deposited during (a) - (c) is about 0.5 to 1 angstrom.

In certain embodiments, the method further comprises purge the second reactant from the reaction chamber prior to exposing the substrate surface to a plasma. The purge operation can be accomplished by flowing a gas containing an oxidant into the reaction chamber. In some embodiments, the first reactant and the second reactant coexist in a vapor phase within the reaction chamber, and the first reactant and the second reactant are maintained at a temperature of about < RTI ID = 0.0 > They do not appreciably react with each other in the reaction chamber.

In certain embodiments, the first reactant is an oxidizing agent such as, for example, nitrous oxide. In certain embodiments, (i) the second reactant is SiH _x (NR ₂ ) _4-x wherein x = 1 to 3 and R is alkylamino silanes comprising alkyl groups; Or (ii) SiH _x Y _4-x , where x = 1 to 3 and Y is a dielectric precursor, such as halosilanes, including Cl, Br, In certain embodiments, the second reactant is BTBAS. In certain embodiments, the dopant-containing material is selected from the group consisting of phosphine, arsine, alkylboranes, alkylgallanes, alkylphosphines, phosphorus halides, arsenic halides, gallium halides, Boron halide, alkylborane, or diborane.

In another aspect, the disclosed method deposits a dielectric film on a substrate surface in a reaction chamber. The method comprises: (a) introducing an oxidant into the reaction chamber under conditions that cause the first reactant to adsorb onto the substrate surface; (b) introducing a dielectric precursor into the reaction chamber while the oxidant flows into the reaction chamber; (c) exposing the substrate surface to a plasma to cause a reaction between the oxidant on the substrate surface and the dielectric precursor to form a portion of the dielectric film; (d) introducing the dopant-containing material into the reaction chamber under conditions that cause a dopant-containing material not introduced during (a) - (c) to contact the exposed surface of the film; And (e) incorporating a dopant from the dopant-containing material into the dielectric film. In one embodiment, the dielectric precursor is a BTBAS or other precursor as specified in the preceding embodiment.

This method may also require that operations (a) through (c) be repeated one or more times. In a specific example, the oxidant comprises a first ratio of oxygen to nitrogen when (a) is initially performed, and the oxidant comprises a second ratio of oxygen to nitrogen when (a) is subsequently carried out . The second ratio is smaller than the first ratio. For example, the oxidant includes elemental oxygen when (a) is first run, and the oxidant includes nitrous oxide when (a) is repeated. In some embodiments, the substrate is at a first temperature when (c) is first performed, the substrate is at a second temperature when (c) is repeated, and the second temperature is higher than the first temperature .

In some cases, the method further comprises driving the dopant from the dielectric film into the substrate. In some embodiments, the method further comprises: (a) previously contacting the substrate surface with the dopant-containing material.

In another aspect, the disclosed method deposits a dielectric film on a substrate surface in a reaction chamber in accordance with the operations, the operations comprising: (a) depositing a dielectric precursor under conditions that cause a dielectric precursor to be adsorbed onto the substrate surface Into the reaction chamber; (b) purging the dielectric precursor from the reaction chamber with the dielectric precursor adsorbed on the substrate surface; (c) exposing the substrate surface to a plasma to cause a reaction of the dielectric precursor on the substrate surface to form a portion of the dielectric film; And (d) introducing the dopant precursor into the reaction chamber under conditions that cause a dopant precursor not introduced during (a) - (c) to contact a portion of the dielectric film. In some embodiments, the method further comprises an operation of flowing an oxidant into the reaction chamber before and during (a) - (c). In some cases, the method further comprises reacting the dopant precursor to include a dopant in the dielectric film.

Another aspect relates to an apparatus for depositing a doped film on a substrate surface. The apparatus includes a reaction chamber including a device for holding a substrate during deposition of a doped dielectric film; One or more process gas inlets communicating with the reaction chamber; And features such as a controller. Wherein the controller is configured or designed to cause the apparatus to perform operations, the operations comprising: (a) introducing the first reactant into the reaction chamber under conditions that cause the first reactant to be adsorbed onto the substrate surface ; (b) introducing a second reactant into the reaction chamber while the first reactant is adsorbed onto the substrate surface; (c) exposing the substrate surface to a plasma to cause a reaction between the first reactant and the second reactant on the substrate surface to form a portion of the film; (d) repeating (a) - (c) at least once; (e) introducing the dopant-containing material into the reaction chamber under conditions that cause a dopant-containing material not introduced during (a) - (d) to contact the exposed surface of the film; And (f) introducing a dopant from the dopant-containing material into the film. The controller may be designed or configured to directly perform other methods, such as those discussed in accordance with other aspects.

In certain embodiments, the controller is further designed or configured to cause the apparatus to flow oxidant into the reaction chamber before and during (a) - (d). In certain embodiments, the controller is further designed or configured to cause an operation that repeats (a) through (c) to occur after (e) or (f). In certain embodiments, the controller is further designed or configured to cause the act of driving the dopant from the film into the features of the substrate surface on which the film resides. The act of pulling the dopant from the film may be achieved by annealing the film. In some embodiments, the controller is further designed or configured such that (e) is performed at intervals between one or more repetitions of (a) through (d), the intervals varying over the course of depositing the film.

In various embodiments, the controller is further designed or configured to purge the second reactant from the reaction chamber prior to exposing the substrate surface to a plasma. In one example, this is accomplished by flowing a gas containing the purging oxidant into the reaction chamber.

These and other features will be described in more detail below with reference to the accompanying drawings.

Figure 1 schematically illustrates a timing diagram of an exemplary conformal film deposition (CFD) process in accordance with an embodiment of the present disclosure.
Figure 2 schematically illustrates a timing diagram of another exemplary CFD process in accordance with an embodiment of the present disclosure.
Figure 3 schematically illustrates a timing diagram of another exemplary CFD process in accordance with an embodiment of the present disclosure.
4 schematically illustrates a timing diagram of an exemplary CFD process including a plasma processing cycle in accordance with an embodiment of the present disclosure.
Figure 5 illustrates an exemplary correlation between the deposition rate and the wet etch rate for films deposited according to embodiments of the present disclosure.
Figure 6 illustrates an exemplary correlation between wet etch rate ratio and film stress for films deposited according to embodiments of the present disclosure.
FIG. 7 illustrates an exemplary correlation between deposition temperature and film fouling concentration for films deposited according to embodiments of the present disclosure.
8 is a schematic view of an exemplary cross-section of a non-planar substrate including a plurality of gaps.
Figure 9 schematically illustrates a timing diagram of an exemplary CFD process involving a transition to PECVD in accordance with an embodiment of the present disclosure.
10 is a schematic illustration of an exemplary cross-section of a gap fill comprising a keyhole void.
Figure 11 schematically illustrates a timing diagram of an exemplary CFD process including in-situ etching in accordance with an embodiment of the present disclosure.
12A is a schematic view of an exemplary cross-section of the recessed gap fill profile.
Figure 12B is a schematic diagram of an exemplary cross-section of the recessed gap fill profile of Figure 12A during an in-situ etch process according to an embodiment of the present disclosure.
Figure 12C is a schematic illustration of an exemplary cross-section of the recessed gap fill profile of Figure 12B during a deposition process after in-situ etching according to an embodiment of the present disclosure.
Figure 13 is a schematic diagram of an exemplary process station in accordance with an embodiment of the present disclosure.
14 is a schematic diagram of an exemplary process tool including a plurality of process stations and a controller in accordance with an embodiment of the present disclosure;
15 is an exemplary schematic cross-sectional view of a through silicon via during a CFD process including in-situ etching according to an embodiment of the present disclosure;
Figure 16 illustrates a transistor having a three-dimensional gate structure in which source and drain are formed in thin vertical structures that are difficult to be doped by conventional ion implantation techniques.
Figure 17 provides a basic CFD sequence of operations from left to right as time passes along the x-axis.
FIGS. 18 and 19 illustrate that a dopant is deposited at the interface with the underlying substrate and is then undoped with a CFD cycle followed by intervening CFD cycles and optionally an undoped protective " capping "Quot; topped off " layer. ≪ / RTI >
Figure 20 shows a typical deposition block used to synthesize a CFD BSG / PSG film.
Figure 21 shows the step coverage for CFD films calculated as ~ 100% on dense structures and isolated structures.
Figure 22 provides SIMS data indicating that the average boron concentration in the CFD films can be controlled within a range of about 0.5 to 3.5 wt% boron.

Semiconductor device fabrication typically involves depositing one or more thin films on a non-planar substrate in an integrated fabrication process. In some aspects of this integrated manufacturing process, it may be useful to deposit conformal films to substrate topography. For example, a silicon nitride film may be deposited on top of an elevated gate stack to serve as a spacer layer to protect the weakly doped source and drain regions from subsequent ion implantation processes.

In spacer layer deposition processes, CVD processes may be used to form a silicon nitride film on a non-planar substrate, which is then anisotropically etched to form a spacer structure. However, as the distance between the gate stacks becomes smaller, it results in a " bread-loafing deposition effect " due to the mass transfer restrictions of CVD gas phase reactants. The bulk transfer effect across the wafer surface is greater than that on the die surface due to the fact that some dies can have different device density regions, Resulting in a variation in the film thickness and an in-wafer film thickness deviation. Such thickness variations cause over-etching in some regions and under-etching in other regions. Is deteriorated and / or die yield is deteriorated.

Some methods to deal with these problems include atomic layer deposition (ALD). Compared to CVD processes in which thermally activated gaseous reactants are used to deposit films, ALD processes use surface-mediated deposition reactions to deposit films on a layer-by-layer basis. In one exemplary ALD process, a substrate surface comprising a population of surface active sites is exposed to a gaseous phase distribution of a first membrane precursor P1. Some of the molecules of P1 may form condensed phases on the surface of the substrate, including chemisorbed species of P1 and physically adsorbed molecules. The reactor is then evacuated so that only the chemisorbed species remain and the physically adsorbed P1 and gaseous phase are removed. A second membrane precursor P2 is then introduced into the reactor so that some of the second membrane precursor P2 is adsorbed to the substrate surface. Once again the reactor is evacuated and this time the unconjugated P2 is removed. Thereafter, thermal energy is applied to the substrate to activate the surface reaction between adsorbed molecules P1 and P2 to form a film layer. Finally, the reactor is vented and the reaction by-products and possibly unreacted Pl and P2 are removed and the ALD cycle is terminated. Additional ALD cycles may be included to build the film thickness.

Depending on the exposure time of the precursor dosing steps and the sticking coefficient of the precursors, each ALD cycle may deposit a film layer 0.5 to 3 Angstroms thick in one example. Thus, ALD processes can be time consuming when depositing films thicker than a few nanometers in thickness. Further, some precursors may have long exposure times to deposit a conformal film, thereby reducing wafer throughput time.

The conformal film may also be deposited on a planar substrate. For example, antireflective layers used in lithographic patterning may be formed from alternating planar stacks of film type. These antireflective layers can be from about 100 to 1000 angstroms thick, and thus the ALD process is less attractive than the CVD process. However, these antireflective layers may also have in-wafer thickness deviation tolerances that are less than the intra-wafer thickness deviation tolerance that multiple CVD processes can provide. For example, a 600 angstrom thick antireflective layer may allow a thickness range of less than 3 angstroms.

Accordingly, various embodiments are provided herein that provide processes and equipment for plasma-activated conformal film deposition (CFD) on non-planar substrates and planar substrates. These embodiments include various features used in some CFD processes, not all CFD processes. These features include: (1) a feature that eliminates or reduces the time required to " sweep " one or both reactions from the reaction chamber, (2) at least one other intermittently introducing one reactant into the reaction chamber (3) ignition of the plasma when one of the reactants is in the gaseous state, as opposed to when all of the reactants are removed from the reaction chamber, (4) the characteristic of CFD films deposited to modify the film properties (5) depositing a portion of the film by PECVD after depositing the first portion of the film by CFD, typically in the same reaction chamber, (6) depositing a partially deposited film between the CFD stages And (7) the feature of doping the CFD film by placing the dopant delivery cycle only between film deposition cycles have. Of course, these features are not exhaustive. Various other CFD features will be apparent with reference to the remainder of this specification.

The concept of a CFD " cycle " is related to a discussion of various embodiments of the present disclosure. Generally, a cycle is the minimum set of operations required to perform a single surface deposition reaction. The result of one cycle is the production of at least a partial film layer on the substrate surface. Typically, the CFD cycle will include only the steps necessary to deliver each reactant to the substrate surface and adsorb and then react these adsorbed reactants to form a partial membrane layer. Of course, this cycle may involve additional steps such as removing one of the reactants or by-products and / or treating the deposited partial film. In general, a cycle may include only one instance of a unique sequence of operations. Illustratively, the cycle includes (i) transferring / adsorbing reactant A, (ii) transferring / adsorbing reactant B, (iii) removing reactant B from the reaction chamber, and (iv) And applying a plasma to cause a surface reaction to form a partial film layer on the surface.

The seven above-mentioned features will now be further described. In the following description, consider a CFD reaction in which two or more reactants are adsorbed to the substrate surface by interaction with a plasma and then react to form a film on the surface.

Feature 1: Continuous flow of reactants

And continues to flow into the reaction chamber during one or more portions of the CFD cycle when Reactant A does not normally flow in conventional ALD. In conventional ALD, reactant A flows only to be adsorbed to the substrate surface. In another phase of ALD, the reactant A does not flow. However, in accordance with certain CFD embodiments described herein, reactant A also flows during the phase of the CFD cycle to perform an operation other than the adsorption operation of reactant A as well as the phase associated with its adsorption. For example, in many embodiments, Reactant A flows into the reactor while it is dosing the second reactant (Reactant B in this example). Thus, during at least a portion of the CFD cycle, reactants A and B coexist in the gas phase. Furthermore, the reactant A can flow even when a plasma is applied to cause a reaction on the substrate surface. The continuously flowing reactants may be delivered into the reaction chamber, for example, with a carrier gas such as argon.

One advantage of this continuous flow embodiment is that it suppresses delays and flow fluctuations caused by transient initialization and stabilization of the flow associated with initiating and stopping the established flow.

As one specific example, an oxide film can be deposited by performing a conformal film deposition process using the main reactant (sometimes referred to as a "solid component" precursor or simply "reactant B" in this example). One such main reactant is bis (tert-butylamino) silane (BTBAS). In this example, the oxide deposition process involves passing an oxidant such as oxygen or nitrous oxide, which initially and continuously flows during the transfer of the main reactant within the individual exposure phases. This oxidant also continues to flow during the individual plasma exposure phases. For example, see the sequence shown in FIG. For comparison, in a typical ALD process, the flow of oxidant will cease when the solid component precursor is delivered to the reactor. For example, when reactant B is delivered, the flow of reactant A will stop.

In some specific instances, the continuously flowing reactants are " secondary " reactants. The term " secondary " reactant, as used herein, is any reactant that is not the main reactant. As noted above, the main reactant is a solid at room temperature and contains elements that contribute to the film formed by CFD. Examples of such elements are metals (e.g., aluminum and titanium), semiconductors (e.g., silicon and germanium), and nonmetal or metalloid (e.g., boron). Examples of auxiliary reactants include oxygen, ozone, hydrogen, carbon monoxide, nitrous oxide, ammonia, alkyl amines, and the like.

The continuously flowing reactants may be provided at a constant flow rate or a variable but controlled flow rate. In the latter case, by way of example, the flow rate of the auxiliary reactant may fall during the exposure phase when the main reactant is delivered. For example, during oxide deposition, an oxidant (e.g., oxygen or nitrous oxide) continuously flows during the entire deposition sequence, but its flow rate may drop when the main reactant (e.g., BTBAS) is delivered . This increases the partial pressure of BTBAS during dosing to shorten the exposure time required to saturate the substrate surface. Immediately prior to igniting the plasma, the oxidant flow is increased to reduce the probability of BTBAS being present during the plasma exposure phase. In some embodiments, the continuously flowing reactant flows at a variable flow rate over two or more deposition cycles. For example, the reactant may flow at a first flow rate during a first CFD cycle and the reactant may flow at a second flow rate during a second CFD cycle.

If multiple reactants are used and one of the streams is continuous, at least two of them will coexist in the gas phase during a portion of the CFD cycle. Likewise, if no purging operation is performed after the first reactant transfer, the two reactants will coexist. Thus, it may be important to employ reactants that do not react visibly to each other in the gas when the activation energy is not applied. Typically, the reactants are present on the substrate surface and should not react until exposed to a plasma or other suitable non-thermal activation conditions. Selecting these reactants requires at least (1) the thermodynamic favorability of the target reaction (free energy of the Gibbs < 0) and (2) the activation energy for a reaction that must be sufficiently large to have negligible reaction at the target deposition temperature Considerations include.

Feature 2: Shorten or omit sweep steps

In certain embodiments, the process omits or shortens the time associated with a sweep step that would normally be performed in a conventional ALD. In conventional ALD, a separate removal step is performed after each reactant is delivered and adsorbed onto the substrate surface. In the conventional ALD removal step, a very small amount of adsorption or reaction occurs or does not occur at all. In the CFD cycle, the removal step is omitted or shortened after at least one of the reactants is delivered. An example of a process sequence in which the removal step is omitted is provided in FIG. No removal step of removing reactant A from the reaction chamber is performed. In some cases, no removal step is performed after the transfer of the first reactant in the CFD cycle, but the removal step is optionally performed after transfer of the second or last transferred reactant.

The CFD " removal " phase or phase concept is illustrated by discussing various embodiments of the present disclosure. Generally, the removal phase occurs only after the removal of or purging one of the gaseous reactants from the reaction chamber and the transfer of such reactants is complete. In other words, these reactants are no longer transferred to the reaction chamber during the removal phase. However, during the removal phase the reactants remain adsorbed on the substrate surface. Typically, the stripping step serves to remove any residual gaseous reactants in the chamber after the reactants have been adsorbed onto the substrate surface to the target level. In addition, the removal phase can remove species that are weakly adsorbed (e.g., certain precursor ligands or reaction byproducts) from the substrate surface. In ALD, the removal phase was deemed necessary to prevent the interaction of the gaseous interaction between the two reactants or other driving forces for one reaction with the thermal plasma or surface reaction. Generally, unless otherwise specified herein, the removal phase can be accomplished by (i) exhausting the reaction chamber and / or (ii) flowing a gas that does not contain species to be removed through the reaction chamber. In case (ii), such gas may be, for example, an auxiliary reactant such as a continuously flowing auxiliary reactant or an inert gas.

The elimination phase can be omitted with or without a continuous flow of other reactants. In the embodiment shown in FIG. 1, reactant A continues to flow rather than removed after adsorption to the substrate surface is completed (as indicated by reference numeral 130 in the figure).

In various embodiments where two or more reactants are used, the reactants that have been shortened or omitted in their removal step are auxiliary reactants. Illustratively, the auxiliary reactant is an oxidizing agent or nitrogen source and the main reactant is a precursor containing silicon, boron or germanium. Of course, the main reactant removal can also be omitted or shortened. In some instances, no removal step is performed after delivery of the auxiliary reactant, but the removal step is optionally performed after the main reactant is delivered.

As described above, the removal phase need not be completely omitted, but its duration can be shortened compared to the removal phases in a conventional ALD process. For example, during the CFD cycle, the removal phase of the reactants, such as auxiliary reactants, may be performed for less than about 0.2 seconds, e.g., from about 0.001 to about 0.1 seconds.

Feature 3: Plasma is ignited when one of the reactants is in the gas phase

In this feature, the plasma is ignited before all reactants are removed from the reaction chamber. This is different from a conventional ALD in which plasma activation or other reaction drive operation is provided only after the gaseous reactants are no longer present in the plasma chamber. This feature inevitably occurs when reactant A continues to flow during the plasma portion of the CFD cycle, as shown in Fig. However, the disclosed embodiments are not limited in this manner. One or more reactants may flow during the plasma phase of the CFD cycle, but need not continue to flow through the CFD cycle. In addition, the reactants present in the gaseous phase during plasma activation (if two or more reactants are used in the CFD cycle) can be auxiliary or main reactants.

For example, the sequence may be (i) introducing reactant A, (ii) purging reactant A, (iii) introducing reactant B, and (iv) striking the plasma while reactant B is flowing. In these embodiments, the process uses plasma activated reactant species from the gas phase. This is a generic example where the CFD is not constrained by the sequence of subsequent steps.

If an activated plasma is supplied during the time that the solid component precursor (the main reactant) is fed to the reactor, the step coverage will be less conformal but the deposition rate will typically increase. However, if plasma activation occurs only during the delivery of the auxiliary reactant, this is not necessarily the case. The plasma activates the gas phase auxiliary component so that the component becomes more reactive, thereby increasing its reactivity during the conformal film deposition reaction. In certain embodiments, this feature is used in depositing a silicon-containing film such as oxide, nitride, or carbide.

Feature 4: Plasma treatment of deposited CFD films

In these embodiments, the plasma can serve more than one function in a conformal film deposition process. One of these roles is to activate or drive the film forming reaction during each CFD cycle. Another role is to treat the film after the CFD film is completely or partially deposited along one or more CFD cycles. The plasma treatment is intended to modify one or more of the film properties. Typically, though not necessarily, the plasma treatment phase is performed under conditions that are different from those used to activate the film forming reaction (i.e., to drive the film forming reaction). Illustratively, the plasma treatment can be performed in the presence of a reducing or oxidizing atmosphere (e.g., in the presence of oxygen or hydrogen), but is not needed during the active portion of the CFD cycle.

The plasma processing operation can be performed every cycle of the CFD process, every two cycles, or at a lower frequency. The plasma treatment may be performed at regular intervals or may be limited to a fixed number of CFD cycles (e.g., at variable CFD cycle intervals) or may be performed variably or randomly. In a typical example, film deposition is performed over several CFD cycles to form a suitable film thickness, followed by plasma treatment. Thereafter, the film deposition is again performed over a number of CFD cycles without plasma treatment before the plasma treatment is again performed. This super-sequence of x-number of CFD cycles and thereafter plasma treatment (film reforming) can be repeated until the film is completely formed by the CFD.

In certain embodiments, the plasma treatment may be performed prior to the commencement of the CFD cycle to modify one or more characteristics of the CFD film deposited surface. In various embodiments, the surface may be comprised of a (doped or undoped) silicon or silicon containing material. The modified surface can subsequently produce a better quality interface with the deposited CFD film. Such an interface can provide good adhesion characteristics and reliable electrical properties, for example, through, for example, defect reduction.

The substrate pre-processing prior to CFD is not limited to any particular plasma processing. In certain embodiments, the pretreatment may be performed in a variety of ways including, but not limited to, hydrogen plasma, nitrogen plasma, nitrogen / hydrogen plasma, ammonia plasma, argon plasma, exposure to helium plasma, helium annealing, hydrogen annealing, ammonia annealing, / UV-curing in the presence of nitrogen-forming gas and / or ammonia. Plasma processing may be accomplished using a variety of plasma generators including, but not limited to, microwave plasma generators, ICP remote plasma generators, direct plasma generators, and other plasma generators known to those skilled in the art.

Overall, the plasma treatment may occur before, during, and after the CFD cycle. If the plasma treatment occurs prior to the CFD cycle, the frequency can be selected for suitable deposition conditions. Typically, the plasma treatment will not occur more often than once per cycle.

As an example, consider a process for forming silicon nitride from precursors having a certain degree of carbon. An example of such a precursor includes BTBAS. Due to the carbon present in the precursor, the deposited nitride film has a certain amount of carbon impurities, which degrades the electrical properties of the nitride. To address this problem, after several CFD cycles using a carbon-containing precursor, the partially deposited film is exposed to hydrogen in the presence of a plasma, thereby reducing and ultimately eliminating carbon impurities.

The plasma conditions used for membrane surface modification can be selected to achieve a target change in film properties and / or composition. Among the plasma conditions that may be selected and / or tailored for the desired modification are the oxidation conditions, the reduction conditions, the etching conditions, the power used to generate the plasma, the frequency used to generate the plasma, The plasma density, the distance between the plasma and the substrate, and the like. Examples of CFD film properties that can be modified by plasma treatment include internal film stress, etch resistance, density, hardness, optical properties (refractive index, reflectivity, optical density, etc.), dielectric constant, carbon content, electrical properties (Vfb spread, etc.) And the like.

In some embodiments, a process other than plasma treatment is used to modify the properties of the deposited film. These processes include electromagnetic radiation treatment, thermal treatment (e.g., annealing or high temperature pulse), and the like. Any of these treatments may be performed alone or in combination with other treatments including plasma treatment. Any of these processes may be used in place of any of the above-described plasma processes. In certain embodiments, such treatment includes exposing the film to ultraviolet light. As will be described below, in certain embodiments, the method includes applying ultraviolet light to the oxide CFD film in an in-situ manner (i.e. during film formation) or after oxide deposition. This treatment can reduce or eliminate the defective structure to provide improved electrical performance.

In certain specific embodiments, the ultraviolet treatment may be combined with the plasma treatment. These two processing operations can be performed simultaneously or sequentially. In sequential cases, ultraviolet light treatment is optionally performed first. In a simultaneous case, the two processes may be provided from a single source, such as a helium plasma, provided from individual sources (e.g., an RF power source for plasma processing and a ramp for ultraviolet processing) or producing ultraviolet radiation as a by-product .

Feature 5: CFD deposition and subsequent transition to PECVD

In these embodiments, a portion of the finished film is produced by CFD and the remainder is formed by CVD, such as PECVD. Typically, a CFD deposition process is performed first, followed by a PECVD process, but not necessarily. The combined CFD / CVD processes improve step coverage as compared to when CVD is performed alone and additionally improve the deposition rate as compared to when CFD is performed alone. In some cases, plasma or other activation energy is applied while one CFD reactant is flowing to create parasitic CVD operations to achieve a higher deposition rate, a different class of film.

In certain embodiments, two or more CFD phases may be used and / or two or more CVD phases may be used. For example, the initial portion of the film may be deposited by CFD, then the middle portion of the film may be deposited by CVD, and then the last portion of the film may be deposited by CFD. In these embodiments, it may be desirable to modify the CVD portion of the film by, for example, plasma treatment or etching treatment, prior to depositing subsequent portions of the film by CFD.

A transition phase can be employed between the CFD phase and the CVD phase. The conditions used during this transition phase are different from those used in the CFD phase and / or the CVD phase. Typically, though not necessarily, such transition conditions allow simultaneous CFD surface reactions and CVD-type gaseous reactions. The transition phase typically involves exposure to a plasma, which may be pulsed, for example. The transition phase also includes a bar that delivers one or more reactants at a low flow rate that is a much lower rate than the flow rate used in the corresponding CFD phase of the process.

Feature 6: Deposition by CFD, Etching and subsequent deposition by CFD

In these embodiments, CFD deposition is performed over one or more cycles (typically a number of cycles), and then the resulting film is etched away, for example at or near the recess inlet (cusp) Some excess film is removed and then additional CFD deposition cycles are performed. Other examples of structural features in the deposited film may be etched in a similar manner. The etchant selected for this process will depend on the material to be etched. In some cases, the etching operation may be performed using a fluorine containing etchant (e.g., NF ₃ ) or hydrogen.

In certain embodiments, a remote plasma is used to generate the etchant. Generally, the remote plasma can be etched more isotropically than the direct plasma. Remote plasmas generally provide a relatively high proportion of radicals to the substrate. The reactivity of such radicals can vary depending on the vertical position in the recess. At the top of the feature, the radicals will be more dense and thus will be etched at a higher rate, while at the lower and lower ends of the recess some radicals will be lost and therefore will etch at a lower rate. Of course, this is the preferred reaction profile to address the very large amount of deposition problems that arise in the recess openings. A further advantage of using remote plasma during etching is that the plasma is relatively gentle and thus prone to damage to the substrate layer. This is particularly advantageous when the underlying substrate layer is sensitive to oxidation or other damage.

Feature 7: Alignment of film composition using additional reactants

The numerous examples provided herein relate to CFD processes using one or two reactants. In addition, many examples use the same reactant in every CFD cycle. However, it is not necessary. First, many CFD processes can use three or more reactants. Examples include (i) CFD of tungsten using diborane, tungsten hexafluoride and hydrogen as reactants, and (ii) CFD of silicon oxide using diborane, BTBAS, and oxygen as reactants. . Diborane may be removed from the growing film or included within the film if appropriate.

In addition, some examples may use additional reactants only in some CFD cycles. In these instances, the basic CFD process cycle uses only reactants that produce base film composition (e.g., silicon oxide or silicon carbide). This basic process is performed in all CFD cycles or almost all CFD cycles. However, some of the CFD cycles are implemented as modification cycles, which deviate from the conditions of a normal deposition cycle. For example, these modified cycles may use one or more additional reactants. These modification cycles may also use the same reactants as those used in the basic CFD process, but this is not necessarily so.

These CFD processes are particularly advantageous when preparing doped oxides or other doped materials as CFD films. In some embodiments, the dopant precursors are included only as " additional " reactants in only a small portion of the CFD cycles. The frequency of addition of the dopant is specified by the target dopant concentration. For example, a dopant precursor may be included every tenth cycle of base material deposition.

Unlike many other deposition processes, in particular, CFD processes can be performed at relatively low temperatures, unlike processes requiring thermal activation. Generally, the CFD temperature will be about 20 to 400 ° C. This temperature can be selected to enable deposition in temperature sensitive process conditions, such as deposition on photoresist cores. In certain embodiments, a temperature of about 20 to 100 占 폚 is used in double patterning applications (e.g., using photoresist cores). In another embodiment, a temperature of about 200-350 &lt; 0 &gt; C is used in the memory fabrication process.

As discussed above, CFD is well suited for depositing films in advanced technology nodes. Thus, for example, the CFD process can be integrated into processes beyond the 32 nm node, the 22 nm node, the 16 nm node, the 11 nm node, and beyond any of these nodes. These nodes are described in the industry consensus on the microelectronic technical requirements of the International Technology Roadmap for Semiconductors (ITRS) over the years. Generally, this is based on a 0.5 pitch of memory cells. In a particular example, the CFD process is applied to " 2X " devices (having device features in the range of 20 to 29 nm) and beyond.

Although most examples of CFD films provided herein relate to silicon-based microelectronic devices, these films can also be applied in other applications. Microelectronic or optoelectronic devices using non-silicon semiconductors such as GaAs and other III-V semiconductors and II-VI semiconductors such as HgCdTe can benefit from using the CFD processes described herein. Conformal dielectric films can also be used in the solar energy field, electrochromic field, and other fields, such as photovoltaic devices.

Figure 1 schematically illustrates a timing diagram 100 of an exemplary embodiment of a plasma activated CFD process. Two full CFD cycles are shown. As shown, each includes an exposure phase 120 to reactant A, an exposure phase 140 to reactant B immediately thereafter, a reactant B removal phase 160, and finally a plasma activation phase 180. The plasma energy provided during the plasma activation phases 180A, 180B activates the reaction between surface adsorbed reactant species A and B. In the illustrated embodiments, no removal phase is performed after one reactant (reactant A) is delivered. In practice, this reactant continues to flow during the film deposition process. Thus, the plasma is ignited when the reactant A is in the gas phase. The above-mentioned features 1 to 3 are implemented in the example of Fig.

In the illustrated embodiment, reactants A and B can coexist in a gaseous state without reacting with each other. Thus, one or more of the process steps described in the ALD process may be shortened or eliminated in this exemplary CFD process. For example, the removal steps after reactant A exposure phases 120A and 120B may be omitted.

The CFD process may be used to deposit any of a number of different types of films. Although most of the examples provided herein relate to dielectric materials, the presently disclosed CFD processes can also be used to form conductor material films and semiconductor material films. Carbides, oxynitrides, carbon-doped oxides, borides, and the like can also be formed, although they are dielectric materials characteristic of nitrides and oxides. The oxide includes a wide range of materials including undoped silicate glass (USG), doped silicate glass. Examples of doped glasses include boron doped silicate glass (BSG), phosphorus doped silicate glass (PSG), and boron phosphorus doped silicate glass (BPSG).

In some embodiments, the silicon nitride film may be formed by one or more reactions of a silicon-containing reactant and a nitrogen-containing reactant and / or a nitrogen-containing reactant mixture. Examples of silicon containing reactants include, but are not limited to, bis (tertiarybutylamino) silane (SiH ₂ (NHC (CH ₃ ) ₃ ) ₂ or BTBAS), dichlorosilane (SiH ₂ Cl ₂ ) and chlorosilane (SiH ₃ Cl). Exemplary nitrogen-containing reactants are not limited to the following: ammonia, nitrogen, and tert-butylamine include (tert-butyl amine) (( CH 3) 3 CNH 2 , or t-butyl amine). Exemplary nitrogen containing reactant mixtures include, but are not limited to, a mixture of nitrogen and hydrogen.

Selection of one or more reactants may be by various membrane and / or hardware considerations. For example, in some embodiments, a silicon nitride film may be formed from the reaction of dichlorosilane with plasma activated nitrogen. Chemical adsorption of dichlorosilane to the silicon nitride surface produces a silicon-hydrogen terminated surface and hydrogen chloride (HCl) is liberated. An example of such a chemical adsorption reaction is schematically illustrated in reaction 1.

Reaction 1:

The cyclic intermediate shown in Reaction 1 can then be converted to a silicon amine terminated surface through reaction with plasma activated nitrogen.

However, some molecules of dichlorosilane can be chemically adsorbed by other mechanisms. For example, surface morphology can interfere with the formation of the periodic intermediates shown in Reaction 1. An example of another chemisorption mechanism is schematically illustrated in reaction 2.

Reaction 2

During subsequent plasma activation of nitrogen, the remaining chlorine atoms of the intermediate species shown in Reaction 2 may be activated by plasma liberated. This causes silicon nitride surface etching and potentially causes the silicon nitride film to become rough or hazy. In addition, residual chlorine atoms are physically and / or chemically re-adsorbed to contaminate potentially deposited films. This contamination changes the physical and / or electrical properties of the silicon nitride film. Furthermore, the activated chlorine atoms can etch damage to portions of the process station hardware, potentially shortening the service life of portions of the process station.

Thus, in some embodiments, the chlorosilane can replace dichlorosilane. This reduces film contamination, film damage and / or process station damage. An example of chemical adsorption of chlorosilanes is outlined in reaction 3.

Reaction 3

It will be appreciated that the example shown in Reaction 3 uses chlorosilanes as the silicon containing reactant, but any suitable mono-substituted halosilane can be used.

As described above, the intermediate structures shown react with a nitrogen source to form a silicon amine terminated surface of silicon nitride. For example, ammonia is activated by the plasma to form various ammonia radical species. These radical species react with the intermediate structures to form the silicon amine termination surface.

However, ammonia can be strongly physically adsorbed to the surfaces of the reactant delivery lines, the processing station, and the exhaust plumbing, thereby extending purge and exhaust times. In addition, ammonia can have high reactivity with some gaseous silicon containing reactants. For example, a gaseous mixture of dichlorosilane (SiH ₂ Cl ₂ ) and ammonia can produce labile species such as diaminosilane (SiH ₂ (NH ₂ ) ₂ ). These species decompose in the gas to nucleate small particles. When ammonia reacts with the hydrogen chloride produced during the chemisorption of halosilane, small particles may be formed. These particles accumulate in process stations, which become potentially involved device defects by contaminating the substrate surface and also contaminate the process station hardware, potentially requiring the tool to be shut down and cleaned. The small particles also accumulate in the exhaust plumbing, clogging the pump and blower and require special ambient exhaust scrubber and / or cold trap.

Thus, in some embodiments, substituted amines can be used as the nitrogen containing reactants. For example, various radicals formed from plasma activation of alkyl substituted amines such as t-butylamine may be supplied to the process station. Alkyl-substituted amines, such as t-butylamine, have a lower tack coefficient for process hardware than ammonia, resulting in a relatively low physical adsorption rate and a relatively low process purge time.

In addition, these nitrogen containing reactants can form halogenated salts that are relatively more volatile than ammonium chloride. For example, t-butylammonium chloride may be more volatile than ammonium chloride. This can reduce tool down time, device defect generation and environmental abatement expense.

Further, these nitrogen containing reactants can form other amine precursors through various byproduct reactions. For example, the reaction of t-butylamine with dichlorosilane can form BTBAS. Thus, the byproducts provide another pathway to form silicon nitride, thereby potentially improving the film yield. In another example, the substituted amines may provide low temperature thermally activated paths to form a silicon nitride film. For example, t-butylamine decomposes thermally at temperatures above 300 ° C to form isobutylene and ammonia.

Although the illustrated example provided above describes the formation of silicon nitride films using t-butylamine, it will be understood that any suitable substituted amine can be used within the scope of this disclosure. In some embodiments, suitable substituted amines may be selected based on the thermodynamic and / or reaction characteristics of the reactants. For example, the relative volatility of the halogenated salts formed from the reactants can be taken into account, as the presence and selectivity of the various thermal decomposition pathways can be considered at the appropriate temperature.

In addition, while the examples provided above describe silicon nitride film deposition, it will be appreciated that the principles described above may also be generally applied to other film deposition. For example, some embodiments may use a suitable halosilane with a suitable oxygen-containing reactant species, such as an oxygen plasma, to deposit silicon oxide.

A non-limiting list of reactants, product films, and film and process characterization ranges is provided in Table 1.

Table 1
membrane Reactant
A Reactant
B Reactant
C Temperature (C) pressure
(torr) Refractive index
(ref.index) SiO ₂ BTBAS O ₂ - 50-400 1-4 1.45-1.47 SiN SiH ₃ Cl O ₂ - 50-400 1-4 SiO ₂ SiH _{(N (CH 3) 2)} 3 O ₂ - 50-400 1-4 1.45-1.47 SiN BTBAS NH ₃ - 50-400 1-4 1.80-2.05 SiN BTBAS - N ₂ / H ₂ 50-400 1-4 1.80-2.05 SiN BTBAS NH ₃ N ₂ / H ₂ 50-400 1-4 1.80-2.05 SiN SiH ₃ Cl NH ₃ Alternatively, N ₂ / H ₂ 50-400 1-4 SiN SiH ₃ Cl t-butyl
Amine Alternatively, N ₂ / H ₂ SiN SiH ₂ Cl ₂ NH ₃ Alternatively, N ₂ / H ₂ 50-400 1-4 1.80-2.05 SiN SiH ₂ Cl ₂ t-butyl
Amine Alternatively, N ₂ / H ₂ SiN _{SiH (CH 3) - (N} (CH 3) 2) 2 NH ₃ Alternatively, N ₂ / H ₂ 50-400 1-4 1.80-2.05 SiN SiH (CH ₃₎ ( Cl ₂ ) NH ₃ Alternatively, N ₂ / H ₂ 50-400 1-4 1.80-2.05 SiN _{SiHCl- (N (CH 3) 2} ) 2 NH ₃ Alternatively, N ₂ / H ₂ 50-400 1-4 1.80-2.05 SiN _{(Si (CH 3) 2 NH} ) 3 NH ₃ Alternatively, N ₂ / H ₂ 50-400 1-4 1.80-2.05

Figure 1 shows a time-lapse embodiment of exemplary CFD process phases for various CFD process parameters. Although Figure 1 illustrates two exemplary deposition cycles 110A and 110B, it will be appreciated that any suitable number of deposition cycles may be included in the CFD process to deposit the target film thickness. Exemplary CFD process parameters include, but are not limited to, flow rates of inert species and reactant species, plasma power and frequency, substrate temperature, and process station pressure. Non-limiting parameter ranges for an exemplary silicon dioxide deposition cycle using BTBAS and oxygen are provided in Table 2.

Table 2 Phase Reactant A exposure phase Reactant B exposure phase Removal Phase Plasma Activation Phase Time (sec) continuation 0.25-10 0.25-10 0.25-10 BTBAS (sccm) n / a 0.5-5.0 0 0 O ₂
(slm) 1-20 1-20 1-20 1-20 Ar (slm) 1-20 1-20 1-20 1-20 Pressure (torr) 1-4 1-4 1-4 1-4 Temperature (C) 50-400 50-400 50-400 50-400 HF power (W) 0 0 0 50-2500 LF power (W) 0 0 0 0-2500

The CFD cycle typically includes an exposure phase for each reactant. During this " exposure phase ", the reactants are delivered into a process chamber that causes the reactants to be adsorbed to the substrate surface. Typically, at the beginning of the exposure phase, the substrate surface does not adsorb appreciable amounts of reactants. In FIG. 1, in Reactant A exposure phases 120A and 120B, Reactant A is fed to the process station at a controlled flow rate, thereby saturating the exposed surface of the substrate. Reactant A may be any suitable deposition reactant, such as a main reactant or an auxiliary reactant. In one example where the CFD forms a silicon dioxide film, the reactant A may be oxygen. In the embodiment shown in Figure 1, the reactant A continues to flow throughout the deposition cycles 110A, 110B. Unlike conventional ALD processes where membrane precursor exposures are separated to prevent gaseous reactions, Reactant A and Reactant B are allowed to mix on the gas of some embodiments of the CFD process. As described above, in some embodiments, Reactant A and Reactant B are selected to coexist in the gas phase without reacting appreciably with one another under conditions visible in the reactor prior to surface reaction activation or plasma energization do. In some cases, the reaction is sufficiently high such that (1) the reaction between the reactants is thermodynamically favorable (i.e., the free energy of Gibbs < 0), (2) there is a negligible reaction at the target deposition temperature The reactants are selected to have the activation energy. The various reactant combinations that satisfy these criteria are specified elsewhere in this disclosure. Many such combinations include a main reactant providing an element that is solid at room temperature and an auxiliary reactant otherwise. Examples of auxiliary reagents used in some combinations include oxygen, nitrogen, alkyl amines and hydrogen.

Continued feeding of the reactant A to the process station results in an increase in the reactant A as compared to the ALD process where the reactant A is turned on and stabilized and then exposed to the substrate and then turned off and finally removed from the reactor The flow rate start and stabilization time can be shortened or eliminated. Although the embodiment shown in FIG. 1 has illustrated that the Reactant A exposure phases 120A and 120B have a constant flow rate, a suitable Reactant A flow can be used including variable flow rates within the scope of the present disclosure. Also, although reactant A is illustrated in FIG. 1 as having a constant flow rate during the entire CFD cycle (deposition cycle 110A), it need not be. For example, the flow rate of reactant A may decrease during the reactant B exposure phases 140A, 140B. This increases the partial pressure of the reactant B and thereby increases the force driving the adsorption of the reactant B onto the substrate surface.

In some embodiments, Reactant A exposure phase 120A may have a period of time exceeding the substrate surface saturation period of Reactant A. [ For example, the embodiment of FIG. 1 includes an exposure period 130 after reactant A saturation in Reactant A exposure phase 120A. Optionally, Reactant A exposure phase 120A comprises a controlled flow rate of inert gas. Exemplary inert gases include, but are not limited to, nitrogen, argon, and helium. The inert gas may be used to control the pressure and / or temperature of the process station, the vaporization of liquid precursors, the faster delivery of sweep gas to remove process gases from precursors and / or process stations and / or process station plumbing As shown in FIG.

In the reactant B exposure phase 140A of the embodiment shown in FIG. 1, reactant B is fed to the process station at a controlled flow rate, thereby saturating the exposed surface of the substrate. In one exemplary silicon dioxide film, Reactant B may be BTBAS. Although the embodiment shown in FIG. 1 illustrates that the Reactant B exposure phase 140A has a constant flow rate, a suitable Reactant B flow can be used including variable flow rates within the scope of this disclosure. It will also be appreciated that the Reactant B exposure phase 140A may have any suitable period of time. In some embodiments, Reactant B exposure phase 140A may have a period of time exceeding the substrate surface saturation period of Reactant B. In some embodiments, For example, the embodiment of FIG. 1 includes an exposure period 150 after reactant B saturation within Reactant B exposure phase 140A. Optionally, the Reactant B exposure phase 140A includes a controlled flow rate of a suitable inert gas as described above, which can be used to control the pressure and / or temperature of the process station, vaporize the liquid precursor, And can inhibit back diffusion of process station gases. In the embodiment shown in FIG. 1, the inert gas continues to flow to the process station during the entire reactant B exposure phase 140A.

In some embodiments, plasma activation of deposition reactions enables lower deposition temperatures in thermally activated reactions, thereby reducing the available thermal cost consumption of the integrated process. For example, in some embodiments, a plasma activated CFD process may occur at room temperature.

It will be appreciated that while the CFD process embodiment shown in FIG. 1 is plasma-activated, other non-thermal energy sources may be used within the scope of this disclosure. Non-limiting examples of these non-thermal energy sources include, but are not limited to, ultraviolet lamps, downstream or remote plasma sources, inductively coupled plasma, and microwave surface wave plasmas.

It should also be appreciated that although the multiple examples described herein include two reactants A and B, any suitable number of reactants may be used within the scope of this disclosure. In some embodiments, a single reactant and an inert gas used to supply plasma energy for the surface decomposition reaction of the reactant may be used. Alternatively, as described above in the context of Feature 7, some embodiments may use three or more reactants to deposit the film.

In some scenarios, surface adsorbed species B exist as discontinuous islands on the substrate surface, thereby making it difficult to achieve surface saturation of reactant B. Various surface states can retard the nucleation and saturation of Reactant B on the substrate surface. For example, the ligands released upon adsorption of reactant A and / or B block some surface active sites and interfere with the subsequent adsorption of reactant B. Thus, in some embodiments, it is possible to regulate the flow of reactant B into the process station during the reactant B exposure phase 140A and / or discretely pulsate the reactant B, adlayers may be provided. This can provide additional time for the surface adsorption process and the desorption process, while conserving the reactant B compared to a constant flow scenario.

Additionally or alternatively, in some embodiments, one or more removal phases may be included between successive exposures of reactant B. For example, the embodiment of FIG. 2 schematically illustrates an exemplary CFD process timing diagram 210 during a deposition cycle 210. In Reactant B exposure phase 240A, Reactant B is exposed to the substrate surface. Then, in the removal phase 260A, the reactant B is turned off and the gas phase species of the reactant B is removed from the process station. In one scenario, gaseous reactant B may be removed by a continuous stream of reactant B and / or inert gas. In other schemes, the gaseous reactant B can be removed by evacuating the process station. Removal of the gaseous reactant B may shift the adsorption / desorption process equilibrium of the adsorbed B to desorb the adsorbed ligands of B so that the discontinuous islands of adsorbed B are combined and promote surface rearrangement. In Reactant B exposure phase 240B, Reactant B is once again exposed to the substrate surface. It will be appreciated that although the embodiment shown in Figure 2 includes one instance of the Reactant B removal and exposure cycles, any suitable number of iterations of alternate removal and exposure cycles may be employed within the scope of this disclosure.

Returning to the embodiment of FIG. 1, prior to activation by plasma in phase 180A, gaseous reactant B may be removed from the process station in the removal phase in some embodiments. The CFD cycle may include one or more sweep phases in addition to the above-described exposure phases. By sweeping through the process station, gaseous reactions in which reactant B is affected by plasma activation are prevented. In addition, surface adsorbed ligands can be removed by cleaning within the process station, which can contaminate the membrane if not removed. The inert removal or cleaning gases include, but are not limited to, argon, helium, and nitrogen. In the embodiment shown in FIG. 1, the removal gas in the removal phase 160A is supplied by an inert gas stream. In some embodiments, the removal phase 160A may include one or more exhaust sub-phases for evacuating the process station. Alternatively, it will be appreciated that removal phase 160A may be omitted in some embodiments.

Removal phase 160A may have any suitable period of time. In some embodiments, increasing the flow rate of the one or more removal gases may reduce the duration of the removal phase 160A. For example, the stripping gas flow rate can be adjusted according to the various reactant thermodynamic properties and / or the geometric properties of the process station and / or process station plumbing to modify the duration of the removal phase 160A. In one non-limiting example, the duration of the removal phase can be optimized by removing gas flow rate control. This can improve the substrate throughput by reducing the deposition cycle time.

Typically, a CFD cycle includes an " activation phase " in addition to an exposure phase and an optional removal phase as described above. The activation phase serves to activate the reaction of one or more reactants adsorbed on the substrate surface. In the plasma activation phase 180A of the embodiment shown in FIG. 1, the plasma energy may be provided to activate surface reactions between the surface adsorbed reactants A and B. For example, the plasma may activate gaseous molecules of reactant A directly or indirectly to form reactant A radicals. These radicals then interact with the surface adsorbed reactant B to yield film forming surface reactions. The plasma activation phase 180A terminates the deposition cycle 110A and in the embodiment of Figure 1 this deposition cycle 110A is followed by a deposition cycle 110B which is followed by a reactant A exposure phase 120B ).

In some embodiments, the ignited plasma in the plasma activation phase 180A may be formed directly above the substrate surface. This can increase the plasma density and increase the surface reaction rate between reactant A and reactant B. For example, a CFD process plasma can be generated by applying a radio frequency field to a low pressure gas using two capacitively coupled plates. In another embodiment, a remotely generated plasma may be generated outside the main reaction chamber.

Any suitable gas may be used to generate the plasma. In a first example, an inert gas such as argon or helium may be used to form the plasma. In a second example, a reactant gas such as oxygen or ammonia may be used to form the plasma. In a third example, a removal gas such as nitrogen may be used to form the plasma. Of course, a combination of these categories of gases may be used. When the gas is ionized between the plates by the RF electric field, the plasma is ignited and free electrons are generated in the plasma discharge region. These free electrons are accelerated by the RF field and collide with the gaseous reactant molecules. When free electrons and reactant molecules collide, radical species participate in the deposition process. It will be appreciated that the RF field can be coupled through any suitable electrodes. Non-limiting examples of such electrodes include a process gas distribution showerhead and a substrate support pedestal. It will be appreciated that the plasma for the CFD process may be formed by one or more any suitable methods besides capacitively coupling the RF field to the gas.

The plasma activation phase 180A may have any suitable duration. In some embodiments, the plasma activation phase 180A may have a period of time that exceeds the period of time during which the plasma-activated radicals interact with all exposed substrate surfaces and adsorbates, thereby forming a continuous film on the substrate surface have. For example, the embodiment shown in FIG. 1 includes a post-saturation plasma exposure period 190 in the plasma activation phase 180A.

As discussed more fully below and in the discussion of Feature 4 discussed above, extending the plasma exposure time and / or providing a plurality of plasma exposure phases will provide bulk and / or surface proximity portions of the deposited film post-reaction treatment of near-surface portions may be provided. In one scenario, the surface for adsorption of reactant A may be prepared by reducing surface contamination by plasma treatment. For example, a silicon nitride film formed from the reaction of a silicon-containing reactant and a nitrogen-containing reactant may have a surface that is resistant to the adsorption of subsequent reactants. Treatment of the silicon nitride film with a plasma can produce hydrogen bonds that facilitate subsequent adsorption and reaction events.

In some embodiments, film properties such as film stress, dielectric constant, refractive index, etch rate can be adjusted by changing the plasma parameters to be discussed in more detail below. Table 3 provides an exemplary list of various film properties for the three exemplary CFD silicon dioxide films deposited at &lt; RTI ID = 0.0 &gt; 400 C. &lt; / RTI &gt; For reference, Table 3 further includes film information for an exemplary PECVD silicon dioxide film deposited at &lt; RTI ID = 0.0 &gt; 400 C. &lt; / RTI &gt;

Table 3 SiO ₂
fair Deposition rate (Angstrom / cycle) NU
((Maximum minutes) /
Average) NU
(1 sigma) Refractive index Membrane stress
(MPa) dielectric
a constant Wet
etching
Rate ratio 1 sec.
200W
O ₂ plasma
(Only HF) 0.9 5% 2% 1.456 -165 6.6 7.87 10 sec. 1000W
O ₂ plasma
(Only HF) 0.6 5% 2% 1.466 -138 3.9 1.59 10 sec. 1000W
O ₂ plasma
(HF / LF) 0.6 12% 5% 1.472 -264 3.9 1.55 PECVD SiO ₂ 600 3% One% 1.477 -238 4.2 5.28

For example, FIG. 3 schematically illustrates a CFD process timing diagram 300 that includes a deposition phase 310 and a subsequent plasma processing phase 390. It will be appreciated that any suitable plasma may be used during this plasma processing phase. In the first scenario, a first plasma gas is used during activation in the deposition cycle, and a second, other plasma gas is used during the plasma processing phase. In a second scenario, a second, other plasma gas may replenish the first plasma gas during the plasma processing phase. Unlimited parameter ranges during in-situ plasma processing cycles are provided in Table 4.

Table 4 Phase plasma
process
remove
Phase plasma
process
Activation
Phase Time (sec) 0.25-10.0 0.25-10.0 Ar (sccm) 1-20 1-20 Pressure (torr) 1-4 1-4 Temperature (C) 50-400 50-400 HF power (W) 50-2500 50-2500 LF power (W) 0-2500 0-2500

In the plasma activation phase 380 shown in Figure 3, the substrate surface is exposed to the plasma to activate the film deposition reaction. As shown in the embodiment depicted in FIG. 3, in the plasma treatment removal phase 390A, the process station is continuously flowed with reactant A and inert gas, which may be, for example, ancillary reactants such as oxygen. Cleaning the process station can remove volatile contaminants from the process station. Although the stripping gas is shown in FIG. 3, it will be understood that any suitable method of stripping reactants may be used within the scope of this disclosure. In the plasma processing activation phase 390B, the plasma is ignited to process the bulk and / or surface adjacent regions of the newly deposited film.

It should be understood that the embodiment of FIG. 3 includes one instance of a CFD cycle that includes a plasma processing phase, but any suitable number of iterations may be used within the scope of this disclosure. It will also be appreciated that more than one plasma processing cycles may be inserted (regularly or irregularly) at intervals between normal deposition cycles. For example, FIG. 4 shows an embodiment of a CFD process timing diagram 400 that includes a plasma processing phase inserted between two deposition cycles. It will be appreciated that the embodiment of FIG. 4 includes one plasma processing cycle inserted between two deposition cycles, but any suitable number of deposition cycles may precede or follow one or more plasma processing cycles. For example, in a scenario where the plasma treatment is used to change the film density, the plasma treatment cycle may be inserted after every tenth deposition cycle. In scenarios where a plasma treatment is used to prepare the surface for adsorption and reaction events, the plasma treatment phase may be included in every CFD cycle, e.g. after each CFD deposition phase.

Plasma processing of the deposited film may change one or more physical properties of the film. In one scenario, the plasma treatment can densify the newly deposited film. The densified films may be more resistant to etching than the non-densified films. For example, FIG. 5 illustrates an embodiment of a graph 500 comparing the etch rates of exemplary CFD-treated silicon dioxide films for thermally grown silicon dioxide films. The exemplary film embodiments of FIG. 5 were deposited by CFD processes 502 and 504 at a temperature range of 50 to 400.degree. For reference, the relative etch rates for silicon dioxide spacer deposits deposited by the PECVD process and undoped silicate glass (USG) are shown in FIG. The films 502 produced by the process comprising a one second high frequency oxygen plasma activation phase in each deposition cycle are deposited on the films 504 produced by the process comprising a 10 second high frequency oxygen plasma activation phase in each deposition cycle, the resistance to dilute hydrofluric acid wet etching (100: 1 H ₂ O: HF) is approximately 0.5 times. It will therefore be appreciated that the etch rate of the deposited film may be varied by varying several aspects of the plasma activation phase and / or by including more than one plasma processing cycles.

In other scenarios, the membrane plasma treatment can change the stress characteristics of the film. For example, FIG. 6 illustrates an embodiment of a correlation 600 between wet etch rate ratio and film stress for exemplary CFD silicon dioxide films. In the embodiment shown in FIG. 6, the compressive film stress may increase as the wet etch rate ratio decreases, for example, by extending the plasma exposure duration.

In other scenarios, the deposited film plasma treatment may be applied to other film components of trace film contaminants (e.g., hydrogen, nitrogen, and / or carbon in the case of an exemplary silicon dioxide film) (E.g., silicon and / or oxygen in the case of a silicon dioxide film). For example, FIG. 7 illustrates an embodiment of a correlation 700 between deposition temperature, plasma exposure duration, and film fouling concentration. 7, a CFD silicon dioxide film 704 deposited at 50 占 폚 and having an oxygen plasma activation phase of 10 seconds is deposited at the same temperature but with a CFD silicon dioxide film 702 having an oxygen plasma activation phase of 1 second, Lower hydrogen and carbon concentrations. Modifying the concentration of contaminants in the film can modify the electrical and / or physical properties of the film. For example, the dielectric constant and / or the film etch rate of the film can be controlled by adjusting the carbon and / or hydrogen concentration. It will therefore be appreciated that it is possible to provide a method of varying the film composition by changing various aspects of the plasma activation phase and / or by including one or more plasma processing cycles.

It will be appreciated that while the above-described plasma treatment is directed to oxygen plasma treatment, any suitable plasma treatment may be employed without departing from the scope of the present embodiments. For example, in some embodiments, substituted amines can be used as the nitrogen containing reactant in a suitable CFD process instead of NH ₃ . Replacing NH ₃ with a substituted amine (for example, an alkylamine such as t-butylamine) for conformal SiN deposition offers many advantages, but in some cases, the deposited film is derived from an alkylamine reactant (E.g., carbon residues from three methyl groups, each containing t-butylamine molecule (NH ₂ - (CH ₃ ) ₃ ). Carbon in these films can cause electrical leakage, making this film unsuitable for some dielectric barrier applications.

Thus, in some embodiments, the halogen plasma can be ignited during the SiN film deposition to reduce the carbon residue in the SiN film, thereby increasing the insulation characteristics of the film relatively. In some instances, carbon residue reduction can be easily observed in the FTIR spectrum. For example, SiN: C-H levels can be reduced to approximately 1% atomic levels at approximately 10% atomic levels.

Thus, in some embodiments, the silicon nitride film may be deposited by a CFD process using one or more instances of a hydrogen plasma treatment and a mixture of alkyl amines or alkyl amines contained within the nitrogen containing reactant. It will be appreciated that any suitable hydrogen plasma may be used within the scope of this disclosure. Thus, in some embodiments, a mixture of H ₂ and He or Ar or other hydrogen containing gases or active H atoms generated by a remote plasma source may be used to treat the deposited film. Further, in some embodiments, the carbon concentration of the film may be adjusted to any suitable concentration by varying one or more of the number of process pulses, the duration, the plasma treatment intensity, the substrate temperature, and the process gas composition.

It is understood that the hydrogen plasma treatment described above is for a silicon nitride film, but suitable hydrogen plasma treatment may be used to control the carbon concentration of other CFD deposited films including, but not limited to, SiOx, GeOx, and SiOxNy will be.

The specific embodiments disclosed herein relate to ultraviolet treatment (which may or may not be with plasma treatment) of oxide CFD films. This ultraviolet treatment reduces the defects in the oxide and improves the electrical properties such as the CV characteristics of the gate dielectric. Device and package applications that utilize CFD oxides that can benefit from this process include through silicon vias, logic technology using gate oxide, shallow trench isolation (STI), thin thermal oxide formed after STI-photoresist strip , A sacrificial oxide prior to P-well implantation (e.g., ~ 60 A), " well " thermal oxide growth, gate / channel oxide, DRAM PMD PECVD oxide.

In some cases, untreated CFD oxide films have been observed to have relatively poor electrical performance due to the fixed charge in the deposited film. For example, some films have been found to have significant Vfb deviations within the wafer. These problems can be solved by post-deposition treatment using ultraviolet radiation and / or thermal annealing in the presence of hydrogen. This process can be used to remove defects associated with (1) a fixed charge at the oxide to silicon interface, or (2) a fixed charge within the deposited dielectric film or (3) a fixed charge (surface charge) at the air- &Lt; / RTI &gt; Using this treatment, the Vfb deviation for the so deposited oxide was narrowed from 8.3 V to about 1.5 V after UV curing.

While these embodiments are primarily concerned with improving oxide films, the disclosed methods are generally applicable to dielectric growth, metal growth, or metal-to-dielectric interface treatments. Specific dielectric materials include, for example, silicon oxides, silicon carbides, silicon oxycarbides, silicon nitrides, silicon oxynitrides, and ashable hard mask materials including doped silicon oxide.

Examples of treatments that may be applied to improve dielectric properties include:

(A) Post-deposition of dielectric films synthesized by CFD using UV curing and subsequent hydrogen annealing. In the simplest embodiment, the UV treatment can be used alone to reduce the fixed charge.

H ₂ in the presence of a forming _{gas, NH 3 - - (B)} He, H 2, Ar, N 2, H 2 / N 2 plasma, N ₂ - plasma, N ₂ / H ₂ - plasma, NH ₃ - plasma, Pretreatment of the substrate prior to CFD dielectric film deposition using processes including Ar-plasma, He-plasma, He annealing, H ₂ -annealing, NH ₃ -annealing, and UV curing. Plasma processing may be accomplished using a variety of plasma generators including, but not limited to, microwave plasma generators, ICP-remote plasma generators, or direct plasma generators.

H ₂ in the presence of a forming _{gas, NH 3 - - (C)} He, H 2, Ar, N 2, H 2 / N 2 plasma, N ₂ - plasma, N ₂ / H ₂ - plasma, NH ₃ - plasma, Simultaneous processing (curing during deposition) using processes including Ar-plasma, He-plasma, He annealing, H ₂ -annealing, NH ₃ -annealing, and UV curing. Plasma processing may be implemented using a variety of plasma generators including, but not limited to, microwave plasma generators, ICP-remote plasma generators or direct plasma generators, or other plasma generators known to those skilled in the art. Isotropic and directional treatments including, but not limited to, remote plasma, UV exposure, direct plasma, and microplasma processing may be applied. An exemplary method involves intermittent treatment of the membrane between CFD cycle groups. One CFD cycle group can vary from about 1 to about 10000 cycles. Typical scenarios include (1) five cycles of CFD oxide growth, (2) one or more membrane treatments using any of the methods described above followed thereby, and (3) five cycles of CFD oxide film growth . This method can be used to grow a film of any desired thickness.

(D) UV treatment incidentally imparted by any of the above listed plasmas (e.g., the helium plasma emits ultraviolet radiation).

One example of an in-situ " cure " procedure during a CFD cycle includes the following operations:

- UV treatment with helium plasma

- BTBAS dose

- purge

- O ₂ / Ar-RF plasma activation

- Fudge

- repeating steps one to five times to produce a target thickness film

A range of UV curing conditions may be used in any of the listed situations. Typically, the pedestal temperature will be maintained at a temperature of 250 to 500 DEG C during curing. For many device manufacturing applications, the upper temperature limit may be 450 or 400 占 폚. The atmosphere used during curing may be active or inactive. Examples of gases that may be present during curing may include helium, argon, nitrogen, forming gas, and ammonia. The flow rate of these gases is about 2 to 20,000 sccm, preferably about 4000 to 18000 sccm. The power of the UV lamp may be, for example, about 2 to 10 kW, preferably about 3.5 to 7 kW. A suitable period of exposure to UV from such a source may be from about 20 seconds to about 200 seconds (e.g., about 90 seconds). Finally, the pressure can be maintained at a level from about 0 torr to about 40 torr.

In certain embodiments, effective treatment of CFD oxides was obtained using the following conditions:

Pedestal temperature = 400 DEG C

Atmosphere = helium

Pressure = 40 Torr helium

Flow rate = 10000 sccm

In some embodiments, thermal annealing for the oxide is performed after the UV curing operation. In one example, the following conditions were used during thermal annealing:

Pedestal temperature = 400 DEG C

Atmosphere = hydrogen + nitrogen

Pressure = 2.5 torr

Flow rate = hydrogen: 750 sccm; Nitrogen: 3000 sccm

The physical and electrical properties of the deposited film may also be varied by adjusting other process parameters such as deposition temperature. For example, the correlation 700 of the embodiment shown in FIG. 7 illustrates an exemplary relationship between the CFD film deposition temperature and the membrane contaminant concentration. As the film deposition temperature increases, the film contaminant concentration decreases. In another example, as described above in the embodiment shown in FIG. 5, as the deposition temperature increases, the wet etch rate ratio of the exemplary silicon dioxide CFD films decreases. Other deposition parameters that may be used to control the film properties include RF power, RF frequency, pressure, and flow rate. Further, in some embodiments, the film properties can be changed by selecting the reactants. For example, the hydrogen concentration of a silicon dioxide film can be reduced by using TICS (tetraisocyanate silane) as the silicon containing reactant and / or using nitrous oxide as the oxygen containing reactant.

It will be appreciated that the physical and / or electrical film properties as described above may provide opportunities for modifying device performance and yield and opportunities for modifying aspects of device manufacturing process integration. In one non-limiting example, the ability to adjust the etch rate characteristics of a CFD silicon dioxide film can make this film a candidate for etch stop applications, hard mask applications, and other process integration applications. Thus, various embodiments of CFD-generated films can be used throughout the semiconductor device fabrication process integrated herein.

In one scenario, the CFD process can deposit a conformal silicon dioxide film on a non-planar substrate. For example, CFD silicon dioxide films can be used for gap filling of structures such as trench filling of STI (shallow trench isolation) structures. It will be appreciated that the various embodiments described below relate to gap fill applications, but are merely non-limiting and exemplary applications and that other suitable uses of other suitable membrane materials are within the scope of this disclosure. Other applications for CFD silicon dioxide films include, but are not limited to, interlayer dielectric (ILD) applications, intermetal dielectric (IMD) applications, pre-metal dielectric (PMD) applications, Dielectric liner applications, ReRAM (resistive RAM) applications, and / or stacked capacitor fabrication applications in DRAM.

The doped silicon oxide may be used as a diffusion source of boron dopant, phosphorus dopant or arsenic dopant. For example, BSG, PSG, or BPSG may be used. The doped CFD layers can be used to provide conformal doping in three-dimensional transistor structures, such as multi-gate FinFETs and three-dimensional memory devices, for example. Conventional ion implanters are not capable of easily doping sidewalls, especially in high aspect ratio structures. The CFD doped oxide has various advantages as a diffusion source. First, they provide high conformality at low temperatures. In comparison, low pressure CVD produced doped TEOS (tetraethylorthosilicate) is known but requires high temperature deposition and CVD and PECVD doped oxide films at pressures below atmospheric pressure are possible at low temperatures, but have inadequate conformality. Doping conformality is important, but the conformality of the membrane itself is also important because the membrane typically has a sacrificial use and needs to be removed subsequently. Beacon formal membranes typically have more problems in their removal, that is, some areas can be over-etched. CFD also provides an extremely well controlled doping concentration. As described above, the CFD process can provide several undoped oxide layers and subsequent single doped layers. The doping level can be tightly controlled by the frequency at which the doped layer is deposited and the conditions of the doping cycle. In certain embodiments, the doping cycle is controlled using, for example, a dopant source having significant steric hindrance. In addition to conventional silicon-based microelectronic devices, other uses for CFD doping include microelectronic and optoelectronic devices such as III-V semiconductors such as GaAs, II-VI semiconductors such as HgCdTe, Discoloration techniques.

Some gap filling processes include two film deposition steps performed on different deposition tools, requiring vacuum breakdown and air exposure between deposition processes. FIG. 8 schematically illustrates an exemplary non-planar substrate 800 that includes a plurality of gaps 802. FIG. As shown in FIG. 8, gaps 802 may have variable aspect ratios that can be defined as a ratio to gap width W of gap depth H for each gap 802. For example, a logic region of an integrated semiconductor device may have variable gap aspect ratios corresponding to different logic device structures.

As shown in FIG. 8, the non-planar substrate 800 is covered by a conformal film 804. Conformal film 804 has fully filled gaps 802A while gaps 802B and 802C remain open. Closing the gaps 802B and 802C using a conformal film may prolong the process time. Thus, in some schemes, thick films may be ex-situ deposited using higher deposition rate processes such as CVD and / or PECVD methods. However, x-situ deposition of gap fill films can degrade wafer throughput in the production line. For example, substrate handling and transfer time between deposition tools can reduce the number of substrate processing activities during the production period. This may reduce production line throughput and may require installation and maintenance of additional processing tools in the production line.

In addition, gap 802C may have an aspect ratio that is suitable for gas phase deposition processes, while gap 802B may be followed by incomplete filling by a higher deposition rate process to form a keyhole- Aspect ratio. For example, FIG. 10 shows an exemplary high aspect ratio structure 1000 formed in a substrate 1002. As shown in FIG. 10, the bread loafing effects during the deposition of the thick film 1006 create a keyhole shaped void 1008. This keyhole shaped void can be reopened in subsequent processes and filled with conductive films, which causes a device short circuit phenomenon.

Some approaches to dealing with high aspect ratio gaps such as gap 802B include providing device design rules that inhibit the creation of such gaps. However, these device design rules require additional masking steps, making device design difficult and / or increasing the area of integrated semiconductor devices, which can increase manufacturing costs. Thus, in some embodiments, a CFD process may include an in-situ transition from a CFD process to a CFD process or a PECVD process. For example, FIG. 9 illustrates an embodiment of a CFD process timing diagram 900 divided into three phases. The CFD process phase 902 illustrates an exemplary CFD process cycle. For clarity, it should be understood that although a single CFD process cycle is shown in the embodiment shown in FIG. 9, any suitable number of CFD process cycles and plasma processing cycles may be included in the CFD process phase 902. [ A transition phase 904 follows the CFD process phase 902. As shown in the embodiment of FIG. 9, the transition phase 904 includes aspects of both a CFD process and a PECVD process. Specifically, Reactant B is provided to the process station after the end of Reactant B exposure phase 904A such that both Reactant A and Reactant B are in the gaseous phase in the plasma activation phase 904B. This can provide PECVD type gas phase reactions that occur simultaneously with CFD type surface reactions. It will be appreciated that although the transition phase 904 includes only one iteration of the reactant B exposure phase 904A and the plasma activation phase 904B, any suitable number of iterations may be included in the transition phase.

In some embodiments, the plasma generator may be controlled to provide interrupted pulses of plasma energy during the plasma activation phase 904B. For example, the plasma may be pulsed at one or more frequencies including, but not limited to, frequencies from 10 Hz to 150 Hz. This can improve step coverage by reducing the directionality of ion bombardment as compared to continuous plasma. In addition, this can reduce the ion collision damage of the substrate. For example, photoresist substrates can be eroded by ion bombardment during a continuous plasma. By pulsing the plasma energy, photoresist erosion can be reduced.

In the embodiment shown in FIG. 9, the flow rate of reactant B during plasma activation phase 904B is less than the flow rate of reactant B during Reactant B exposure phase 904A. Thus, the reactant B is " trickled " into the process station during the plasma activation phase 904B. This can provide a gaseous PECVD reaction to complement the CFD type surface reaction. However, it will be appreciated that, in some embodiments, the flow rate of reactant B may vary over the course of the transition phase or during a single plasma activation phase. For example, in a transition phase involving two repetitions of reactant B exposure and plasma activation, the flow rate of reactant B during the first plasma activation phase may be lower than the flow rate of reactant B during the second plasma activation phase . Changing the flow rate of reactant B during the plasma activation phase 904B may provide a smooth transition from the step coverage characteristics of the CFD process phase 902 to the deposition rate characteristics of the PECVD process phase 906.

In some embodiments, the CFD process may include in-situ etching to selectively remove the re-entrant portion of the deposited film. Unlimited parameter ranges for an exemplary silicon dioxide deposition process involving in-situ etching during a gap filled CFD process are provided in Table 5.

Table 5 Phase Reactant A exposure phase Reactant B exposure phase remove
Phase plasma
Activation
Phase
etching
Phase Time (sec) Continuous 0.25-10.0 0.25-10.0 0.25-10.0 0.25-10.0 BTBAS (sccm) - 0.5-2.0 0 0 0 O ₂
(slm) 1-20 1-20 1-20 1-20 0 NF ₃
(sccm) 0 0 0 0 1-15 Ar (slm) 1-20 1-20 1-20 1-20 1-20 Pressure (torr) 1-4 1-4 1-4 1-4 1-4 Temperature (C) 50-400 50-400 50-400 50-400 50-400 HF power (W) 0 0 0 50-2500 50-2500 LF power (W) 0 0 0 0-2500 0-2500

FIG. 11 illustrates an embodiment of a CFD process timing diagram 1100 including a deposition phase 1102, an etching phase 1104, and a subsequent deposition phase 1106. In the deposition phase 1102 of the embodiment shown in FIG. 11, a film is deposited on the exposed surface of the substrate. For example, the deposition phase 1102 may include one or more CFD process deposition cycles.

In the etching phase 1104 of the embodiment of FIG. 11, the reactants A and B flow is stopped and the etching gas is introduced into the process station. One non-limiting example of an etching gas is NF ₃ (nitrogen trifluoride). In the embodiment shown in FIG. 11, the etching gas is activated by the ignited plasma during the etching phase 1104. Various process parameters such as process station pressure, substrate temperature, etch gas flow rate can be adjusted during the etching phase 104 to selectively remove re-entrant portions of the film deposited on the non-planar substrate. Any suitable etching process may be employed within the scope of this disclosure. Other exemplary etching processes include, but are not limited to, reactive ion etching of the etching species, non-plasma gas phase etching, solid phase sublimation, and adsorption and directional activation (e.g., by ion bombardment).

In some embodiments, incompatible gaseous species may be removed from the process station before and after etching the film. For example, the embodiment of FIG. 11 includes a continuous flow of inert gas after reactant A and reactant B have been stopped during etch phase 1104 and after the etch gas has ceased.

At the end of the etching phase 1104, a deposition phase 1106 begins to further fill the gaps on the non-planar substrate. The deposition phase 1106 can be any suitable deposition process. For example, the deposition phase 1106 may include one or more of a CFD process, a CVD process, a PECVD process, and the like. While the embodiment of FIG. 11 shows a single etch phase 1104, it will be appreciated that a plurality of in-situ etches may be inserted into the intervals between multiple deposition phases of any suitable type during the gap filling process.

12A-12C illustrate exemplary cross-sections of a non-planar substrate in various phases of the in-situ deposition process and the in-situ etching process described above. 12A shows a cross-section of an exemplary non-planar substrate 1200 including a gap 1202. FIG. The gap 1202 is covered with the thin film 1204. Thin film 1204 is nearly conformal to gap 1202, but thin film 1204 includes reentrant portion 1206 near the top of gap 1202.

In the embodiment shown in FIG. 12B, the reentrant portion 1206 of the thin film 1204 is selectively removed so that the top region 1204A of the thin film 1204 is thinner than the bottom region 1204B. This selective removal of the recessed portion and / or sidewall angle adjustment can be achieved by imparting mass transfer constraints and lifetime constraints on the active etch species. In some embodiments, selective etching at the top of the gap 1202 may adjust the sidewall angle of the gap 1202 such that the gap 1202 has a greater width at the top than at the bottom. This can further reduce the effect of forming the bread shape in subsequent deposition phases. In the embodiment shown in FIG. 12C, after a subsequent deposition phase, gap 1202 is almost filled and no voids are visible.

Another embodiment of the in-situ etching process is shown in FIG. 15, which shows a through silicon via (TSV) 2500 for a copper electrode. Some exemplary TSVs have a depth of approximately 105 microns and have a diameter of approximately 6 microns, providing an aspect ratio of approximately 17.5: 1 and may have a thermal budget ceiling of approximately 200 degrees Celsius. As shown in the embodiment of FIG. 15, the through silicon vias 2500 are covered by a dielectric isolation layer 2502 for electrically isolating the silicon substrate from the metal filled vias. Exemplary dielectric isolation layer materials include, but are not limited to, silicon dioxide, silicon nitride, low k dielectric materials. In some embodiments, the above-described exemplary etching processes may be supplemented by physically sputtering the recessed portion again using a suitable sputter gas such as argon.

Other exemplary uses for CFD films include, but are not limited to, conformal low k films for back-end-of-line interconnect isolation applications (e.g., k values less than or equal to about 3.0 in some non- ), Conformal silicon nitride films for etch stop and spacer layer applications, conformal antireflective layers, and copper adhesion and barrier layers. Numerous other compositions of low k dielectrics for the BEOL process can be fabricated using CFD. Examples include silicon oxide, oxygen doped carbide, carbon doped oxide, oxynitride, and the like.

In another example, in one integrated process scenario, a silicon dioxide spacer layer may be deposited on the photoresist " core ". The use of photoresist cores instead of other core materials (such as silicon carbide layers) can eliminate the patterning step in an integrated process. This process involves patterning the photoresist using normal lithographic techniques and then depositing a thin layer of CFD oxide directly on the core. A directional dry etch is then used so that the CFD oxide film is removed at the top of the patterned photoresist and only the oxide remains along the sidewalls of the patterned photoresist at the bottom (considering the trenches). In this stage, simple ashing is used to remove the exposed cores remaining behind the CFD oxide. So far, there has been a single photoresist line, but now there are two CFD oxide lines. Thus, the present process doubles the pattern density and is therefore referred to as " double patterning ". Unfortunately, the use of photoresist cores limits the spacer layer deposition temperature to less than 70 ° C, which may be lower than the deposition temperature of conventional CVD, PECVD, and / or ALD processes. Thus, in some embodiments, a low temperature CFD silicon dioxide film may be deposited at a temperature less than 70 占 폚. It will be appreciated that other potential integrated process applications may exist for suitable CFD-generated membranes within the scope of this disclosure. Also, in various embodiments, a nitride, such as silicon nitride deposited as described above, may be used as the conformal diffusion barrier layer and / or etch stop layer in various stages of semiconductor device fabrication.

Although the various CFD deposition processes described above were for depositing, treating and / or etching single-film types, some CFD processes within the scope of this disclosure may involve in-situ deposition of multiple film types Will be understood. For example, the film types of alternating layers can be deposited in-situ. In the first scenario, a dual spacer for the gate device may be fabricated during the-situ deposition, which is a silicon nitride / silicon oxide spacer stack. This can reduce cycle time, increase process station throughput, and inhibit interlayer defects formed by potential film layer incompatibilities. In a second scenario, an antireflective layer for lithographic patterning applications may be deposited as a stack of SiON or amorphous silicon and SiOC with adjustable optical properties.

In certain embodiments, the dopant-containing source layer is formed by a conformal film deposition process. This layer is referred to as the " source " layer because it provides a source of dopant species (e.g. dopant atoms such as boron, phosphorus, gallium and / or arsenic). The doped CFD layer serves as a source of dopant for doping the underlying structure (or overlying structure) in the device. After the source layer is formed (or during its formation), the dopant species are driven into or contained within adjacent structures in the device being fabricated. In certain embodiments, the dopant species are driven by an annealing operation during or after forming the conformal dopant source film. The highly conformal nature of CFD makes it possible to dope unconventional device structures including structures that require doping in three dimensions. The CFD dopant source layer is typically formed by one or more of the processes described herein, but includes additional process operations to introduce dopant species. In some embodiments, the dielectric layer may serve as a base source layer from which dopant species are introduced.

For example, doped silicon oxide may be used as a diffusion source for boron, phosphorus, arsenic and the like. For example, boron doped silicate glass (BSG), phosphorus doped silicate glass (PSG), and boron phosphorus doped silicate glass (BPSG) can be used.

Doped CFD layers can be employed to provide conformal doping in three-dimensional transistor structures, such as multi-gate FinFETs and three-dimensional memory devices, for example. Examples of some three-dimensional transistor structures are " Tri-gate (Intel) ": J. Cavalieros et al., Symp. VLSI Tech Pg 50, 2006 and " FinFET ": Yamashita et al. (IBM Alliance), VLSI 2011, both of which are incorporated herein by reference in their entirety. Conventional ion implanters can not readily dope sidewalls, especially in high aspect ratio structures. Also, in a dense array of i3D structures, there may be a shadowing effect for the directional ion beam in the injector, which can cause severe dose retention problems at oblique injection angles do. In addition to conventional silicon-based microelectronic devices, other applications of CFD doping include III-V semiconductors such as GaAs, II-VI semiconductors such as HgCdTe, optoelectronic devices, flat panel displays, Microelectronic devices and optoelectronic devices based on electrochromic technology.

Figure 16 illustrates a transistor having a three-dimensional gate structure in which source and drain are formed in thin vertical structures that are difficult to be doped by conventional ion implantation techniques. However, if a thin layer of n-doped or p-doped CFD oxide is formed on the vertical structure, conformal doping is achieved. It has been observed that conformal doping increases the current density in three-dimensional devices by 10 to 25% due to reduced series resistance. Yamashita et al. Please refer to VLSI 2011.

CFD doped oxides as diffusion sources have a variety of advantages. First, they provide high conformality at low temperatures. Because the doping film can be sacrificial, the beacon-containing film typically faces more challenges when it is removed, i. E. Some areas can be over-etched. As described, CFDs provide highly conformal films. CFD also provides a very well controlled doping concentration. The CFD process can provide one or more undoped oxide layers and optionally a single doped layer thereafter. The doping level can be tightly controlled by the frequency with which the doped layer is deposited and the conditions of the doping cycle. In certain embodiments, the doping cycle is controlled, for example, by using a dopant source having a significant steric hindrance.

Figure 17 provides a basic CFD sequence of operations from left to right as time passes along the x-axis. Numerous variations are supported, which are provided for illustrative purposes only. Initially in this sequence, during operation A, a vapor phase oxidant is introduced into the reaction chamber containing the substrate on which the CFD films are to be deposited. Examples of suitable oxidizing agents include oxygen the elements (e.g., O ₂ or O _3), nitrous oxide (N ₂ O), water (water), alkyl alcohols such as isopropanol, carbon monoxide, and carbon dioxide. The oxidant is typically provided with an inert gas such as argon or nitrogen.

Next, in operation B, a dielectric precursor is temporarily introduced into the reaction chamber. The duration of action B is selected to allow the precursor to be absorbed onto the substrate surface in an amount sufficient to support one cycle of film growth. In some embodiments, the precursor saturates the substrate surface. The precursor will be selected to produce a dielectric of the target composition. Examples of dielectric compositions include silicon oxides (including silicate glass), silicon nitrides, silicon oxynitrides, and silicon oxycarbides. Examples of suitable precursors are alkylamino silanes (SiH _x (NR ₂ ) _4-x ) wherein x = 1-3, and R is methyl, ethyl, propyl, and butyl with various isomeric configurations , And halosilanes ((SiH _x Y _4-x ) where x = 1-3 and Y includes Cl, Br, and I). More specific examples include bis-alkylamino silanes and sterically hindered alkyl silanes. In one particular example, BTBAS is a precursor for producing silicon oxide.

During operation B, the oxidant introduced into the chamber during phase A continues to flow. In certain embodiments, the oxidant continues to flow at the same rate and at the same concentration as during operation A. At the end of operation B, the flow of the dielectric precursor into the chamber is terminated and operation C is initiated as shown. During operation C, oxidant and inert gas continue to flow during operation A and operation B to purge the remaining dielectric precursors in the reaction chamber.

When purging is complete during operation C, the precursor reacts on the substrate surface to form a portion of the dielectric film (see action D). In various embodiments, a plasma is applied to activate the response of the adsorbed dielectric precursor. In some instances, this reaction is an oxidation reaction. A portion of the oxidizing agent previously introduced into the reaction chamber may be adsorbed to the substrate surface with the dielectric precursor to provide an available oxidizing agent for the plasma mediated surface reaction.

Operations A through D collectively provide a single cycle of the dielectric film deposition process. It should be understood that other CFD embodiments described herein may be used in place of the basic cycle shown herein. In the illustrated embodiment, the deposition cycles A through D are performed without the introduction of any dopant species. In various embodiments, the cycles represented by operations A through D are repeated one or more times in succession prior to the introduction of the dopant species. This is indicated by phase E in Fig. In some instances, operations A through D are repeated at least once, at least twice, or at least five times before dopant introduction.

As an example, the dielectric is deposited at a rate of about 0.5 to 1 angstroms per cycle. Through each of the one or more cycles (repeats A through D), the oxidant continues to flow into the reaction chamber.

At some point in this process, cycles of dielectric deposition are stopped by introduction of dopant precursor species such as diborane. This is illustrated by operation F in the figure. Examples of dopants that can be provided in the dielectric source film include valence III and IV elements such as boron, gallium, phosphorus, arsenic, and other dopants. In addition to diborane, examples of dopant precursors include phosphine and other hydride sources. Non-hydride dopants such as alkyl precursors (e.g., trimethyl gallium), halo precursors (e.g., gallium chloride) may also be used.

In some versions, a dopant is deposited at the interface with the underlying substrate and dopant pulses are doped (as described) followed by intervening CFD cycles of the cycles (as described) and optionally doped with a CFD oxide film The top is treated with a protective " capping " layer that is not topped off. Reference is made to an example of the resulting stack of FIG.

In certain embodiments, the dopant precursor species are provided in a reaction chamber while being mixed with a carrier gas such as an inert gas (e.g., argon) but not with an oxidizing agent or other reactants. Thus, in this basic example, the flow of oxidant stops during operation F. In other embodiments, the precursor is introduced with a reducing agent or an oxidizing agent. In certain embodiments, the concentration of the dopant to the carrier gas may be from about 1: 5 to 1:20. In certain embodiments, the dopant deposition temperature is about 300-400 ° C. The duration of the dopant exposure step varies with the target dopant concentration. In certain embodiments, the exposure step is from about 2.5 seconds to about 7.5 seconds. In certain embodiments, diboron flows at 1000 sccm at 3 Torr pressure and at about 400 &lt; 0 &gt; C and 10000 sccm argon.

In certain embodiments, the dopant precursor is assembled on the substrate surface by a non-surface defined mechanism. For example, precursors can be deposited by a CVD type process rather than an ALD (surface adsorption limited) process.

Optionally, the dopant precursor is purged from the reaction chamber prior to further processing of the dielectric film. Also shown in FIG. 17 is a selective activation operation G that can be mediated by plasma, elevated temperature, etc. after dopant precursor delivery. In an example of diborane as a dopant precursor, the activation operation converts diborane to elemental boron. After the operation G is completed, the process continues with a selective purge (not shown).

In one example, with respect to diborane dopant CVD, the activation operation is only a temperature-based decomposition that produces boron. This is a temperature sensitive process. At higher temperatures, relatively short exposure times may be employed to achieve the same boron concentration per unit thickness. Alternatively, in some processes (e.g., processes that employ TMB (trimethylborane)), activation may include a plasma or thermal oxidation step. In the case of some other precursors, it may be appropriate to employ a " pinning " step of holding the free boron or other dopant in place. This can be accomplished using a " pinning " plasma.

In certain embodiments, the plasma activation is associated with RF power at any frequency suitable for introducing carbon into the film. In some embodiments, the RF power source may be configured to independently control the high frequency RF power source and the low frequency RF power source. Examples of low frequency RF powers may include, but are not limited to, about 200 to 1000 kHz frequencies. Examples of high frequency RF powers may include, but are not limited to, frequencies from about 10 to 80 MHz (e.g., 13.56 MHz). Likewise, RF power sources and matching networks also operate at any suitable power to form a plasma. Examples of suitable power include, but are not limited to (about 100 to 3000 W) in the case of a high frequency plasma (per wafer) and about 100 to 10000 W in the case of a low frequency plasma. The RF power source may operate at any suitable duty cycle. Examples of suitable duty cycles include, but are not limited to, duty cycles of about 5% to 90%. Generally acceptable process pressures are about 0.5 to 5 Torr and preferably about 2 to 4 Torr. For certain plasma pretreatments (of the underlying substrate) prior to exposure to the dopant, a pressure of up to about 10 Torr (or a pressure of about 9 Torr) proved to be effective.

The following Table 6 summarizes the ranges of plasma parameters that can be used in various BSG processes:

fair Plasma power Plasma exposure time Process pressure CFD oxidation growth HF: 200 to 2500 W 0.1 to 5 s 0.5 - 5 Torr Plasma pretreatment HF: 100 to 1000 W; LF: 0 to 1000 W 0 to 60 s 2 - 9 Torr

In the basic process shown, the cycles of dielectric deposition and intermittent dopant delivery (operations A through G) can be performed a plurality of times as shown in phase H of the figure. The actual number of times the process sequence is performed depends on the target total thickness of the film and the thickness of the dielectric film deposited per cycle and the amount of dopant contained in the film. In some embodiments, operations A through G may be repeated at least twice, at least three times, at least five times, or at least ten times.

After the dielectric film is completely deposited, the dielectric film can be used as a source of dopant species for nearby semiconductor structures. This can be done by driving the dopant from the deposited film into the device structure as shown in operation I of FIG. In various embodiments, this driving is accomplished by a thermally mediated diffusion process, such as annealing. In some cases, particularly in the case of employing ultra-shallow junctions (USJ), laser spike annealing may be employed.

Numerous variations on these basic processes may be realized. Some of these variations have the purpose of increasing the amount of dopant available to diffuse into adjacent semiconductor structures. Other variations are designed to control the rate at which the dopant transfers from the source film into the nearby semiconductor structure. Other variations control the direction in which the dopant species diffuse. It is sometimes desirable to direct the diffusion of the dopant away from the opposite side of the film towards the device structure.

In certain embodiments, the frequency with which the dopant is introduced into the growing dielectric film is controlled. If the frequency of the dopant precursor delivery cycle is high, the dopant concentration in the final dielectric film becomes large overall. This can also make the dopant relatively evenly distributed throughout the film. When a small number of dopant precursor delivery cycles are inserted into the deposition processes, the high dopant concentration regions in the film are more widely spaced in cases where the frequency of dopant delivery cycles is high.

In one embodiment, the dopant precursor is delivered once for each cycle of dielectric deposition with a growing dielectric film. In another embodiment, the dopant precursor is delivered once per every other cycle of dielectric deposition. In other embodiments, a less frequently occurring dopant precursor delivery cycle may be included in the process. For example, the dopant species may be delivered once every third, fourth, or fifth cycle of dielectric deposition. In some cases, the dopant precursor is delivered at a frequency of every fifth to twentieth cycle of the dielectric deposition.

It should be understood that the frequency of dopant precursor introduction cycles into the growing film need not be constant throughout the dielectric film deposition process. With this in mind, the final dielectric film may have a graded concentration of the dopant such that the average concentration of the dopant is non-uniform over the thickness of the deposited dielectric film. In one embodiment, the concentration of the dopant may be greater on the side of the dielectric film in contact with the semiconductor device structure to be doped. Of course, the dopant concentration gradient in the dielectric film can be tailored as desired by carefully varying the frequency of the dopant delivery cycle throughout the process of the entire dielectric deposition process.

Other variations on the basic process include adjusting the amount of dopant precursor delivered during any dopant precursor delivery cycle. The amount of dopant precursor delivered during any given dopant precursor delivery cycle may be determined by the concentration of the dopant precursor delivered to the reaction chamber and the duration of exposure of the substrate to the transferred dopant precursor.

As noted above, some dopant precursors may be provided on the growing film through a CVD-type process. In these cases, the amount of dopant precursor delivered to the film growing in any given cycle is not limited by adsorption or other surface-mediated phenomena. Thus, the amount of dopant precursor provided during any dopant delivery cycle can be relatively large and controllable. The overall concentration of the dopant in the dielectric film increases to such an extent that a greater amount of dopant precursor is delivered during any dopant delivery cycle. This can offset the effect of having relatively less frequent dopant precursor delivery cycles in the overall process. However, it should be understood that increasing the amount of dopant delivered during any given dopant precursor delivery cycle may result in a relatively high local concentration of dopant in the film. Of course, this dopant concentration spike can be mitigated through other operations that diffuse the dopant such that the annealing or dopant concentration is more uniform in the dielectric film.

When boron is a dopant, the flux of boron delivered during a typical boron precursor delivery cycle may vary from about 7.5 ML (Mega-Langmuirs) to 30 ML, depending on the target film concentration, and ML is the flux / exposure unit .

In some embodiments, the amount of dopant precursor delivered in each precursor delivery cycle is not constant over the growth of the entire dielectric film. Thus, the amount of dopant precursor delivered per cycle can be tailored to obtain a target dopant concentration gradient in the dielectric film. For example, it may be desirable to provide a greater amount of dopant precursor in a dopant precursor delivery cycle that occurs at locations within the dielectric film that are relatively close to the semiconductor features to be doped. The resulting concentration gradient has a higher dopant concentration in the film regions that are in contact with the device structure to be doped.

In some embodiments, the dopant precursor is introduced on the substrate surface in an adsorption-limited manner. Using this precursor, the introduction of the dopant into the film proceeds through an ALD-type process (as opposed to a CVD-type process as described above). Examples of dopant precursors that adhere to a substrate surface by an adsorption-mediated process include other alkyl precursors such as trimethyl borane and trimethyl gallium. Examples of dopant precursors that accumulate on a substrate surface by a CVD-type process include diborane, phosphine, and arsine.

Generally, the concentration profile of the dopant in the dielectric film can be suitably adjusted. In one embodiment, the dopant concentration spikes to a high level at the edge of the film adjacent to the structure to be doped. In some embodiments, the concentration increases and decreases intermittently over the film thickness. In one example, a dopant (e.g., boron) is provided only at the interface between the underlying substrate and the CFD dielectric layer. This dopant layer is sometimes referred to as a " spike layer ". In some cases, pulsing the dopant exposure rather than employing a single-step (e.g., using CVD exposure of the dopant fryer) increases the uniformity in the wafer of dopant incorporation . In another example, a CFD oxide or other dielectric is interposed intermediate with the dopant (e.g., boron in doped BSG). 18 and 19, respectively. The interposed dielectric doped may or may not be provided with a spike layer. In another example, an undoped CFD oxide or other dielectric cap may serve as a protective layer. 18 and 19 are referred to.

The dielectric film itself in which the dopant species reside can be tailored to affect the diffusion of the dopant species through the film itself. For example, the film density and / or chemical composition can be controlled to have a desired effect on dopant species diffusion. In some ways, the total dielectric thickness has the same density or composition such that the tailored dopant diffusion characteristics do not change over the film thickness. In other ways, the film properties are tailored such that the dopant diffusion varies across the film thickness. The inventors have found that, for example, plasma oxidation parameters can be varied such that a greater dopant diffusion over the CFD oxide during annealing makes the CFD oxide less dense.

In certain embodiments, the composition of the dielectric film (or the process gas used to form the film) is tailored to affect the dopant diffusion therein. For example, it has been found that the ratio of nitrogen to oxygen in the oxidant process gas delivered into the reaction chamber during dielectric film deposition cycles affects the ability of the dopant species to diffuse through the dielectric film. For example, the amount of more nitrogen present in the oxidant gas used during dielectric film formation results in a dielectric film with significant resistance to dopant diffusion. In contrast, if the amount of oxygen present in the gas is relatively large, the resistance to dopant diffusion becomes much smaller. The nitrogen present in the process gas may be provided in the form of a nitrogen containing compound (e.g., N ₂ O) or elemental nitrogen N ₂ . In various embodiments, the oxidant continuously flowing during the dielectric film deposition cycle comprises nitrous oxide.

In certain embodiments, the dielectric film is fabricated by first using an oxidant gas that has a relatively high oxygen content during the initial growth phase of the dielectric film and a relatively low nitrogen content. Thereafter, after the film is partially formed on the substrate structures to be doped, the oxidant gas composition is changed such that the nitrogen is relatively more abundant therein. For example, during the initial deposition cycle, the oxidant gas used for the dielectric film may contain oxygen, which is the entire molecule. In a subsequent dielectric deposition cycle, the oxidant gas is modified such that oxygen is at least partially replaced with nitrous oxide. This assumes that the purpose is to promote diffusion in the direction toward the bottom of the film and to prevent diffusion in the direction toward the top of the film, assuming that the device structure to be doped is located under the dielectric film. The present inventors have found that the blocking effect on boron diffusion is significant if the nitrogen concentration level is greater than about 1E20 atoms / cc (as measured, for example, by SIMS). In contrast, when the nitrogen concentration level is below about 1E19 atoms / cc, the blocking effect on boron diffusion can be effectively removed.

Taking into account the film composition itself, the nitrogen content in the film may change to a relatively high level in the portion located opposite the structure to be doped at a relatively low level in the portion of the film near the substrate structure to be doped.

The deposition temperature employed during dielectric film formation also affects the ability of the dopant to diffuse into the film. Generally, it has been found that the dielectric deposited at relatively low temperatures by CFD processing generally enabled a relatively high dopant diffusion rate. Examples of relatively low temperatures associated with relatively high dopant diffusion rates are temperatures in the range of about 300 to 400 占 폚 or, more specifically, temperatures in the range of about 350 to 400 占 폚. Of course, this temperature range depends on dielectric precursors and other deposition parameter choices. While they can be employed with a large number of precursors, they are particularly suitable for using BTBAS as a dielectric precursor.

In contrast, a dielectric deposited at a relatively high temperature tends to resist diffusion of dopant species. In the case of using BTBAS as the dielectric precursor, examples of relatively high temperatures associated with relatively low dopant diffusion rates are temperatures in the range of about 350 to 400 占 폚 or, more specifically, temperatures in the range of about 300 to 380 占 폚. Of course, this temperature range can also be applied to other precursors. It is also true that high temperatures typically provide dense films that interfere with dopant diffusion, but diffusivity and / or density may also be controlled through other parameters such as power and RF exposure time during plasma oxidation. Examples of basic parameters that can be employed during CFD oxide growth include (1) high frequency plasma at about 200 to 2500 watts (for a 300 mm wafer) and (2) about 0.2 to 1.5 seconds And plasma exposure time.

In certain embodiments, a relatively low temperature is employed to deposit a dielectric film adjacent to the device structure to be doped, and a higher temperature is employed to deposit a portion of the dielectric film that is further away from the structure. In certain embodiments, the temperature employed during the deposition of the entire dielectric film varies and also varies during the nitrogen-free deposition process for oxygen in the oxidant gas. As a result, the dopant diffusion characteristics of the resulting dielectric film can vary to an exaggerated degree over the thickness of the film.

In various embodiments, the deposition temperature is controlled by heating and / or cooling the pedestal or chuck holding the substrate during CFD. An example of a suitable pedestal is disclosed in U.S. Patent Application No. 12 / 435,890 (publication number 2009-0277472), filed May 5, 2009, and U.S. Patent Application No. 13 / 086,010, filed April 13, 2011, All of which are incorporated herein by reference in their entirety.

In certain embodiments, the device structure on the substrate surface to be doped is pre-processed prior to deposition of the dielectric film or dopant precursor. In one example, pretreatment involves exposure to a plasma, such as a reducing plasma. Such processing may be appropriate, for example, when the substrate features to be doped include silicon. Typically, silicon contains a small amount of native oxide that can serve as a barrier to subsequent diffusion of the dopant. In a specific embodiment, prior to the first cycle of dielectric film deposition, the substrate surface is pretreated with a reducing plasma, such as a hydrogen containing plasma, and then the substrate surface is in contact with a dopant precursor in the vapor phase. The precursor may be transferred into the reaction chamber immediately after the plasma pretreatment is completed. In some instances, the dopant precursor is diborane. In general, the process shown in FIG. 17 may be modified so that the dopant or dopant precursor is transferred to the substrate surface prior to the first dielectric deposition cycle.

In various embodiments, the partially formed dielectric film itself is pretreated using a plasma or other activation process prior to exposure of the dopant fryer to each other. This can be achieved by (a) providing thermal uniformity prior to exposure of the dopant precursor and (b) by activating the dielectric surface to increase the dopant precursor tackiness to the dielectric surface (e.g., by chemical and / or physical roughening) To improve wafer-to-wafer uniformity.

In certain other embodiments, the chemical conditions of the dopant species are controlled during the dopant precursor delivery phase and / or the activation phase of the film deposition process. In some embodiments, a dopant precursor is processed in a manner that " fixes " the dopant in the dielectric film and thereby limits dopant diffusion until the dopant is subsequently activated by annealing or other such operation. In one example, certain dopants are fixed by oxidizing them or their precursors during the dopant delivery phase of the dielectric film deposition process. In certain instances, diborane is delivered to the fixed chamber in an oxidizing atmosphere that effectively immobilizes the resulting boron-containing material within the dielectric film. Alternatively, the dopant is immobilized by transferring the precursor into the reaction chamber in an inert or reducing atmosphere, and then exposed to an oxidizing atmosphere while being located on the dielectric film. Conversely, without subsequent oxidation, treatment of certain dopant precursors using a reducing agent may produce a more mobile dopant in the dielectric film.

After the source layer is formed (or during its formation), the dopant species are driven or otherwise introduced into adjacent structures in the device being fabricated. In certain embodiments, the dopant species are driven by annealing during or after formation of the conformal dopant source film. In addition to conventional thermal annealing, for example, flash annealing and laser spike annealing may be used. The annealing time and temperature may vary depending on the concentration, amount and type of dopant in the source layer, the composition and morphology of the source layer substrate (e.g., oxide glass), the distance that the dopant species must migrate into adjacent device structures, The target concentration of the dopant, and the composition and morphology of the device structure. In certain embodiments, the annealing is performed at a temperature of about 900 to 1100 DEG C for about 2 to 30 seconds.

Various devices are designed to deposit the doped dielectric films described herein. Generally, these devices will include a process chamber for holding the substrate during deposition of the doped film. The process chamber will include one or more inlets for receiving process gases, including dielectric precursors, oxidants, carrier gases or inert gases, dopant species, and the like. In various embodiments, the apparatus includes a feature for generating a plasma having properties suitable for generating dielectric layers, a feature for introducing the dopant into the dielectric layer, electrical characteristics, optical properties, mechanical properties, And / or features for processing the dielectric layer to modify the chemical properties and features for driving the dopant from the film into the substrate. Typically, the apparatus will include a vacuum pump or components for connection to such a vacuum pump. In addition, the apparatus will have a controller or controllers configured or designed to control the apparatus to achieve the sequence of doped dielectric deposition operations described herein. The controller may include instructions for controlling various features of the apparatus including a valve for process gas delivery and pressure control, a power source for generating plasma, and a vacuum source. These instructions can control the timing and sequence of various operations. In various embodiments, the apparatus is provided in Vector ^TM , a family of deposition tools available from Novellus Systems, Jose San Jose, CA. Other features of a device suitable for depositing doped dielectric films are described elsewhere herein.

Doped CFD film properties

A dielectric film that serves as a source of dopant species will have various properties. In various embodiments, the film thickness is from about 20 to 200 angstroms. In some instances, for example, for front end doping of the source-drain extensions of a three-dimensional transistor structure, the film thickness is about 50 to 100 angstroms. The average concentration of dopant atoms (or other dopant species) in the dielectric film depends on various factors including the total amount of dopant per surface area of the film and the diffusivity of the dopant atoms in the film and the doping application. In certain embodiments, the concentration of the dopant in the film is from about 0.01 weight percent to 10 weight percent. In other embodiments, the concentration of the dopant in the film is from about 0.1 weight percent to 1 weight percent. In still other embodiments, the concentration of the dopant in the film is from about 0.5 weight percent to about 4 weight percent. The techniques described herein enable dopant concentration control over a wide range, for example, from about 0.01 weight percent to 10 weight percent. For example, it has been demonstrated that the boron concentration can be easily controlled in between about 0.1 weight percent and 4.3 weight percent in the CFD dielectric films. In certain embodiments, 5, 7, 10, and 12 nm CFD films are grown to have about 0.1 to 0.5 wt% boron.

CFD doped dielectric films can be characterized by other properties. For example, the sheet resistance (Rs) of the CFD deposited films may vary between about 100 and 50000 ohms / square. In some cases, these values are achieved after some or all of the dopants have been driven from the doped CFD layer. The resulting junction depth (as measured by SIMS, for example) produced by driving the dopant from the CFD film can be adjusted to a level of about 1000 angstroms, if appropriate. Of course, many front end devices require a somewhat shallower junction depth, for example, in the range of about 5 to 50 angstroms, which is achievable using CFD films. The actual junction depth may depend on many factors, including, for example, the interface dopant (e.g., boron) concentration, the bulk of the dopant migration from the interface to the substrate (e.g., silicon), the temperature and duration of annealing used to drive the dopant Lt; / RTI &gt;

CFD doping applications

The substrate surface on which the dielectric source layer is formed may require highly conformal deposition. In certain instances, the dielectric source film conformally coats the features with aspect ratios of between about 1: 0.5 and 1:12 (more specifically, between about 1: 1 and 1: 8 aspect ratios) Widths (more specifically, feature widths not greater than about 30 nm). Doping using dielectric source layers of the type described herein will find particular applications in devices formed according to 45 nm technology nodes and beyond, such as 22 nm technology nodes, 16 nm technology nodes, and the like.

Among the device structures that can be doped using the CFD source layer are conventional doped structures such as CMOS sources and drains, source-drain extension regions, capacitor electrodes in memory devices, gate electrodes, and the like. Other structures that may be doped in this manner include junctions in the source / drain extension regions in gate structures such as those in some three-dimensional gate structures employed in some devices fabricated in a 22 nanometer technology node Like non-planar or three-dimensional structures. Some three-dimensional structures are known as " Tri-gate (Intel) ": J. Cavalieros et al., Symp. VLSI Tech Pg 50, 2006 and " FinFET ": Yamashita et al. (IBM Alliance), VLSI 2011, and references therein, all of which are incorporated herein by reference.

Doped CFD films have a variety of different applications, such as providing etchable layers used in various stages in integrated circuit fabrication. In certain embodiments, the etchable layer is a glass layer with an adjustable wet etch rate, wherein the etch rate is adjustable by the doping level. In other words, the doping level is selected to provide a predefined etch rate. In certain embodiments, the etchable layer is a silicate glass layer comprising a dopant such as phosphorous, boron, or combinations thereof.

CFD Doping Examples

CFD boron doped silicate glass (BSG) films were prepared and achieved nearly 100 percent step coverage on a complex three-dimensional gate architecture. Similar results are expected for phosphorous-doped silicate glass (PSG). Boron or phosphorus is implanted into the lateral and vertical regions of the source and drain junctions from the above films during a subsequent annealing step to provide conformal / homogenous under diffusion of the dopant. ). Figure 20 shows a typical deposition block used to synthesize a CFD BSG / PSG film. The CFD oxide growth cycle removes (a) the saturation dose of the SiO ₂ precursor (BTBAS), (b) inert purging of residual precursor species, (c) the oxidative plasma step and Lt; / RTI &gt; This mechanism ensures that the reaction is self-limiting and improves the observed excellent conformality in these membranes. The boron or phosphorous exposure step is periodically inserted during CFD oxide growth, followed by a pump and purge sequence followed optionally by an RF pinning / cure step (e.g., exposure to a plasma) . This deposition block is repeated a number of times to the extent required by the target BSG / PSG thickness. Referring to FIG.

The frequency of insertion of the boron or phosphorous exposure controls the dopant diffusion distance at a given temperature while the exposure length controls the total dopant dose. These two powerful control parameters provide a versatile synthesis method that accurately adjusts the interface dopant concentration.

In the experiments, CFD showed excellent growth characteristics in BSG films. The CFD BSG process used BTBAS as the silicon source, N ₂ O plasma for the oxidation and 5% diborane (B ₂ H ₆ ) in argon for boron doping. A mixture of argon and N ₂ O was used as the purge gas. Growth rates of ~ 1 A / cycle were consistently obtained with the results for undoped CFD oxides, demonstrating that insertion of the boron exposure step does not adversely affect CFD growth. 250 Å thick CFD BSG films showed almost perfect conformality over different test structures as shown by SEM photographs. Step coverage for these films was calculated to be ~ 100 percent on dense structures and small structures (Figure 21). Step coverage is defined as the quotient of the film thickness on the sidewalls of the feature divided by the film thickness on the top of the same feature. Table 7 shows the different studies divided from initial studies to divide the effects of boron exposure time, boron incorporation frequency, and growth temperature on the final average boron concentration in the film. 25X CFD Ox means that there are 25 undoped oxide cycles per boron implant stage. The sample grows to approximately 500 angstroms and thus the entire sequence is repeated approximately 20 times (given a growth rate of 1 ANGSTROM / cycle for the CFD oxide). SIMS data for these divided studies, as provided in Figure 22, indicate that the average boron concentration can be adjusted within the range of about 0.5 to 3.5 wt% boron, which realizes custom doping options.

sign Deposition conditions CFDS1 400 ° C / 25x CFD Ox + 5s B ₂ H ₆ Exposure CFDS2 400 ° C / 25x CFD Ox + 2.5s B ₂ H ₆ Exposure CFDS3 400 ° C / 50x CFD Ox + 5s B ₂ H ₆ Exposure CFDS4 350 ° C / 25x CFD Ox + 5s B ₂ H ₆ Exposure

Device

It will be appreciated that any suitable processing station may be used with one or more of the embodiments described above. For example, FIG. 13 schematically illustrates an embodiment of a CFD process station 1300. For simplicity, the CFD process station 1300 is shown as a stand alone process station having a process chamber body 1302 for maintaining a low pressure atmosphere. However, it will be appreciated that a plurality of CFD processing stations 1300 may be included in the common low-pressure atmosphere processing tool. It should be understood that the embodiment shown in Figure 13 includes a single process station, but in some embodiments, multiple process stations may be included in the process tool. For example, FIG. 14 shows an embodiment of a multiple station processing tool 2400. Further, in some embodiments, one or more of the hardware parameters of the CFD process station 1300, including those discussed in detail below, may be programmatically adjusted by one or more computer controllers.

The CFD process station 1300 is in fluid communication with a reactant delivery system 1301 for transferring process gases to the gas distribution showerhead 1306. Reactant delivery system 1301 includes a mixing vessel 1304 for mixing and / or conditioning process gases to be delivered to showerhead 1306. The at least one mixing vessel inlet valve 1320 may control the introduction of process gases into the mixing vessel 1304.

Some reactants, such as BTBAS, may be stored in liquid form prior to vaporization at the process station and subsequent delivery to it. For example, the embodiment of FIG. 13 includes a vaporization point 1303 for the liquid reactant to be fed to the mixing vessel 1304. In some embodiments, vaporization point 1303 may comprise a heated vaporizer. The saturated reactant gas produced from this vaporizer can be condensed in the downstream transfer pipe. If incompatible gases are exposed to this condensed reactant, small particles may be generated. These small particles clog the pipe, interfere with valve operation and contaminate the substrate. Some approaches to overcome this problem include cleaning and / or evacuating the transfer pipe to remove residual reactants. However, cleaning the transfer pipe increases the process station cycle time, thereby reducing process station throughput. Thus, in some embodiments, the transfer pipe downstream of the vaporization point 1303 is heat traced. In some instances, the mixing vessel 1304 may also be heat traced. In one non-limiting example, the transfer pipe downstream of the vaporization point 1303 may have an increasing temperature profile extending to approximately 150 ° C in the mixing vessel 1304 at approximately 100 ° C.

In some embodiments, the reactant liquid may be vaporized in a liquid injector. For example, a liquid injector may inject pulses of liquid reactant into the carrier gas stream upstream of the mixing vessel. In one scenario, the liquid injector may vaporize the reactants by flashing the liquid from high pressure to low pressure. In other scenarios, the liquid injector may atomize the liquid into a microdroplet and the microdroplet may be vaporized in a heated transfer piping afterwards. It will be appreciated that smaller droplets may be vaporized faster than larger ones to reduce the delay between liquid injection and complete vaporization. Rapid vaporization can reduce the length of the pipe downstream from vaporization point 13023. In one scenario, the liquid injector may be mounted directly in the mixing vessel 1304. In other scenarios, the liquid injector may be mounted directly to the showerhead 1306. [

The showerhead 1306 and the pedestal 1308 are electrically connected to the RF power supply 1314 and the matching network 1316 that supply the plasma. In some embodiments, plasma energy may be controlled by controlling at least one of the process station pressure, the gas concentration, the RF source power, the RF source frequency, and the plasma power pulse timing. For example, the RF power supply 1314 and matching network 1316 may be operated at any suitable power to form a plasma having a target composition of radical species. Examples of suitable power include, but are not limited to, 100 W to 5000 W for a 300 mm wafer. Likewise, RF power source 1314 can provide RF power at any suitable frequency. In some embodiments, the RF power source 1314 may be configured to independently control the high frequency power source and the low frequency RF power source. The low-frequency example of the low-frequency RF power source includes, but is not limited to, frequencies of 50 to 500 kHz. High frequency examples of high frequency RF power sources include, but are not limited to, frequencies from 1.8 to 2.45 MHz. It will be appreciated that any suitable parameters may be adjusted discretely or continuously to provide plasma energy for surface reactions. In one non-limiting example, the plasma power may be intermittently pulsed so that ion collisions with the substrate surface are reduced compared to a continuously powered plasma.

In some embodiments, the plasma may be in-situ monitored by one or more plasma monitors. In one scenario, the plasma power may be monitored by one or more current and voltage sensors (e.g., VI probes). In other scenarios, the plasma density and / or process gas concentration can be measured by one or more OES (optical emission spectroscopy) sensors. In some embodiments, one or more plasma parameters may be programmatically adjusted based on measurements from these in-situ plasma monitors. For example, an OES sensor can be used in a feedback loop to provide programmatic control of the plasma power. In some embodiments, other monitors may be used to monitor plasma and other process characteristics. Such monitors may include, but are not limited to, an infrared monitor, a sound monitor, and a pressure transducer.

In some embodiments, the pedestal 1308 can be temperature controlled through a heater 1310. Further, in some embodiments, the pressure control of the CFD process station 1300 may be provided by a butterfly valve 1318. As shown in the embodiment of FIG. 13, the butterfly valve 1318 throttle the vacuum provided by the downstream vacuum pump (not shown). However, in some embodiments, the pressure control of the CFD process station 1300 may be adjusted by varying the flow rate of the one or more gases introduced into the CFD process station 1300.

As noted above, one or more processing stations may be included in the multi-station processing tool. 14 is a schematic diagram of an embodiment of a multi-station processing tool 2400 having an inbound load lock 2402 and an outbound load lock 2404 and includes an inbound load lock 2402 and an inbound load lock Any or all of the outbound load locks 2404 may comprise a remote plasma source. The robot 2406 at atmospheric pressure is configured to move the wafer from the loaded cassette through the pod 2408 through the atmospheric port 2410 into the inbound load lock 2402. The wafer may be placed by the robot 2406 on the pedestal 2412 in the inbound load lock 2402 and the standby port 2410 may be closed and then the load lock may be pumped down. If the inbound load lock 2402 includes a remote plasma source, the wafer may be exposed to remote plasma processing within the load lock before it is introduced into the processing chamber 2414. In addition, the wafer may be heated in the inbound load lock 2402, for example, to remove moisture and inhaled gases. A chamber transfer port 2416 is then opened into the processing chamber 2414 and another robot (not shown) is placed on the pedestal of the first station shown in the reactor to perform further processing in the processing chamber 2414 . Although the embodiments shown in Figure 14 include load locks, in some embodiments, the wafers may be introduced directly into the process station.

The illustrated process chamber 2414 includes four process stations numbered from 1 to 4 in the embodiment shown in FIG. Each station may have a heated or unheated pedestal (shown as station 241 in the case of station 1) and a gas line inlet. It will be appreciated that in some embodiments, each process station may have different or multiple purposes. For example, in some embodiments, a process station may be switched between a CFD process mode and a PECVD process mode. Additionally or alternatively, in some embodiments, the processing chamber 2414 may include one or more matched CFD process stations and a pair of PECVD process stations. Although the illustrated process chamber 2414 includes four stations, the process chamber according to the present disclosure may include any suitable number of stations. For example, in some embodiments, the process chamber includes more than five stations, while in other embodiments, the process chamber may include no more than three stations.

Figure 14 also illustrates a wafer handling system 2490 for transferring wafers within the processing chamber 2414. In some embodiments, the wafer handling system 2490 can transfer wafers between various process stations and / or between process stations and loadlocks. Any suitable wafer handling system may be employed. Non-limiting examples may include wafer carousels and wafer handling robots. 14 also shows a system controller 2450 used to control the processing conditions and hardware state of the processing tool 2400. [ The system controller 2450 may include one or more memory devices 2456, one or more storage devices 2454, and one or more processors 2452. The processor 2452 may include a CPU or a computer, analog and / or digital input / output connections, a stepper motor controller board, and the like.

In some embodiments, system controller 2450 controls all operations of process tool 2400. System controller 2450 executes system control software 2458 stored in mass storage device 2454 and loaded into memory device 2456 to be executed by processor 2452. [ The system control software 2458 can be used to determine the timing, gas mix, chamber and / or station pressure, chamber and / or station temperature, wafer temperature, target power level, RF power level, Pedestal, chuck, and / or susceptor locations and other parameters. The system control software 2458 may be configured in any suitable manner. For example, various process tool component subroutines or control objects may be written to control the operation of the process tool components required to perform the process of the various process tools. The system control software 2458 may be coded in any suitable computer readable programming language.

In some embodiments, the system control software 2458 may include an input / output control (IOC) that sequences instructions for controlling the various parameters described above. For example, each phase of the CFD process may include one or more instructions executed by the system controller 2450. Instructions for setting process conditions for the CFD process phase may be included in the corresponding CFD recipe phase. In some embodiments, CFD recipe phases can be configured in sequence such that all instructions for the CFD process phase are run concurrently with the process phase.

Other computer software and / or programs stored on the mass storage device 2454 and / or on the memory device 2456 associated with the system controller 2450 may be used in other embodiments. Examples of programs or program sections for this purpose include a substrate positioning program, a process gas control program, a pressure control program, a heater control program, and a plasma control program.

The substrate positioning program may include program code for proset tool components used to load a substrate onto pedestal 2418 and control the degree of separation between the substrate and other elements of process tool 2400. [

The process gas control program may include a code for introducing the gas into one or more process stations prior to deposition to control the gas composition and flow rate and optionally stabilize the pressure within the process station. The pressure control program may include a code for controlling the pressure in the process station by regulating the gas flow into the process station or the throttle valve in the exhaust system of the process station.

The heater control program may include a code for controlling the current to the heating unit used to heat the substrate. Alternatively, the heater control program may control the supply of heat transfer gas (e.g., helium) to the substrate.

The plasma control program may include code for setting the RF power level applied to the process electrodes in one or more process stations.

In some embodiments, there may be a user interface associated with the system controller 2450. The user interface may include a display screen, a graphical software display of the device and / or process state and a user input device such as a pointing device, keyboard, touch screen,

In some embodiments, parameters controlled by the system controller 2450 may be related to process conditions. Non-limiting examples may include process gas components and flow rates, temperature, pressure, plasma conditions (such as RF bias power levels), pressure, temperature, and the like. These parameters can be provided to the user in the form of a recipe that can be entered using the user interface.

Signals for monitoring this process may be provided by the analog and / or digital input connections of system controller 2450 from various process tool sensors. A signal for controlling the process may be output on the analog output connection and the digital output connection of the process tool 2400. Non-limiting examples of such process tool sensors may include a mass flow controller, a pressure sensor (such as a manometer), a thermocouple, and the like. Properly programmed feedback and control algorithms can be used with data from these sensors to maintain process conditions.

System controller 2450 may provide program instructions for implementing various semiconductor fabrication processes. These program instructions may control various process parameters such as DC power level, RF bias power level, pressure, temperature, and the like. These instructions may control these parameters to operate the in-situ deposition of a film stack according to various embodiments described herein.

The apparatus and / or process described herein may be used in conjunction with lithographic patterning tools or processes for manufacturing or processing semiconductor devices, displays, LEDs, photoelectric panels, etc., for example. Typically, such tools or processes are not necessarily, but can be used or performed together in a common manufacturing facility. Membrane lithography patterning typically includes some or all of the following operations, each of which is accomplished using a plurality of possible tools, which may include (1) transferring a photo to a workpiece, such as a wafer, using a spin- (2) curing the photoresist using a hot plate furnace or UV curing tool, (3) exposing the photoresist to visible light or ultraviolet or x-ray light using a tool such as a wafer stepper, (4) an operation of selectively removing the resist using a tool such as a wet bench and developing the photoresist to pattern it, (5) an operation of removing the resist pattern by using a dry or plasma assisted etching tool, (6) an operation of transferring the RF or microwave plasma And removing the photoresist using a tool such as a resist stripper.

It should be understood that the configurations and / or schemes described herein are exemplary in nature and that these particular embodiments or examples should not be construed as limiting and many variations are possible. The particular methods or routines described herein may represent one or more of any number of processing strategies. Thus, the various operations illustrated may be performed in the order shown, in a different order, in parallel, or in some cases omitted. Similarly, the order of the above-described processes can be varied.

The subject matter of this disclosure is intended to cover any and all novel and non-obvious combinations of the various processes, systems, structures, other features, functions, operations and / or characteristics disclosed herein, and any and all equivalents thereof And sub-combinations.

Claims (42)

A method of depositing a film on a substrate surface in a reaction chamber,
(a) introducing the first reactant into the reaction chamber under conditions that cause the first reactant to adsorb onto the surface of the substrate;
(b) introducing a second reactant into the reaction chamber while the first reactant is adsorbed onto the substrate surface;
(c) exposing the substrate surface to a plasma to cause a reaction between the first reactant and the second reactant on the substrate surface to form a portion of the film;
(d) repeating the steps (a) to (c) at least once;
(e) introducing the dopant-containing material into the reaction chamber under conditions that cause the dopant-containing material not introduced during the step (a) to the step (d) to be in contact with the exposed surface of the film; And
(f) introducing a dopant from the dopant-containing material into the film. The method according to claim 1,
(g) repeating the steps (a) to (c) after the step (e) or after the step (f). The method according to claim 1,
(g) repeating the steps (a) to (e). The method according to claim 1,
Wherein the amount of the deposited film during the step (a) to the step (c) is 0.5 to 1 angstrom. The method according to claim 1,
Further comprising driving the dopant from the film into the features of the substrate surface on which the film resides. 6. The method of claim 5,
Wherein the step of driving the dopant from the film comprises annealing the film. 6. The method of claim 5,
Wherein the film resides on a three-dimensional feature of the substrate surface,
Wherein the step of driving the dopant from the film provides a conformal diffusion of the dopant into the feature. 8. The method of claim 7,
Wherein the features have a width not greater than 40 nanometers. The method according to claim 1,
Further comprising purging the second reactant from the reaction chamber prior to exposing the substrate surface to plasma. 10. The method of claim 9,
Wherein said purging comprises flowing a gas comprising an oxidant into said reaction chamber. The method according to claim 1,
Wherein the first reactant and the second reactant coexist in a vapor phase in the reaction chamber,
Wherein the first reactant and the second reactant do not appreciably react with each other in the reaction chamber until they are exposed to the plasma in step (c). The method according to claim 1,
Wherein introducing the dopant into the film comprises exposing the dopant-containing material to a plasma. The method according to claim 1,
Wherein the first reactant is an oxidant. 14. The method of claim 13,
Wherein the oxidant is nitrous oxide. The method according to claim 1,
Wherein the second reactant comprises:
SiH _x (NR ₂ ) _4-x , x = 1 to 3 and R is alkylamino silanes comprising alkyl groups; And
SiH _x Y _4-x , x = 1 to 3 and Y is selected from the group consisting of Cl, Br, and halosilanes. The method according to claim 1,
Lt; RTI ID = 0.0 &gt; BTBAS. &Lt; / RTI &gt; The method according to claim 1,
The dopant-containing material may be selected from the group consisting of phosphine, arsine, alkylboranes, alkylgallanes, alkylphosphines, phosphorus halides, arsenic halides, gallium halides, Wherein the metal is selected from the group consisting of boron halides, alkylboranes, and diborane. The method according to claim 1,
Wherein the film is a dielectric film. The method according to claim 1,
Wherein the total film thickness is 10 to 100 angstroms. The method according to claim 1,
Wherein the concentration of the dopant in the film is 0.01 to 10 weight percent. The method according to claim 1,
Applying a photoresist to the substrate surface;
Exposing the photoresist to light;
Patterning the photoresist and transferring the pattern to the substrate surface; And
Further comprising selectively removing the photoresist from the substrate surface. A method of depositing a dielectric film on a substrate surface in a reaction chamber,
(a) flowing the oxidant into the reaction chamber under conditions that cause the oxidant to adsorb onto the surface of the substrate;
(b) introducing a dielectric precursor into the reaction chamber while the oxidant continues to flow into the reaction chamber;
(c) exposing the substrate surface to a plasma to cause a reaction between the oxidant on the substrate surface and the dielectric precursor to form a portion of the dielectric film;
(d) introducing the dopant-containing material into the reaction chamber under conditions that cause a dopant-containing material not introduced during the operations (a) to (c) to contact the exposed surface of the dielectric film; And
(e) incorporating a dopant from the dopant-containing material into the dielectric film. 23. The method of claim 22,
Wherein the dielectric precursor is a BTBAS. 23. The method of claim 22,
Further comprising the step of driving the dopant from the dielectric film into the substrate. 23. The method of claim 22,
Wherein the operation (a) to the operation (c) are repeated. 26. The method of claim 25,
Wherein the oxidant comprises a first ratio of oxygen to nitrogen when the operation (a) is first performed,
Wherein the oxidant comprises a second ratio of oxygen to nitrogen when the operation (a) is repeated,
Wherein the second ratio is less than the first ratio. 27. The method of claim 26,
The oxidant includes elemental oxygen when the operation (a) is first performed,
Wherein the oxidant comprises nitrous oxide when the operation (a) is repeated. 26. The method of claim 25,
Wherein the substrate is at a first temperature when the operation (c) is first performed,
The substrate is at a second temperature when the operation (c) is repeated,
Wherein the second temperature is higher than the first temperature. 23. The method of claim 22,
Further comprising contacting the substrate surface with the dopant-containing material prior to the operation (a). A method of depositing a dielectric film on a substrate surface in a reaction chamber,
(a) introducing the dielectric precursor into the reaction chamber under conditions that cause a dielectric precursor to be adsorbed onto the substrate surface;
(b) purging the dielectric precursor from the reaction chamber with the dielectric precursor adsorbed on the substrate surface;
(c) exposing the substrate surface to a plasma to cause a reaction of the dielectric precursor on the substrate surface to form a portion of the dielectric film; And
(d) introducing the dopant precursor into the reaction chamber under conditions that cause a dopant precursor not introduced during the step (a) to the step (c) to come into contact with a portion of the dielectric film. Film deposition method. 31. The method of claim 30,
Further comprising flowing an oxidant into the reaction chamber prior to and during the step (a) to the step (c). 31. The method of claim 30,
(e) reacting the dopant precursor to introduce a dopant into the dielectric film. An apparatus for depositing a doped film on a substrate surface,
A reaction chamber including a device for holding a substrate during deposition of the doped film;
One or more process gas inlets connected to the reaction chamber; And
And a controller configured or designed to cause the device to perform operations,
The operations include,
(a) introducing the first reactant into the reaction chamber under conditions that cause the first reactant to adsorb onto the surface of the substrate;
(b) introducing a second reactant into the reaction chamber while the first reactant is adsorbed onto the substrate surface;
(c) exposing the substrate surface to a plasma to cause a reaction between the first reactant and the second reactant on the surface of the substrate to form a portion of the doped film;
(d) repeating the operations (a) to (c) at least once;
(e) introducing the dopant-containing material into the reaction chamber under conditions that cause a dopant-containing material not introduced during the operations (a) to (d) to contact the exposed surface of the doped film; And
(f) introducing a dopant from the dopant-containing material into the doped film. 34. The method of claim 33,
Wherein the controller is further designed or configured to cause the device to flow oxidant into the reaction chamber before and during the operations (a) to (d). 34. The method of claim 33,
Wherein the controller is further designed or configured to cause the operation of repeating the operation (a) to the operation (c) to occur after the operation (e) or the operation (f). 34. The method of claim 33,
Wherein the controller is further designed or configured to cause the act of driving the dopant from the doped film into the features of the substrate surface on which the doped film resides. 37. The method of claim 36,
Wherein the act of driving the dopant from the doped film comprises annealing the doped film. 34. The method of claim 33,
Wherein the controller is further designed or configured to purge the second reactant from the reaction chamber prior to exposing the substrate surface to plasma. 39. The method of claim 38,
And flowing a gas containing the flared oxidant into the reaction chamber. 34. The method of claim 33,
Wherein the controller is further designed or configured to cause the operation (e) to be performed at intervals between one or more iterations of the operation (a) to the operation (d)
Wherein the intervals change over the course of depositing the doped film. 33. A system comprising the apparatus and the stepper of claim 33. 31. The method of claim 30,
Wherein the dielectric precursor is a silicon-containing precursor.

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