US10269559B2 - Dielectric gapfill of high aspect ratio features utilizing a sacrificial etch cap layer - Google Patents
Dielectric gapfill of high aspect ratio features utilizing a sacrificial etch cap layer Download PDFInfo
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- US10269559B2 US10269559B2 US15/703,917 US201715703917A US10269559B2 US 10269559 B2 US10269559 B2 US 10269559B2 US 201715703917 A US201715703917 A US 201715703917A US 10269559 B2 US10269559 B2 US 10269559B2
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- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02164—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
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- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76837—Filling up the space between adjacent conductive structures; Gap-filling properties of dielectrics
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- H01L21/02208—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
- H01L21/02219—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound comprising silicon and nitrogen
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
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- H01L21/311—Etching the insulating layers by chemical or physical means
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- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76807—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures
- H01L21/76813—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics for dual damascene structures involving a partial via etch
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- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H01L21/76831—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches, e.g. non-conductive sidewall liners
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- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
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- H01L21/02107—Forming insulating materials on a substrate
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- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/0217—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
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- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67017—Apparatus for fluid treatment
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- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67242—Apparatus for monitoring, sorting or marking
- H01L21/67248—Temperature monitoring
Abstract
Description
Claims (20)
Priority Applications (8)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US15/703,917 US10269559B2 (en) | 2017-09-13 | 2017-09-13 | Dielectric gapfill of high aspect ratio features utilizing a sacrificial etch cap layer |
CN201880073124.9A CN111344857B (en) | 2017-09-13 | 2018-09-07 | Dielectric gap fill using high aspect ratio features of sacrificial etch cap layer |
JP2020514992A JP7232823B2 (en) | 2017-09-13 | 2018-09-07 | Dielectric Gap Filling of High Aspect Ratio Features Utilizing Sacrificial Etch Cap Layers |
KR1020207010492A KR20200042542A (en) | 2017-09-13 | 2018-09-07 | Dielectric gap filling of high aspect ratio features using a sacrificial etch cap layer |
PCT/US2018/050049 WO2019055317A1 (en) | 2017-09-13 | 2018-09-07 | Dielectric gapfill of high aspect ratio features utilizing a sacrificial etch cap layer |
SG11202002271UA SG11202002271UA (en) | 2017-09-13 | 2018-09-07 | Dielectric gapfill of high aspect ratio features utilizing a sacrificial etch cap layer |
TW107131673A TWI791042B (en) | 2017-09-13 | 2018-09-10 | Dielectric gapfill of high aspect ratio features utilizing a sacrificial etch cap layer |
US16/294,783 US10658172B2 (en) | 2017-09-13 | 2019-03-06 | Dielectric gapfill of high aspect ratio features utilizing a sacrificial etch cap layer |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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US15/703,917 US10269559B2 (en) | 2017-09-13 | 2017-09-13 | Dielectric gapfill of high aspect ratio features utilizing a sacrificial etch cap layer |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
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US16/294,783 Continuation US10658172B2 (en) | 2017-09-13 | 2019-03-06 | Dielectric gapfill of high aspect ratio features utilizing a sacrificial etch cap layer |
Publications (2)
Publication Number | Publication Date |
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US20190080903A1 US20190080903A1 (en) | 2019-03-14 |
US10269559B2 true US10269559B2 (en) | 2019-04-23 |
Family
ID=65632390
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
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US15/703,917 Active US10269559B2 (en) | 2017-09-13 | 2017-09-13 | Dielectric gapfill of high aspect ratio features utilizing a sacrificial etch cap layer |
US16/294,783 Active US10658172B2 (en) | 2017-09-13 | 2019-03-06 | Dielectric gapfill of high aspect ratio features utilizing a sacrificial etch cap layer |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
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US16/294,783 Active US10658172B2 (en) | 2017-09-13 | 2019-03-06 | Dielectric gapfill of high aspect ratio features utilizing a sacrificial etch cap layer |
Country Status (7)
Country | Link |
---|---|
US (2) | US10269559B2 (en) |
JP (1) | JP7232823B2 (en) |
KR (1) | KR20200042542A (en) |
CN (1) | CN111344857B (en) |
SG (1) | SG11202002271UA (en) |
TW (1) | TWI791042B (en) |
WO (1) | WO2019055317A1 (en) |
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US10559468B2 (en) | 2010-04-15 | 2020-02-11 | Lam Research Corporation | Capped ALD films for doping fin-shaped channel regions of 3-D IC transistors |
US10580645B2 (en) * | 2018-04-30 | 2020-03-03 | Asm Ip Holding B.V. | Plasma enhanced atomic layer deposition (PEALD) of SiN using silicon-hydrohalide precursors |
US10629435B2 (en) | 2016-07-29 | 2020-04-21 | Lam Research Corporation | Doped ALD films for semiconductor patterning applications |
US10658172B2 (en) | 2017-09-13 | 2020-05-19 | Lam Research Corporation | Dielectric gapfill of high aspect ratio features utilizing a sacrificial etch cap layer |
US10679848B2 (en) | 2016-07-01 | 2020-06-09 | Lam Research Corporation | Selective atomic layer deposition with post-dose treatment |
US10741458B2 (en) | 2012-11-08 | 2020-08-11 | Novellus Systems, Inc. | Methods for depositing films on sensitive substrates |
US10804099B2 (en) | 2014-11-24 | 2020-10-13 | Lam Research Corporation | Selective inhibition in atomic layer deposition of silicon-containing films |
US10832908B2 (en) | 2016-11-11 | 2020-11-10 | Lam Research Corporation | Self-aligned multi-patterning process flow with ALD gapfill spacer mask |
US10957514B2 (en) | 2016-06-30 | 2021-03-23 | Lam Research Corporation | Apparatus and method for deposition and etch in gap fill |
US11133180B2 (en) | 2010-04-15 | 2021-09-28 | Lam Research Corporation | Gapfill of variable aspect ratio features with a composite PEALD and PECVD method |
US11367613B2 (en) | 2014-09-17 | 2022-06-21 | Asm Ip Holding B.V. | Deposition of SiN |
US11404275B2 (en) | 2018-03-02 | 2022-08-02 | Lam Research Corporation | Selective deposition using hydrolysis |
US11587783B2 (en) | 2013-03-14 | 2023-02-21 | Asm Ip Holding B.V. | Si precursors for deposition of SiN at low temperatures |
US11646198B2 (en) | 2015-03-20 | 2023-05-09 | Lam Research Corporation | Ultrathin atomic layer deposition film accuracy thickness control |
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