KR101799529B1 - Touch sensor in-cell type liquid crystal display device and method of fabricating the same - Google Patents

Abstract

The present invention provides a display device having a display area having a plurality of pixel areas and a non-display area having a pad part outside the plurality of pixel areas, and a plurality of touch blocks having a plurality of pixel areas as a group in the display area, A gate and a data line formed to cross each other with a first insulating film interposed therebetween at the boundary of the pixel region; A thin film transistor formed in each pixel region and connected to the gate and the data line; A first protective layer formed of an organic insulating material and having a first drain contact hole exposing a drain electrode of the thin film transistor on the thin film transistor; A common electrode formed on the first protection layer and spaced apart from each other by the touch blocks; An x sensing wiring formed to overlap the gate wiring over the common electrode, and a y sensing wiring formed to overlap the data wiring; A second passivation layer formed on the common electrode, the x sensing wiring, and the y sensing wiring over the entire surface of the substrate, the second passivation layer having a second drain contact hole exposing the drain electrode; And a pixel electrode having a plurality of bar-shaped openings formed in each of the pixel regions in contact with the drain electrode through the second drain contact hole over the second passivation layer, Wherein the first insulating layer is provided with first and second link contact holes for exposing both ends of the auxiliary data link pattern, A first data link wiring connected to the data wiring and contacting the auxiliary data link pattern through the first link contact hole, and a second data link wiring connected to the auxiliary data link pattern through the second link contact hole, And a second data link wiring which is in contact with the first data link wiring is formed. ≪ / RTI >

Description

TECHNICAL FIELD [0001] The present invention relates to an array substrate for an in-cell type liquid crystal display device, and a manufacturing method thereof.

The present invention relates to a liquid crystal display device, and more particularly, to an array substrate for a touch sensor type in-cell type liquid crystal display device capable of preventing a short circuit between wirings due to a residual film remaining when pixel electrodes are patterned, and a method of manufacturing the same.

Recently, liquid crystal display devices have been attracting attention as next generation advanced display devices with low power consumption, good portability, and high value-added.

Of these liquid crystal display devices, an active matrix type liquid crystal display device having a thin film transistor, which is a switching device capable of controlling voltage on and off for each pixel, .

In general, a liquid crystal display device forms an array substrate and a color filter substrate through an array substrate manufacturing process for forming thin film transistors and pixel electrodes, and a color filter substrate manufacturing process for forming color filters and common electrodes, And a liquid crystal interposed therebetween.

1, which is an exploded perspective view of a general liquid crystal display device, the array substrate 10 and the color filter substrate 20 are bonded to each other with a liquid crystal layer 30 interposed therebetween. The lower array substrate 10 includes a plurality of gate wirings 14 and data wirings 16 that are arranged longitudinally and laterally crosswise on the upper surface of the transparent substrate 12 to define a plurality of pixel regions P, The thin film transistors Tr are provided at the intersections of the pixel regions 14 and 16 and are connected in a one-to-one correspondence with the pixel electrodes 18 provided in the pixel regions P.

The upper portion of the color filter substrate 20 facing the array substrate 10 is formed with a non-display region (not shown) of the gate wiring 14, the data wiring 16, and the thin film transistor Tr Shaped black matrix 25 surrounding each pixel region P so as to cover the respective pixel regions P in the pixel region P. Pixels of red (R), green (R), and blue A color filter layer 26 including color filter patterns 26a, 26b and 26c of blue (G) and blue (B) colors is formed on the front surface of the color filter layer 26, A common electrode 28 is provided.

Although not shown in the drawings, the two substrates 10 and 20 are sealed with a sealant or the like along their edges in order to prevent leakage of the liquid crystal layer 30 interposed therebetween. 10 and 20 and the liquid crystal layer 30 are provided with an upper and a lower alignment film for providing reliability in the molecular alignment direction of the liquid crystal and at least one outer surface of each of the substrates 10 and 20 is provided with a polarizing plate .

On the outer surface of the array substrate 10, a back-light is provided to supply light. An on / off signal of the thin film transistor Tr is applied to the gate wiring 14 The image signals of the data lines 16 are sequentially applied to the pixel electrodes 18 of the selected pixel region P and the liquid crystal molecules between the common electrodes 28 and the pixel electrodes 18, The molecules are driven, and accordingly, various images can be displayed by the light transmittance change.

However, since the liquid crystal display device having the above-described configuration is not excellent in viewing angle characteristics, a common electrode and a pixel electrode are disposed on the same array substrate in recent years, and a transverse electric field for driving liquid crystal molecules by a horizontal electric field or a fringe A field switching mode liquid crystal display device has been proposed.

These transverse electric field type and fringe field switching mode liquid crystal display devices are used in various applications such as TV, projector, mobile phone, and PDA. These applications are basically equipped with a touch function in order to operate by touching the screen recently . Such a liquid crystal display device having a touch function is generally called a touch sensor in-cell type liquid crystal display device.

In order to perform a touch sensing function, an array substrate for a touch sensor type in-cell type liquid crystal display includes a plurality of touch blocks for sensing a user's touch in addition to a gate and a data line, A wiring structure is further required.

Therefore, in an array substrate for an in-cell type liquid crystal display device having a touch sensor having such a structure, when a thin film transistor having a semiconductor layer of polysilicon having excellent mobility characteristics is provided, the mask process is usually performed 11 times.

In such an array substrate for a touch-insensitive-type liquid crystal display device, a gate insulating film, an interlayer insulating film, an auxiliary insulating layer, and first and second protective layers are provided as the insulating layer.

At this time, among the insulating layers, the auxiliary insulating layer may be formed by depositing an inorganic insulating material to improve adhesion between a component made of a metal material, for example, a data line, a source and a drain electrode, and a first protective layer made of an organic insulating material However, efforts have been made to have a structure in which only a total of two are formed by omitting the auxiliary insulating layer.

However, in the case of deleting the auxiliary insulating layer made of the inorganic insulating material, in the step of patterning the pixel electrode in the exposed pad portion in which the first protective layer made of the organic insulating material is not formed, There is a problem that a short circuit occurs particularly between the data link wirings due to the residues left to correspond to the data link wiring.

In order to solve the above problems, it is an object of the present invention to provide an array substrate for a touch sensor in-cell type liquid crystal display device which can prevent a short circuit due to residues of a conductive material generated at the boundary of a first protective layer .

According to an aspect of the present invention, there is provided an array substrate for a touch sensor type liquid crystal display device, the display substrate including a display region having a plurality of pixel regions and a non-display region having a pad portion on the outer side thereof, A gate and a data line formed so as to intersect each other with a first insulating film interposed therebetween at a boundary between pixel regions on a substrate on which a plurality of touch blocks each having a pixel region as a group are defined; A thin film transistor formed in each pixel region and connected to the gate and the data line; A first protective layer formed of an organic insulating material and having a first drain contact hole exposing a drain electrode of the thin film transistor on the thin film transistor; A common electrode formed on the first protection layer and spaced apart from each other by the touch blocks; An x sensing wiring formed to overlap the gate wiring over the common electrode, and a y sensing wiring formed to overlap the data wiring; A second passivation layer formed on the common electrode, the x sensing wiring, and the y sensing wiring over the entire surface of the substrate, the second passivation layer having a second drain contact hole exposing the drain electrode; And a pixel electrode having a plurality of bar-shaped openings formed in each of the pixel regions in contact with the drain electrode through the second drain contact hole over the second passivation layer, Wherein the first insulating layer is provided with first and second link contact holes for exposing both ends of the auxiliary data link pattern, A first data link wiring connected to the data wiring and contacting the auxiliary data link pattern through the first link contact hole, and a second data link wiring connected to the auxiliary data link pattern through the second link contact hole, And a second data link wiring which is in contact with the first data link wiring is formed.

Wherein each of the touch blocks is connected to a neighboring touch block in the extending direction of the gate wiring by the x sensing wiring, the first and third regions are spaced apart from each other, and between the first and third regions, And a second region connected by the y-sensing wiring in the extending direction of the data line, and the common electrode is separately formed in the first, second, and third regions within the respective touch blocks .

The x sensing wiring formed in the first and third regions in the touch block is formed in a state of being disconnected at a boundary between the first region and the second region and at a boundary between the second region and the third region .

Wherein the gate electrode is formed on the first insulating film, the data wiring is formed on the first insulating film, and the gate wiring is formed on the first insulating film in parallel with the gate wiring, And a sensing auxiliary wiring formed for each of the touch blocks, wherein the x sensing wiring and the sensing auxiliary wiring are connected to each other in each of the touch blocks.

Wherein the first protective layer is provided with a first contact hole exposing the first insulating film corresponding to an end of the x sensing wiring for each of the touch blocks, And a third contact hole exposing an end of the sensing wiring, wherein the first insulating film has a third contact hole exposing the end of the sensing auxiliary wiring in the form of extending the first contact hole, The end of the x sensing wiring exposed through the second and third contact holes and the end of the sensing auxiliary wiring are simultaneously in contact with a connection pattern made of the same material that constitutes the pixel electrode.

The common electrode has a first opening corresponding to a portion where the thin film transistor is formed and a second opening corresponding to the first contact hole and having a larger area than the first opening.

Wherein a touch block formed on the same line in the extending direction of the gate line of the touch block is electrically connected to the touch block by the x sensing line and a touch formed on the same line in the extending direction of the data line, And the blocks are all electrically connected by the y sensing wiring.

A gate wiring line connected to the gate line is formed in the non-display area in the same layer where the gate line is formed, a gate pad electrode connected to the gate line line is formed in the pad part, A data pad electrode connected to the second data link wiring line is formed on the same layer, and the first protection layer exposes the pad portion.

A data pad contact hole for exposing the data pad electrode is formed in the second protection layer, a gate pad contact hole for exposing the gate pad electrode is formed in the second protection layer and the first insulation layer, An auxiliary data pad electrode which contacts the data pad electrode through the data pad contact hole with the same material forming the pixel electrode on the protection layer and an auxiliary data pad electrode which contacts the gate pad electrode through the gate pad contact hole, .

Wherein the thin film transistor comprises a semiconductor layer composed of a first semiconductor region of pure polysilicon and a second semiconductor layer of polysilicon doped with impurities on both sides thereof in the form of sequentially stacked on a second insulating film, The first insulating film having a gate electrode corresponding to a semiconductor region and a semiconductor layer contact hole exposing the second semiconductor region, and a source electrode and a drain electrode which are spaced apart from each other and contact the second semiconductor region, respectively .

And the common electrode and the pixel electrode are made of a transparent conductive material.

A method of manufacturing an array substrate for an in-cell type liquid crystal display device according to the present invention is a method of manufacturing an array substrate for an in-cell type liquid crystal display device comprising a display region having a plurality of pixel regions and a non-display region defined outside the plurality of pixel regions, Forming gate lines and data lines crossing each other with a first insulating film interposed therebetween and thin film transistors connected to the two pixel lines on the substrate where a plurality of touch blocks are defined; Forming a first passivation layer over the thin film transistor, the first passivation layer being formed of an organic insulating material and having a first drain contact hole exposing a drain electrode of the thin film transistor over the thin film transistor; Forming a common electrode on the first passivation layer, the common electrode being spaced apart from each other by the touch blocks; Forming an x sensing wiring overlying the gate wiring over the common electrode and a y sensing wiring overlapping the data wiring; Forming a second passivation layer on the entire surface of the common electrode, the x sensing wiring and the y sensing wiring, the second passivation layer being connected to the first drain contact hole to expose the drain electrode; Forming a pixel electrode having a plurality of bar-shaped openings in each pixel region in contact with the drain electrode through the second drain contact hole over the second passivation layer, Wherein the step of forming the first insulating layer includes forming first and second links that expose both ends of the auxiliary data link pattern, respectively, forming an auxiliary data link pattern in the non-display area and the pad part, Wherein the step of forming the data line includes a first data link wiring connected to the data line and in contact with the auxiliary data link pattern through the first link contact hole, And forming a second data link wiring in contact with the auxiliary data link pattern through the second link contact hole Features.

Wherein each of the touch blocks is connected to a neighboring touch block in the extending direction of the gate wiring by the x sensing wiring, the first and third regions are spaced apart from each other, and between the first and third regions, And a second region connected by the y-sensing wiring in the extending direction of the data line, and the common electrode is separately formed in each of the first, second, and third regions within the respective touch blocks to be.

The x sensing wiring formed in the first and third regions in the touch block is formed so as to be spaced apart from the boundary between the first region and the second region and between the second region and the third region to be.

Wherein the gate electrode is formed on a lower portion of the first insulating film and the data line is formed on an upper portion of the first insulating film and the step of forming the gate wiring is performed on the first insulating film by each of the touch blocks And forming a sensing auxiliary wiring, wherein the x sensing wiring and the sensing auxiliary wiring are connected to each other in each of the touch blocks.

The forming of the first passivation layer may include forming a first contact hole exposing the first insulating film corresponding to an end of the x sensing wiring for each of the touch blocks, A second contact hole exposing an end of the x sensing wiring in the first contact hole is formed, and the step of forming the first insulating film may include forming the first contact hole in the sensing assistant And a third contact hole exposing an end of the wiring, wherein the step of forming the pixel electrode includes the step of forming an end of the x sensing wiring exposed through the second and third contact holes, And forming a connection pattern that simultaneously contacts the ends.

The common electrode has a first opening corresponding to a portion where the thin film transistor is formed and a second opening corresponding to the first contact hole and having a larger area than the first opening.

 Wherein a touch block formed on the same line in the extending direction of the gate line of the touch block is electrically connected to the touch block by the x sensing line and a touch formed on the same line in the extending direction of the data line, And the blocks are all electrically connected by the y sensing wiring.

Wherein forming the gate wiring includes forming a gate link wiring connected to the gate wiring in the non-display area and simultaneously forming a gate pad electrode connected to the gate wiring wiring in the pad portion, Forming a data pad electrode connected to the second data link wiring in the pad portion.

The forming of the second passivation layer may include exposing the gate pad electrode by simultaneously patterning the data pad contact hole exposing the data pad electrode and the first passivation layer and the first insulative layer underlying the second passivation layer, And forming a gate pad contact hole, wherein the forming of the pixel electrode comprises: forming an auxiliary data pad electrode on the second passivation layer and contacting the data pad electrode through the data pad contact hole; And forming an auxiliary gate pad electrode in contact with the gate pad electrode through the pad contact hole.

The forming of the thin film transistor includes: forming a pure amorphous silicon layer on the first insulating film; Crystallizing the pure amorphous silicon layer into a polysilicon layer; Patterning the polysilicon layer to form a semiconductor layer of polysilicon; Forming a gate insulating film over the semiconductor layer of the polysilicon; Forming a gate electrode connected to the gate wiring on a central portion of the semiconductor layer of polysilicon over the gate insulating film; Performing impurity doping using the gate electrode as a doping mask to change the semiconductor layer of the portion exposed to the outside of the gate electrode to an impurity polysilicon layer; Forming a first insulating film having a semiconductor layer contact hole exposing a semiconductor layer of the impurity polysilicon on both sides of the gate electrode over the gate electrode; And forming a source electrode and a drain electrode, which are in contact with the semiconductor layer of the impurity polysilicon, through the semiconductor layer contact hole over the first insulating film, respectively.

The array substrate for a touch sensor type insensitive-type liquid crystal display according to the present invention includes an auxiliary data link wiring corresponding to a data link wiring in a step of forming a gate wiring in a pad portion where a first protective layer made of an organic insulating material is not formed And the data link wiring is brought into contact with the auxiliary link wiring through the contact hole with the end of the first protective layer as a boundary, thereby forming a pixel electrode, even if a residue is left on the boundary of the first protective layer There is an effect that a short circuit between data link wirings can be prevented.

There is an effect of improving the yield by reducing the defective rate by suppressing short defects between the wirings by the residue.

Furthermore, since only two protective layers are provided in comparison with the prior art, one protective layer can be omitted, thereby improving the productivity per unit time by reducing the material cost and omitting the step.

1 is an exploded perspective view of a general liquid crystal display device.
BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a touch sensor type liquid crystal display (LCD), and more particularly,
3 is a plan view of a pad portion of a non-display area and its surroundings in an array substrate for a touch sensor type liquid crystal display device according to an embodiment of the present invention.
4 is a schematic plan view of one touch block of an array substrate for a touch sensor type in-cell type liquid crystal display according to an embodiment of the present invention.
5 is a cross-sectional view of one pixel region including a portion where a thin film transistor as a switching element is formed in an array substrate for a touch-in-cell type liquid crystal display device according to an embodiment of the present invention.
FIG. 6 is a cross-sectional view of a portion cut along line VI-VI of FIG. 3; FIG.
FIG. 7 is a cross-sectional view of a portion taken along line VII-VII of FIG. 3; FIG.
FIG. 8 is a cross-sectional view of a portion of the array substrate for a touch-in-cell type liquid crystal display according to an embodiment of the present invention where the ends of the x sensing wiring and the sensing auxiliary wiring facing each other in each touch block are located.
FIGS. 9A to 9J are cross-sectional views illustrating process steps of a pixel region including a portion where a thin film transistor, which is a switching device, is formed in an array substrate for a touch-in-cell type liquid crystal display device according to an embodiment of the present invention.
FIGS. 10A to 10J are cross-sectional views of the manufacturing process steps of the portion cut along the cutting line VI-VI of FIG. 3;
Figs. 11A to 11J are cross-sectional views showing steps taken along the cutting line VII-VII of Fig. 3 taken along the cutting line VII-VII.
FIGS. 12A to 12J are cross-sectional views illustrating steps of fabricating an array substrate for a touch-in-cell type liquid crystal display according to an embodiment of the present invention, in which portions of the sensing wires and the sensing auxiliary wires,

Hereinafter, preferred embodiments according to the present invention will be described with reference to the drawings.

FIG. 2 is a plan view of one pixel region including a thin film transistor in a display region in an array substrate for a touch sensor type liquid crystal display device according to an embodiment of the present invention, in which the sensing lines overlapping the gate and data lines are omitted FIG. 3 is a plan view of a pad portion of a non-display region and a periphery thereof in an array substrate for a touch sensor type liquid crystal display device according to an embodiment of the present invention, FIG. 4 is a cross- 1 is a schematic plan view of one touch block of an array substrate for an in-cell type liquid crystal display device.

As shown in the drawing, a plurality of gate wirings 119 extending in one direction and a plurality of gate wirings 119 are formed in a display area of the array substrate 101 for a touch sensor type liquid crystal display device according to an embodiment of the present invention, And a plurality of data lines 130 which define a plurality of pixel regions P are formed.

A plurality of pixel regions P defined as regions surrounded by the plurality of gate lines 119 and the data lines 130 are connected to the gate and data lines 119 and 130, Tr) are formed.

Further, the sensing wirings xsl and ysl are formed so as to overlap with some of the gate wirings 119 and the data wirings 130. At this time, the part of the gate wiring 119 is formed to overlap with the x sensing wiring xsl, and the y sense wiring ysl overlaps with the part of the data wiring 130.

A pixel electrode 160 is formed in each of the pixel regions P so as to have a plurality of bar-shaped openings oa3 in contact with the drain electrode 136 of the thin film transistor Tr, A touch block TB is formed by using a plurality of pixel regions P having the pixel electrode 160 as one touch sensor unit.

Each touch block TB, which is formed by a plurality of pixel regions P as one unit, is divided into three regions A1, A2, and A3. At this time, the three regions A1, A2, and A3 provided in each touch block TB are sequentially divided into the first, second, and third regions A1, A2, and A3 in the direction in which the gate wiring 119 extends have.

At this time, the second area A2 is connected to the upper and lower touch blocks TB through the y sensing wiring ysl, and the second area A2 is connected to the left and right sides of the second area A2, The first area A1 and the third area A3 are connected to each other via a sensing block TB and an x sensing wiring xsl located on the left and right sides of the first area A1 and the third area A3.

That is, the first area A1 in each touch block TB is connected to the third area A3 of the touch block TB located on the left side thereof via the x sensing wiring xsl, and the third area A1 A3 are connected to the first area A1 of the touch block TB located on the right side thereof via the x sensing wiring xsl.

The x sensing wiring lines xsl provided in the second area A2 in each of the touch blocks TB are patterned in the form of a bar to form first and third regions (left and right) A1, and A2 are disconnected from each other.

That is, the x sensing wiring xsl is connected to the first area A1 and the second area A2 in the respective touch blocks TB, and to the boundary between the third area A3 and the second area A2, It is characterized in that it is formed.

At this time, although the x sensing wiring xsl itself is disconnected at the boundary between the areas A1, A2, and A3 in each touch block TB, the x sensing wiring xsl is electrically connected to each touch And is connected between the first and second regions A1 and A2 and between the second and third regions A2 and A3 within the block TB.

That is, the ends of the x sensing wiring (xsl) formed in the first area (A1) and the third area (A3) in a disconnected manner are separated from the gate wiring (119) on the gate insulating film And a sensing auxiliary wiring 122 formed in the second area A2 of each touch block TB and each end of which is located in the first and third areas A1 and A2 in each touch block TB, Second and first sensing contact holes 158 and 148 connected to each other through the first passivation layer (not shown), a second passivation layer (not shown) and an interlayer insulation film (not shown) As shown in FIG.

Although not shown, an end of a touch block TB arranged in the same line in the extending direction of the gate and data lines 119 and 130 is connected to an x-direction sensing circuit (not shown) connected to the x sensing line xsl And a y-direction sensing circuit (not shown) connected to the y sensing wiring ysl are mounted.

Accordingly, when a touch occurs to the touch block TB located in any part of the display area, the pixel electrode 165 and the common electrode (not shown), which are overlapped with each other with the third protective layer Direction sensing circuit (not shown) and a y-direction sensing circuit (not shown) via the x sensing wiring xsl and the y sensing wiring ysl connected thereto, respectively, Thereby recognizing the portion where the touch occurred in the display area.

The non-display area NA of the array substrate 101 for an in-cell type liquid crystal display of a touch sensor according to an embodiment of the present invention having such a structure is shown as extending from the display area AA to the non-display area NA And is connected to an end of the gate wiring 119 and has gate link wiring (not shown), and is connected to one end of the data wiring 130, and a data link wiring 131 is formed.

The pad portion PA of the non-display region NA is connected to the gate link wiring (not shown) and has a gate pad electrode (not shown) formed thereon. The pad portion PA is connected to the data link wiring 131, An electrode 132 is formed.

The pad portion PA is a portion which is connected to an external driving circuit substrate (not shown) via a flexible printed circuit board (FPCB) (not shown) on which a driving IC is mounted, and an FPCB The insulating layer made of the organic insulating material is not formed in consideration of the defective performance and the adhesive force.

Therefore, in the non-display area NA, a portion having a relatively large step difference is generated at the boundary of the pad portion PA by the first passivation layer 145 made of an organic insulating material. (Not shown) formed by depositing on the entire surface of the substrate 101 due to the occurrence of a large step at the boundary of the common electrode (not shown) and patterning the same, the residue of the material forming the common electrode (not shown) Short-circuiting between the link wirings 131 is caused.

In order to solve such a problem, in the non-display area NA and the pad part PA where the data link wiring 131 is formed, the data link wiring 131 is connected to the pad part PA ) Is formed so as not to be elongated with the same material in the same layer up to the edge of the pad portion (PA).

The gate line (not shown) and the gate line (not shown) are formed on the layer where the gate wiring (not shown) and the gate link wiring (not shown) are formed for electrical connection of the data link wiring 131, And an auxiliary data link pattern 121 is formed of a material constituting the auxiliary data link pattern (not shown).

The pad portion PA is connected to the pad portion PA through a link contact hole 126 exposing the ends of the auxiliary data link pattern 121 provided in an interlayer insulating film (not shown) And the end of the data link wiring 131 which is cut off with respect to the boundary is formed to be in contact with the auxiliary data link pattern 121 which overlaps with the data link wiring 131.

With this structure, the array substrate 101 for a touch sensor type in-cell type liquid crystal display according to an embodiment of the present invention can be manufactured at a boundary of a pad portion PA where a stepped portion is generated by a first protective layer 145 made of an organic insulating material There is an effect of originally preventing a short failure between neighboring data link wirings 131 due to residues remaining when patterning the common electrode.

Hereinafter, a cross-sectional structure of an array substrate for a touch sensor type in-cell type liquid crystal display according to an embodiment of the present invention having such a configuration will be described.

 5 is a cross-sectional view of one pixel region including a portion where a thin film transistor which is a switching element is formed in an array substrate for a touch-in-cell type liquid crystal display device according to an embodiment of the present invention, and FIG. 6 is a cross- FIG. 7 is a cross-sectional view of a portion taken along the section line VII-VII of FIG. 3, and FIG. 8 is a cross-sectional view of a portion of the touch-insensitive-type liquid crystal display device according to an embodiment of the present invention Sectional view of a part of the array substrate where the ends of the x sensing wiring and sensing auxiliary wiring facing each other in each touch block are located. For convenience of description, a region where the thin film transistor Tr is formed in each pixel region P is defined as an element region TrA, and a plurality of pixel regions P are defined as a unit block of a touch block TB Respectively.

As shown in the drawing, a buffer layer 105 made of an inorganic insulating material such as silicon oxide (SiO ₂ ) or silicon nitride (SiNx) is formed on a transparent substrate 101. At this time, when the transparent substrate 101 is made of glass, the buffer layer 105 is affected by the alkali ion from the glass substrate 101 when the semiconductor layer 110 of the polysilicon is affected And the operation characteristics of the thin film transistor Tr may be deteriorated. Therefore, it may be omitted in order to prevent this.

The device region TrA in each pixel region P above the buffer layer 105 is made of pure polysilicon and the central portion thereof includes a first semiconductor region 113a forming a channel and a second semiconductor region 113b formed on both sides of the first semiconductor region 113a A semiconductor layer 113 composed of a second semiconductor region 113b doped with a high concentration of impurities is formed.

A gate insulating layer 116 made of an inorganic insulating material is formed on the entire surface of the semiconductor layer 113.

A metal material such as aluminum (Al), aluminum alloy (AlNd), copper (Cu), copper alloy, molybdenum (Mo), molybdenum (MoTi) (Not shown) having a single layer or a multilayer structure and connected in correspondence with the boundaries of the pixel regions P and extending in one direction. At this time, on the gate insulating layer 116, sensing auxiliary wiring (not shown) is formed for each of the touch blocks TB separated from the gate wiring (not shown).

Since the present invention is an array substrate 101 for a touch sensor incentive liquid crystal display device, a touch sensor (not shown) should be provided. Since the touch sensor (not shown) typically responds to the touch of a finger of a user, it is formed by dividing a plurality of pixel regions P into one unit, i.e., a touch block TB, will be.

On the gate insulating film 116, a gate electrode 120 having the same structure as the gate wiring (not shown) is formed corresponding to the first semiconductor region 113a of the semiconductor layer 113 have.

A non-display area NA outside the display area AA is connected to one end of the gate wiring (not shown) over the gate insulating film 116 and has gate link wiring (not shown) In the region NA, the pad portion PA is connected to one end of the gate link wiring (not shown) and a gate pad electrode (not shown) is formed.

The non-display region NA and the pad portion PA correspond to the portion where the data link wiring 131 is to be formed on the gate insulating layer 116, (BAR) in which the first protective layer 145 is bounded and both ends thereof are positioned in the non-display area NA adjacent to the pad PA and the display area AA, The auxiliary data link pattern 121 is formed.

Next, an interlayer insulating film (not shown) made of an inorganic insulating material is formed on the entire surface of the gate electrode 120, the gate wiring (not shown), the gate link wiring (not shown), the gate pad electrode (not shown), and the auxiliary data link pattern 121 123 are formed. At this time, the semiconductor layer contact holes (not shown) are formed in the interlayer insulating layer 123 and the gate insulating layer 116 located below the interlayer insulating layer 123 to expose each of the second semiconductor regions 113b located on both sides of the first semiconductor region 113a 125 are formed in the non-display area NA and the pad part PA and the link contact holes 126a, 126b are formed in the interlayer insulating layer 123 to expose both ends of the auxiliary data link pattern 121, 126b.

Next, a metal material such as aluminum (Al), an aluminum alloy (AlNd), copper (Cu), or the like is formed on the interlayer insulating layer 123 having the semiconductor layer contact hole 125 and the link contact holes 126a and 126b. (Not shown) as a single layer or a multilayer structure as one or two or more materials selected from the group consisting of copper, copper alloy, molybdenum (Mo), and molybdenum (MoTi) 130 are formed. When the data line 130 has a multilayer structure, a first layer made of molybdenum (Mo) or molythiometry (MoTi) and a second layer made of aluminum (Al), an aluminum alloy (AlNd), copper (Cu) Layer structure of a second layer made of any one of them and a third layer made of molybdenum (Mo) or moly titanium (MoTi). In the drawing, the data line 130 has a single layer structure.

The device region TrA is in contact with the second semiconductor region 113b exposed through the semiconductor layer contact hole 125 and is made of the same material as the data line 130 Source and drain electrodes 133 and 136 having the same structure and spaced apart from each other are formed.

At this time, the source and drain electrodes 133 and 136, which are separated from the semiconductor layer 113, the gate insulating film 116, the gate electrode 120, and the interlayer insulating film 123 sequentially stacked in the device region TrA, And constitutes a thin film transistor Tr which is a switching element.

The thin film transistor Tr is electrically connected to the gate line (not shown) and the data line 130. That is, the gate electrode 120 is connected to the gate wiring (not shown), and the source electrode 133 is connected to the data wiring 130.

In the non-display area NA, data line interconnects 131a and 131b are formed on the interlayer insulating layer 123 and connected to one end of the data line 130, 131b overlap the auxiliary data link pattern 121 and are formed in contact with the auxiliary data link pattern 121 through the link contact holes 126a, 126b.

The pad portion PA is connected to the data link line 121 via the link contact hole 126b located on the pad PA on the interlayer dielectric layer 123, And the data pad electrode 132 is formed.

Next, an organic insulating material, for example, a photoacid or a metal oxide is formed on the entire surface of the display region and the non-display region NA except the pad portion PA above the data line 130, the source and drain electrodes 133 and 136, And a first protective layer 145 made of benzocyclobutene and having a flat surface. In this case, since the first passivation layer 145 is not formed for the pad PA, the data pad electrode 132 and the data link wiring 131b connected to the data pad electrode 132, (Not shown).

Conventionally, an auxiliary insulating layer made of an inorganic insulating material is formed on the data line, the source and drain electrodes, and a first protective layer made of the organic insulating material is formed on the auxiliary insulating layer. In this case, the use of the inorganic insulating material for forming the auxiliary insulating layer is continuously generated for the manufacture of the liquid crystal display device, thereby increasing the cost.

However, in the embodiment according to the present invention, the auxiliary insulating layer is not constituted, and the effect of reducing the material cost is obtained. In this case, the auxiliary insulating layer is omitted, so that the data wiring 130 made of a metal material and the source and drain electrodes 133 and 136 come into direct contact with the first protective layer 145 made of an organic insulating material. Organic insulation materials, especially photo-acrylics, have excellent adhesion to metal materials due to technological advancement, so that even if the auxiliary insulation layer made of inorganic insulation material is omitted, the problem caused by the decrease in bonding strength does not occur.

The first passivation layer 145 has a first drain contact hole 147 exposing the drain electrode 136 of the thin film transistor Tr in the display area AA. And a first sensing contact hole 148 exposing an interlayer insulating film 123 corresponding to an end of each sensing sub-wiring 122 provided in the substrate TB.

Next, a transparent conductive material indium-tin-oxide (ITO) or indium-zinc-oxide (IZO) is deposited on the first passivation layer 145 having the first drain contact hole 147 and the first sensing contact hole 148. The common electrode 150 is formed to correspond to the display area AA.

At this time, the common electrode 150 is formed so as to expose the thin film transistor Tr by forming the first opening oa1 corresponding to the element region TrA in each pixel region P, A second opening oa2 having a larger area is formed corresponding to a portion where the sensing contact hole 148 is formed.

In addition, the common electrode 150 is formed by patterning a plurality of pixel regions P for each of the touch blocks TB. Furthermore, the common electrode 150 is more precisely formed in the first, second, and third regions (A1, A2, and A3 in FIG. 4) in the touch block TB.

A metal material such as aluminum (Al), an aluminum alloy (AlNd), copper (Cu), a copper alloy, or the like, which forms the data line 130, is formed on the common electrode 150 formed by patterning for each of the touch blocks TB. (Xsl) overlaps the gate wiring (not shown) as a single layer or a multilayer structure of one or more materials selected from the group consisting of molybdenum (Mo) and molybdenum (MoTi) 130) and a y sensing wiring (ysl in Fig. 4) is formed.

At this time, the x sensing wiring xsl and the y sensing wiring ysl are formed in the first, second, and third regions (A1, A2, and A3 in FIG. 4) Only the first and third regions A1 and A3 of FIG. 4 are electrically connected and the second region A2 of FIG. 4 is electrically disconnected in each of the touch blocks TB, (A2 in Fig. 4) is electrically connected only to the second region (A2 in Fig. 5) in the neighboring touch block TB in the extension direction of the data line 130, There is no problem even if the x sensing wiring (xsl) and the y sensing wiring (ysl) are short-circuited in the wiring lines A1, A2, A3.

The x sensing wiring xsl is connected to the first sensing contact hole 148 for exposing the interlayer insulating film 123 in correspondence to the end of the sensing auxiliary wiring 122 in each touch block TB ) Is located inside.

Next, an inorganic insulating material such as silicon oxide (SiO ₂ ) or silicon nitride (SiN x) is formed on the entire surface of the common electrode 150 and the x and y sensing wires xsl and ysl, .

The second passivation layer 155 is provided with a second drain contact hole 157 for exposing the drain electrode 136 in the device region TrA. In the pad portion PA, And a data pad contact hole 159 exposing the data pad electrode 132 in correspondence with the pad electrode 132.

A gate pad contact hole (not shown) for exposing the gate pad electrode (not shown) may be formed on the pad portion PA by patterning the second passivation layer 155 together with the interlayer insulating layer 123 The second passivation layer 155 and the interlayer insulating layer 123 under the second passivation layer 155 are patterned so as to correspond to the first sensing contact hole 148 in the respective touch blocks TB, And a second sensing contact hole 158 for exposing one end of the adjacent auxiliary sensing wiring 122 and one end of the x sensing wiring xsl at the same time.

The second passivation layer 155 is formed on the second drain contact hole 157 (see FIG. 1) in a transparent conductive material such as indium tin oxide (ITO) or indium zinc- And the pixel electrode 160 is formed to be in contact with the drain electrode 136 through the through hole. At this time, the pixel electrode 160 includes a plurality of bar-shaped third openings op3 to generate a fringe field together with the common electrode 150 when a driving voltage is applied.

In the pad portion PA, the gate pad electrode (not shown) is formed on the second passivation layer 155 as the same material as the pixel electrode 160 through the gate pad contact hole (not shown) And an auxiliary data pad electrode 165 is formed in contact with the data pad electrode 132 through the data pad contact hole 159.

Inside each of the touch blocks TB, a connection pattern (not shown) which simultaneously contacts one end of the sensing auxiliary wiring 122 exposed through the second sensing contact hole 158 and one end of the x sensing wiring xsl, The array substrate for the touch sensor type insensitive-type liquid crystal display according to the embodiment of the present invention is completed.

With this configuration, the x sensing wiring xsl in the first, second, and third regions A1, A2, and A3 in each touch block TB is electrically and electrically connected to the y sensing wiring ysl As shown in FIG.

The pixel electrode 160 and the common electrode 150 provided in each pixel region P are formed to overlap each other with the second protective layer 155 interposed therebetween and the common electrode 150 The second passivation layer 155, and the pixel electrode 160 form a storage capacitor.

Hereinafter, a method of manufacturing an array substrate for a touch sensor type in-cell type liquid crystal display device having the above-described configuration will be described.

FIGS. 9A to 9J are cross-sectional views illustrating a process for each pixel region including a portion where a thin film transistor, which is a switching element, is formed in an array substrate for a touch-in-cell type liquid crystal display according to an embodiment of the present invention, 11A to 11J are cross-sectional views illustrating a process of manufacturing the semiconductor device of FIG. 3 along the section line VII-VII of FIG. 3, and FIG. 12A to 12J are cross-sectional views illustrating steps of fabricating an array substrate for a touch-in-cell type liquid crystal display according to an exemplary embodiment of the present invention, in which the ends of the x-sensing wiring and the sensing auxiliary wiring facing each other in the respective touch blocks are positioned.

First, as shown in FIGS. 9A, 10A, 11A, and 12A, an inorganic insulating material such as silicon oxide (SiO ₂ ) or silicon nitride (SiNx) is deposited on a transparent substrate 101 to form a buffer layer 105 do.

When the amorphous silicon is recrystallized into polysilicon, the buffer layer 105 may be formed of alkali ions, for example, potassium ions (K +), sodium ions (K +), or the like existing in the substrate 101 due to heat generated by laser irradiation or heat treatment. (Na < + >) may occur. In order to prevent deterioration of the film characteristics of the semiconductor layer made of polysilicon by the alkali ions. At this time, the buffer layer 105 may be omitted.

Next, a pure amorphous silicon layer (not shown) is formed by depositing pure amorphous silicon on the buffer layer 105, and then an excimer laser annealing (ELA) method using an excimer laser, a sequential lateral solidification (SLS) , And alternating magnetic field crystallization (AMFC), thereby crystallizing the amorphous silicon layer (not shown) into a polysilicon layer (not shown).

Thereafter, a mask process is performed to pattern the polysilicon layer (not shown) to form a semiconductor layer 113 having a pure polysilicon state in the device region TrA in each pixel region P, respectively.

Next, as shown in FIGS. 9B, 10B, 11B and 12B, an inorganic insulating material such as silicon oxide (SiO ₂ ) or silicon nitride (SiNx) is deposited on the semiconductor layer 113 of pure polysilicon, (116).

Next, a metal material such as aluminum (Al), aluminum alloy (AlNd), copper (Cu), copper alloy, molybdenum (Mo), molybdenum (MoTi) A first metal layer (not shown) having a single layer or a multilayer structure is formed.

Thereafter, the first metal layer (not shown) is masked and patterned to form gate electrodes 120 corresponding to the central portions of the respective semiconductor layers 113, and at the same time, the gate electrodes 120 are formed on the gate insulating film 116, (Not shown) connected to the gate electrode 120 formed in the device region TrA at the boundary of the region P and extending in one direction and the gate wiring (not shown) for each of the touch blocks TB, Thereby forming a sensing auxiliary wiring 122.

At this time, a gate link wiring (not shown) connected to one end of the gate wiring (not shown) is formed in the non-display area NA and a non-display An auxiliary data link pattern 121 having a shape extending from the area NA to the pad part PA and corresponding to a region overlapping the data link wiring to be formed later is formed.

Also, a gate pad electrode (not shown) connected to one end of the gate link wiring (not shown) is formed in the pad portion PA.

Next, as shown in FIGS. 9C, 10C, 11C, and 12C, impurities are doped on the entire surface of the substrate 101 using each of the gate electrodes 120 as a blocking mask, The second semiconductor region 113b doped with the impurity is formed in a portion located outside the first semiconductor region 120 and a portion corresponding to the gate electrode 120 in which doping of the impurity is prevented by blocking, Area 113a.

Next, as shown in FIGS. 9D, 10D, 11D, and 12D, an inorganic insulating material such as silicon nitride (SiNx) is formed on the entire surface of the semiconductor layer 113 divided into the first and second semiconductor regions 113a and 113b. ) Or silicon oxide (SiO ₂ ) are deposited to form an interlayer insulating film 123 on the entire surface.

Then, in the display region, the interlayer insulating film 123 and the gate insulating film 116 under the gate insulating film 123 are simultaneously patterned to expose the second semiconductor region 113b of each semiconductor layer 113, And the link contact holes 126a and 126b exposing the ends of the auxiliary data link pattern 121 by patterning the interlayer insulating film 123 in the non-display area NA and the pad part PA, .

Next, as shown in FIGS. 9E, 10E, 11E and 12E, a metal material such as aluminum (Al) is formed on the interlayer insulating film 123 provided with the semiconductor contact hole 125 and the link contact holes 126a and 126b. A second metal layer (not shown) having a single layer or a multilayer structure is formed as any one or two or more of aluminum alloy (AlNd), copper (Cu), copper alloy, molybdenum (Mo), and moly titanium (MoTi) do.

Thereafter, patterning is performed by patterning the second metal layer (not shown) to form source and drain electrodes 121 and 122 which are in contact with the second region 113b through the semiconductor layer contact hole 125 in the device region TrA, (133, 136). The gate electrode 120 and the interlayer insulating film 123 are separated from the semiconductor layer 113 and the gate insulating film 116 in the device region TrA in each pixel region P, The transistors 133 and 136 constitute a thin film transistor Tr which is a switching element.

At the same time, a data line 130 which is connected to the source electrode 133 formed in the device region TrA and crosses the gate line (not shown) is formed on the interlayer insulating film 123 at the boundary of the pixel region P do.

A first data link line 131a connected to one end of the data line 130 and a second data line line 131a spaced apart from the first data link line 131a are formed on the interlayer insulating layer 123 in the non- And a data pad electrode 132 connected to one end of the second data link wiring 131b is formed on the interlayer insulating layer 123 in the pad portion PA.

At this time, the first data link wiring 131a is connected to the auxiliary data link pattern 131a through the first link contact hole 126a, one end of which is located in a non-display area NA adjacent to the display area AA, (Not shown). The other end of the second data link line 131b spaced apart from the first data link line 131a on the auxiliary data link pattern 121 is connected to the second line And is in contact with the auxiliary data link pattern 121 through the contact hole 126b.

The data line 130 and the first data link line 131a and the auxiliary data link pattern 121 are electrically connected to the second data link line 131b and the data pad electrode 132 .

Next, as shown in Figs. 9F, 10F, 11F, and 12F, the thin film transistors Tr, the data lines 130, the first and second data link wirings 131a and 131b, An organic insulating material such as photo acryl or benzocyclobutene (BCB) is applied to a region of the front surface area and the non-display area NA excluding the pad portion PA to form a first A protective layer 145 is formed.

Therefore, the first passivation layer 145 has a step at the boundary of the pad portion PA.

Thereafter, a mask process is performed on the first passivation layer 145 and patterned to form a first drain contact hole 147 exposing the drain electrode 136 in each device region TrA, A first sensing contact hole 148 exposing the interlayer insulating film 123 corresponding to one end of the sensing auxiliary wiring 122 is formed in each of the touch blocks TB.

Next, as shown in FIGS. 9G, 10G, 11G, and 12G, a transparent conductive material, for example, a transparent conductive material is deposited on the first passivation layer 145 having the first drain contact hole 147 and the first sensing contact hole 148 , Indium-tin-oxide (ITO), or indium-zinc-oxide (IZO) are deposited on the entire surface and patterned to form a common electrode 150 spaced apart from each touch block TB.

At this time, the common electrode 150 has a first opening oa1 for each device region TrA and a portion where both ends of the sensing auxiliary wiring 122 are located, that is, the first sensing contact hole 148, A second opening oa2 having a larger area than the first sensing contact hole 148 is formed.

This prevents a short circuit between the pixel electrode 160 and the common electrode 150 which are in contact with the drain electrode 136 through the second drain contact hole 157 and prevents the second sensing contact hole (Not shown) for electrically connecting the sensing auxiliary wiring 122 and the x sensing wiring xsl through the common electrode 150 and the common electrode 150, respectively.

Next, as shown in FIGS. 9H, 10H, 11H, and 12H, a metal material such as aluminum (Al), aluminum alloy (AlNd), copper (Cu), copper alloy, molybdenum , Molybdenum (Mo), molybdenum (Mo), molybdenum (Mo), and molybdenum (MoTi) are formed.

Thereafter, the third metal layer (not shown) is patterned to form an x-sensing wiring xsl and a y-sensing wiring xsl having a planar shape as described with reference to Fig. 4 and overlapping the gate wiring (not shown) and the data wiring 130, Thereby forming a wiring ysl.

At this time, the x sensing wiring xsl is disconnected for each of the touch blocks TB, and the ends of the disconnected portions are bent if necessary so that the sensing auxiliary wiring 122 In the present invention,

In the embodiment of the present invention, when the x and y sensing wirings (xsl, ysl) are formed, the first protection layer 145 is not formed or exposed through the removed portion in the process of exposing the same to the etching solution for patterning. The drain electrode 136, the data link wiring 131, and the data pad electrode 132 are completely overlapped with the elements, and the conductive anti-etching pattern 151 and the first auxiliary pad pattern 152 Since these elements are not exposed to the etching solution for patterning the x and y sensing wirings (xsl, ysl), the damage caused by the etching solution can be prevented without forming an auxiliary insulating layer made of a separate inorganic insulating material, Can be prevented.

Next, also with the x sensing wiring (xsl) and y sensing wiring (ysl) over the inorganic insulating material, for example silicon oxide (SiO ₂₎ or silicon nitride (SiNx) as shown in 9i, 10i, 11i and 12i And a second protective layer 155 is formed on the entire surface of the display area and the non-display area NA.

A second drain contact hole 157 is formed which is connected to the first drain contact hole 147 to expose the drain electrode 136 by patterning the second passivation layer 155, The data pad contact hole 159 exposing the data pad electrode 132 is formed.

At the same time, in the portion corresponding to the first sensing contact hole 148 and the pad portion PA, the interlayer insulating layer 123 located below the second passivation layer 155 is patterned together with the first sensing contact hole 148, The second sensing contact hole 148 corresponding to the contact hole 148 exposes one end of the sensing auxiliary wiring 122 and one end of the adjacent x sensing wiring xsl, A contact hole 158 is formed and a gate pad contact hole (not shown) is formed to expose the gate pad electrode (not shown) corresponding to the gate pad electrode (not shown).

Next, as shown in FIGS. 9j, 10j, 11j, and 12j, the second drain contact hole 157, the gate and data pad contact holes (not shown), and the second sensing contact hole 158 A transparent conductive material such as indium-tin-oxide (ITO) or indium-zinc-oxide (IZO) is deposited on the second passivation layer 155 to form a transparent conductive material layer (not shown).

Thereafter, the pixel electrode 160 is formed in each pixel region P to contact the drain electrode 136 through the second drain contact hole 157 by patterning the transparent conductive material layer (not shown).

At the same time, in the respective touch blocks TB, one end of the sensing auxiliary wiring 122 and the adjacent one of the x sensing wiring xsl A connection pattern 163 is formed which is in contact with one end of the semiconductor chip 163 at the same time.

In the pad portion PA, an auxiliary gate pad electrode (not shown) is formed to contact the gate pad electrode (not shown) through the gate pad contact hole (not shown), and at the same time, An auxiliary data pad electrode 165 is formed to contact the data pad electrode 132 through the through hole 159 to complete the array substrate 101 for a touch sensor type liquid crystal display device according to an embodiment of the present invention.

Each of the pixel electrodes 160 includes a plurality of third openings oa3 spaced apart from each other by a predetermined distance in the pixel region P to form a fringe field, As shown in Fig.

The array substrate 101 for the touch sensor type liquid crystal display according to the present invention has a color filter substrate (not shown) and a liquid crystal layer (not shown) to form a liquid crystal display (not shown) An X-direction sensing circuit (not shown) and a Y-direction sensing circuit (not shown) are connected to the ends of the touch block TB arranged in the horizontal and vertical directions, respectively, so as to be connected to the x- When a touch is generated in the display area AA by mounting a circuit (not shown), the touch generation is detected through a change in capacitance generated between the common electrode 150 and the pixel electrode 160, Direction sensing circuit (not shown) and the Y-direction sensing circuit (not shown) via the sensing line ysl and the sensing line ysl in the display area AA The position of the portion where the touch is generated is recognized, Less will be conducted.

101: (Array) substrate
121: auxiliary data link pattern
126 (126a, 126b): (first and second) link contact holes
131 (131a, 131b): (first and second) data link wiring
132: Data pad electrode
145: first protective layer
159: Data pad contact hole
165: auxiliary data pad electrode
PA: pad portion
NA: non-display area

Claims (21)

A display device, comprising: a display area having a plurality of pixel areas and a non-display area having a pad part outside the plurality of pixel areas, the plurality of pixel blocks having a plurality of pixel areas in the display area, A gate and a data line formed to cross each other with a first insulating film interposed therebetween;
A thin film transistor formed in each pixel region and connected to the gate and the data line;
A first protective layer formed of an organic insulating material and having a first drain contact hole exposing a drain electrode of the thin film transistor on the thin film transistor;
A common electrode formed on the first protection layer and spaced apart from each other by the touch blocks;
An x sensing wiring formed to overlap the gate wiring over the common electrode, and a y sensing wiring formed to overlap the data wiring;
A second passivation layer formed on the common electrode, the x sensing wiring, and the y sensing wiring over the entire surface of the substrate, the second passivation layer having a second drain contact hole exposing the drain electrode;
A plurality of pixel electrodes each having a plurality of bar-shaped openings formed in the pixel region and contacting the drain electrode through the second drain contact hole over the second passivation layer;
And an auxiliary data link pattern is provided in the same layer in which the gate wiring is formed in the non-display area and the pad part, and the first and second electrodes are exposed in the first insulating layer, A first data link wiring having a first contact hole and a second contact hole and connected to the data line in the layer on which the data line is formed and in contact with the auxiliary data link pattern through the first link contact hole, And a second data link wiring is formed in contact with the auxiliary data link pattern through a link contact hole.
The method according to claim 1,
Wherein each of the touch blocks is connected to a touch block neighboring the gate wiring by an x sensing wiring,
Each of the touch blocks includes first and third regions which are spaced apart from each other and a second region which is connected between the first and third regions by a touch block neighboring the extending direction of the data line and the y-
Wherein the common electrode is divided into the first, second, and third regions within the respective touch blocks.
3. The method of claim 2,
The x sensing wiring formed in the first and third regions within each touch block is spaced apart from the boundary between the first region and the second region and between the second region and the third region In touch sensor In-cell type LCD array substrate.
The method of claim 3,
Wherein the gate wiring is formed under the first insulating film, the data wiring is formed on the first insulating film,
And a sensing auxiliary wiring formed on the first insulating film in the layer in which the gate wiring is formed in parallel with the gate wiring,
And the x sensing wiring and the sensing auxiliary wiring are connected to each other in each of the touch blocks.
5. The method of claim 4,
Wherein the first protection layer is provided with a first contact hole exposing the first insulating film corresponding to an end of the x sensing wiring for each of the touch blocks,
And a second contact hole exposing the end of the x sensing wiring in the first contact hole is formed in the second protection layer,
A third contact hole exposing an end of the sensing auxiliary wiring in the form of extending the first contact hole is formed in the first insulating film,
And the ends of the x-sensing wiring and the sensing auxiliary wiring exposed through the second and third contact holes connected to each other are simultaneously in contact with a connection pattern made of the same material constituting the pixel electrode. Type liquid crystal display device.
6. The method of claim 5,
Wherein the common electrode has a first opening corresponding to a portion where the thin film transistor is formed and a second opening corresponding to the first contact hole and having a larger area than the first opening. Array substrate.
The method according to claim 6,
The touch blocks formed on the same line in the extension direction of the gate lines among the respective touch blocks are all electrically connected by the x sensing wiring,
Wherein the touch blocks formed on the same line in the extension direction of the data lines are electrically connected to each other by the y sensing wiring.
The method according to claim 1,
A gate wiring line connected to the gate line is formed in the same layer where the gate line is formed in the non-display area, a gate pad electrode connected to the gate line line is formed in the pad portion,
A data pad electrode connected to the second data link line is formed in the same layer on which the data line is formed,
Wherein the first passivation layer is formed to expose the pad portion.
9. The method of claim 8,
And a data pad contact hole exposing the data pad electrode is formed in the second protective layer,
And a gate pad contact hole exposing the gate pad electrode is formed in the second passivation layer and the first insulating layer,
An auxiliary data pad electrode which is in contact with the data pad electrode through the data pad contact hole with the same material forming the pixel electrode on the second protection layer and an auxiliary data pad electrode which contacts the gate pad electrode through the gate pad contact hole, And a gate pad electrode is formed on the substrate.
The method according to claim 1,
Wherein the thin film transistor comprises a semiconductor layer composed of a first semiconductor region of pure polysilicon and a second semiconductor layer of polysilicon doped with impurities on both sides thereof in the form of sequentially stacked on a second insulating film, The first insulating film having a gate electrode corresponding to a semiconductor region and a semiconductor layer contact hole exposing the second semiconductor region, and a source electrode and a drain electrode which are spaced apart from each other and contact the second semiconductor region, respectively Wherein the substrate is a silicon substrate.
9. A method according to any one of claims 1, 5 and 8,
Wherein the common electrode and the pixel electrode are made of a transparent conductive material.
A display device having a display area having a plurality of pixel areas and a non-display area outside the display area, the plurality of touch blocks each having a plurality of pixel areas as a group in the display area, Forming a gate wiring and a data wiring crossing each other via an insulating film and a thin film transistor connected to the two wirings;
Forming a first passivation layer on the thin film transistor, the first passivation layer being made of an organic insulating material and exposing a drain electrode of the thin film transistor over the thin film transistor;
Forming a common electrode on the first passivation layer, the common electrode being spaced apart from each other by the touch blocks;
Forming an x sensing wiring overlying the gate wiring over the common electrode and a y sensing wiring overlapping the data wiring;
Forming a second passivation layer on the entire surface of the common electrode, the x sensing wiring and the y sensing wiring, the second passivation layer being connected to the first drain contact hole to expose the drain electrode;
Forming a pixel electrode having a plurality of bar-shaped openings in each pixel region in contact with the drain electrode through the second drain contact hole over the second protective layer,
The step of forming the gate wiring may include forming an auxiliary data link pattern in the non-display area and the pad part, and the step of forming the first insulating film may include the step of exposing the both ends of the auxiliary data link pattern, 1 and a second link contact hole, wherein the step of forming the data line includes connecting a first data link wiring line, which is connected to the data line and is in contact with the auxiliary data link pattern through the first link contact hole, And forming a second data link wiring which is spaced apart from and in contact with the auxiliary data link pattern through the second link contact hole.
13. The method of claim 12,
Wherein each of the touch blocks is connected to a touch block neighboring the gate wiring by an x sensing wiring,
Each of the touch blocks includes first and third regions which are spaced apart from each other and a second region which is connected between the first and third regions by a touch block neighboring the extending direction of the data line and the y-
Wherein the common electrode is separately formed in each of the first, second, and third regions in each of the touch blocks.
14. The method of claim 13,
The x sensing wiring formed in the first and third regions in each of the touch blocks is formed so as to be spaced apart from the boundary between the first region and the second region and between the second region and the third region A method of manufacturing an array substrate for an in-cell type liquid crystal display device.
15. The method of claim 14,
Wherein the gate wiring is formed on the lower portion of the first insulating film and the data wiring is formed on the first insulating film,
Wherein forming the gate wiring includes forming a sensing auxiliary wiring for each of the touch blocks on the first insulating film in parallel with the gate wiring,
And the sensing wiring and the sensing auxiliary wiring are connected to each other in each of the touch blocks. The method of manufacturing an array substrate for an in-cell type liquid crystal display according to claim 1,
16. The method of claim 15,
The forming of the first passivation layer may include forming a first contact hole exposing the first insulating film corresponding to an end of the x sensing wiring for each of the touch blocks,
The forming of the second passivation layer may include forming a second contact hole exposing an end of the x sensing wiring in the first contact hole,
The forming of the first insulating layer may include forming a third contact hole exposing the end of the sensing auxiliary wiring in the form of extending the first contact hole,
The forming of the pixel electrode may include forming a connection pattern that contacts the ends of the x sensing wiring and the sensing auxiliary wiring exposed through the second and third contact holes connected to each other at the same time A method of manufacturing an array substrate for an in-cell type liquid crystal display device.
17. The method of claim 16,
Wherein the common electrode has a first opening corresponding to a portion where the thin film transistor is formed and a second opening corresponding to the first contact hole and having a larger area than the first opening. A method for manufacturing an array substrate for an apparatus.
18. The method of claim 17,
The touch blocks formed on the same line in the extension direction of the gate lines among the respective touch blocks are all electrically connected by the x sensing wiring,
Wherein the touch blocks formed on the same line in the extending direction of the data lines among the respective touch blocks are formed to be electrically connected to each other by the y sensing wiring. The method of manufacturing an array substrate for an in- .
13. The method of claim 12,
Wherein the step of forming the gate wiring includes forming a gate link wiring connected to the gate wiring in the non-display area and simultaneously forming a gate pad electrode connected to the gate wiring wiring in the pad part,
Wherein the step of forming the data line includes forming a data pad electrode connected to the second data link line in the pad unit.
20. The method of claim 19,
The forming of the second passivation layer may include exposing the gate pad electrode by simultaneously patterning the data pad contact hole exposing the data pad electrode and the first passivation layer and the first insulative layer underlying the second passivation layer, Forming a gate pad contact hole,
The forming of the pixel electrode may include forming an auxiliary data pad electrode over the second passivation layer in contact with the data pad electrode through the data pad contact hole and an auxiliary data pad electrode contacting the gate pad electrode through the gate pad contact hole And forming an auxiliary gate pad electrode on the substrate.
13. The method of claim 12,
Wherein forming the thin film transistor comprises:
Forming a pure amorphous silicon layer on the first insulating film;
Crystallizing the pure amorphous silicon layer into a polysilicon layer;
Patterning the polysilicon layer to form a semiconductor layer of polysilicon;
Forming a gate insulating film over the semiconductor layer of the polysilicon;
Forming a gate electrode connected to the gate wiring on a central portion of the semiconductor layer of polysilicon over the gate insulating film;
Performing impurity doping using the gate electrode as a doping mask to change the semiconductor layer of the portion exposed to the outside of the gate electrode to an impurity polysilicon layer;
Forming a first insulating film having a semiconductor layer contact hole exposing a semiconductor layer of the impurity polysilicon on both sides of the gate electrode over the gate electrode;
A source electrode which contacts the semiconductor layer of the impurity polysilicon via the semiconductor layer contact hole over the first insulating film, and a step of forming the drain electrode
Type liquid crystal display device.

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