KR101725896B1 - Display device integrated with touch screen panel and method for fabricating the same - Google Patents

Abstract

The present invention provides a touch screen panel integrated display device and a method of manufacturing the same, and in one aspect, the present invention provides a touch screen panel integrated display device including a gate line positioned on a substrate in a first direction and transmitting a gate signal, A thin film transistor located in each pixel defined by intersecting the gate line and the data line, a first electrode spaced apart from one of a source electrode and a drain electrode of the thin film transistor, A thin film transistor protection layer formed on the thin film transistor and having a first contact hole formed thereon, a first electrode connected to one of the source electrode and the drain electrode through the first contact hole, And a second connection pattern, which is the same material as the first connection pattern, transmits the first connection pattern and the touch driving signal to the second electrode, It provides a display apparatus including.

Description

TECHNICAL FIELD [0001] The present invention relates to a touch screen panel integrated type display device and a manufacturing method thereof. BACKGROUND OF THE INVENTION 1. Field of the Invention [0002]

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a touch screen panel integrated display device and a method of manufacturing the same.

2. Description of the Related Art [0002] As an information-oriented society develops, there have been various demands for display devices for displaying images. Recently, liquid crystal displays (LCDs), plasma display panels (PDPs) Various display devices such as an OLED (Organic Light Emitting Diode Display Device) and the like are being utilized.

Such a display device provides a touch-based input method that allows a user to easily input information or commands intuitively and conveniently without using a conventional input method such as a button, a keyboard, and a mouse.

In order to provide such a touch-based input method, it is necessary to grasp the presence or absence of a user's touch and accurately detect touch coordinates.

To this end, touch sensing is provided by adopting one of various touch methods such as a resistance film type, a capacitance type, an electromagnetic induction type, an infrared type, and an ultrasonic type.

In addition, when a touch screen is applied to a display device, a touch sensor is embedded in the display device. In particular, an in-cell type display device utilizing a common electrode formed on a lower substrate as a touch sensing electrode Is being developed. However, since the display device of the in-cell type requires a detailed process because it needs to form a touch sensing electrode, it has a disadvantage that the manufacturing cost and manufacturing time are long and the competitiveness of the product is low.

In view of the foregoing, it is an object of the present invention to provide a touch screen panel integrated display device and a manufacturing method thereof, and to provide a structure and a method for reducing a detailed process.

In order to achieve the above object, in one aspect, the present invention provides a liquid crystal display comprising: a gate line which is located in a first direction on a substrate and transmits a gate signal; a data line which is located in a second direction on the substrate, A thin film transistor located in each pixel defined by intersecting the gate line and the data line, a first electrode spaced apart from one of a source electrode and a drain electrode of the thin film transistor, a second electrode located in correspondence with the first electrode, A thin film transistor protection layer formed on the thin film transistor and having a first contact hole, a first connection pattern connecting one of the source electrode and the drain electrode to the first electrode through the first contact hole, And a second connection pattern, which is the same material as the first connection pattern, to the second electrode.

According to another aspect of the present invention, there is provided a liquid crystal display device including: a plurality of pixels arranged in a first direction on a substrate and having a gate line for transmitting a gate signal and a data line for transferring a data signal, N pixels of a first electrode located at a distance from one of a source electrode and a drain electrode of the thin film transistor, a plurality of P pixels arranged in correspondence with the first electrode and providing the same signal for all N pixels, A thin film transistor protection layer formed on the thin film transistor and having a first contact hole formed on the thin film transistor, a thin film transistor formed on the NxP thin film transistor, NxP first connection patterns for connecting the first and second connection patterns to the P second electrodes, A touch integrated circuit for applying a touch driving signal to all or a part of the plurality of second electrodes when the driving mode of the display panel is a touch driving mode, A data driver for supplying a data voltage to the plurality of data lines when the mode is a display driving mode and a gate driver for sequentially supplying scan signals to the plurality of gate lines when the driving mode is a display driving mode A display device is provided.

According to another aspect of the present invention, there is provided a method of manufacturing a thin film transistor, comprising: forming a thin film transistor on a substrate; accumulating a thin film transistor protective layer and a first electrode layer covering the thin film transistor; Forming a first electrode by etching a thin film transistor protection layer, forming a first connection pattern connecting one of the source electrode and the drain electrode with the first electrode using a second photomask, Forming a second connection pattern to be transferred to the electrode, applying the first electrode protection layer and forming the first electrode protection layer using a third photomask, and forming the first electrode protection layer using the fourth photomask, The method of manufacturing a signal line of a display device incorporating a touch sensor including the steps of:

According to another aspect of the present invention, there is provided a method of manufacturing a thin film transistor, comprising: forming a thin film transistor on a substrate; accumulating an overcoat layer and a common electrode layer on the thin film transistor; etching the common electrode layer and the overcoat layer using a first photomask Forming a common electrode, accumulating a first passivation layer on the overcoat layer and the common electrode, forming a touch signal line on the first passivation layer using a second photomask, Forming a first passivation layer on the first passivation layer and a second passivation layer on the first passivation layer, etching the first passivation layer, the second passivation layer and the overcoat layer using a third photomask to form a source electrode or a drain electrode A second contact hole exposing the common electrode, and a third contact hole exposing the touch signal line, and a fourth contact hole exposing the touch signal line, Forming a first connection pattern on the first contact hole with the same material as that of the pixel electrode while forming a pixel electrode on the second protective layer using a toe mask, And forming a second connection pattern on the contact hole. The present invention also provides a method of manufacturing a signal line of a display device having a built-in touch sensor.

As described above, according to the present invention, it is possible to provide a manufacturing method for reducing a detailed process of a touch screen panel integrated display device and a display device using the same.

1 is a schematic view of a touch screen panel integrated display device according to an exemplary embodiment of the present invention.
FIG. 2 is a diagram illustrating capacitance components (Cself, Cpara1, Cpara2) generated in a touch driving mode in a touch screen panel integrated display device according to an exemplary embodiment.
3 is a plan view of a panel included in a touch screen panel integrated display device according to an exemplary embodiment.
FIG. 4 is a cross-sectional view illustrating a touch screen panel integrated display device according to an exemplary embodiment of the present invention when the display device is a liquid crystal display device.
5 is another plan view of a panel included in a touch screen panel integrated display device according to an embodiment.
6A is a view showing a manufacturing process for each thin film transistor of a substrate.
6B is a view showing an embodiment of a process applied by the process of the present invention.
7A to 7E are plan views illustrating a process of forming a pixel portion, a gate pad portion, and a data pad portion of a display device according to an embodiment of the present invention.
8 is a cross-sectional view of a pixel portion, a gate pad portion, and a data pad portion of a display device according to an embodiment of the present invention.
9 is a diagram illustrating a configuration of a display apparatus according to an embodiment of the present invention.
10 is a view showing a state in which the thin film transistor, the first passivation layer, the planarization layer, and the first electrode are stacked and stacked.
11A to 11D are process diagrams illustrating a process of forming a first electrode using one mask according to an embodiment of the present invention.
12 is a view showing protruding portions of the first electrode after dry etching according to an embodiment of the present invention.
13A to 13E are process diagrams illustrating a process of forming a connection pattern using three photomasks according to an embodiment of the present invention, forming a first electrode protection layer, and forming a second electrode.
FIG. 14 is a flowchart showing a process according to an embodiment of the present invention.
FIG. 15 is a diagram to which the embodiment of the present invention is applied when the active layer of the thin film transistor is a metal oxide semiconductor.
FIG. 16 is a diagram to which the embodiment of the present invention is applied when the activation layer of the thin film transistor is low-temperature polysilicon.
FIG. 17 is a diagram showing the shortening of steps before and after applying the present invention in a POT (Pixel On Top) structure.
18 is a view showing a process in which a light shielding layer, an activation layer, and a gate are formed on a substrate according to an embodiment of the present invention.
19 is a view illustrating a process of forming a source electrode and a drain electrode according to an embodiment of the present invention.
20 is a view showing a process of forming a common electrode, which is a second electrode according to an embodiment of the present invention, and forming an overcoat layer.
21 is a view illustrating a process of forming a touch signal line according to an embodiment of the present invention and connecting a touch signal line and a common electrode, which is a second electrode, using a connection pattern.
22 is a view illustrating a process of manufacturing a signal line of a display device according to an embodiment of the present invention.

Hereinafter, some embodiments of the present invention will be described in detail with reference to exemplary drawings. In the drawings, like reference numerals are used to denote like elements throughout the drawings, even if they are shown on different drawings. In the following description of the present invention, a detailed description of known functions and configurations incorporated herein will be omitted when it may make the subject matter of the present invention rather unclear.

In describing the components of the present invention, terms such as first, second, A, B, (a), and (b) may be used. These terms are intended to distinguish the components from other components, and the terms do not limit the nature, order, order, or number of the components. When a component is described as being "connected", "coupled", or "connected" to another component, the component may be directly connected or connected to the other component, Quot; intervening "or that each component may be" connected, "" coupled, "or " connected" through other components.

The present invention relates to a method of using a metal material necessary for forming a touch signal line to connect (contact) a pixel electrode with a source electrode or a drain electrode, and a structure of a connection pattern for connecting a source electrode or a drain electrode and a pixel electrode And a display device.

1 is a schematic view of a touch screen panel integrated display device according to an exemplary embodiment of the present invention.

Referring to FIG. 1, a touch screen panel integrated display device 100 according to an embodiment includes a panel 110, a data driver 120, a gate driver 130, and an integrated circuit 140 Quot; touch integrated circuit ") and the like.

A plurality of gate lines GL are formed in a first direction (e.g., a horizontal direction or a vertical direction) in the panel 110 so that a plurality of data lines DL are arranged in a second direction And a plurality of pixels (P) are defined corresponding to the intersections of the plurality of data lines DL and the plurality of gate lines GL.

In the pixel region of each pixel P, a source electrode or a drain electrode is connected to the data line DL, a gate electrode is connected to the gate line GL, and either the drain electrode or the source electrode is connected to the pixel electrode Pixel An electrode, a pixel electrode, or a first electrode).

The panel 110 further includes a plurality of electrodes S11 to S14, S21 to S24, and S31 to S34 that are grouped or blocked into a plurality of electrode groups, which are spaced apart from each other.

This panel 110 serves as a " display panel "while also serving as a " TSP (Touch Screen Panel) ".

That is, the panel 110 may be a panel in which a display panel and a touch screen panel are integrated into one, or a display panel in which a touch screen panel (TSP) is built in an in- .

When the panel 110 serves as a display panel, the driving mode of the panel 110 is referred to as a " display driving mode ", and when the panel 110 serves as a touch screen panel, It is referred to as "touch driving mode ".

The data driver 120 supplies the display data voltage Vdata or the data signal to the plurality of data lines DL when the driving mode of the panel 110 is the display driving mode.

The gate driver 130 sequentially supplies a gate signal or a scan signal for display to the plurality of gate lines GL when the driving mode of the panel 110 is the display driving mode .

When the driving mode of the panel 110 is the touch driving mode, the touch integrated circuit 140 performs a touch operation to all or a part of the plurality of electrodes S11 to S14, S21 to S24, and S31 to S34 directly connected through the touch signal lines And applies a driving signal (Touch Driving Signal). Here, the touch driving signal is called a touch sensing signal or a touch sensing voltage or a touch driving voltage (Vtd: touch driving voltage).

For example, when the driving mode of the panel 110 is the touch driving mode, the touch integrated circuit 140 may be configured such that the plurality of electrodes S11 to S14, S21 to S24, and S31 to S34 are grouped into a plurality of grouped electrode groups And applies a touch-driving signal to all or part of the touch panel.

Meanwhile, the touch screen panel integrated display device 100 according to an exemplary embodiment may further include a timing controller (not shown) for controlling driving timings of the data driver 120 and the gate driver 130 .

The touch screen panel integrated type display device 100 according to an exemplary embodiment of the present invention includes a plurality of electrodes S11 to S14, S21 to S24, and S31 to S34 serving as touch electrodes, And a touch controller (not shown) that receives touch data (e.g., capacitance, change amount of capacitance, voltage, etc.) and detects touch presence or touch coordinates.

Meanwhile, the panel 110 of the touch screen panel integrated display device 100 according to the embodiment is driven while repeating the display driving mode and the touch driving mode. The timing of the display driving mode and the touch driving mode is controlled by a timing controller Can be controlled by a control signal output from a touch controller or the like, and in some cases, can be controlled by interlocking the timing controller and the touch controller.

Meanwhile, the touch screen panel integrated type display device 100 according to one embodiment is a touch type touch screen panel integrated type display device in which a plurality of touch electrodes (for example, a horizontal direction electrode and a vertical direction electrode) And a capacitive touch method for detecting presence / absence of touch and touch coordinates based on the change.

Such a capacitance touch method can be classified into a mutual capacitance touch method and a self capacitance touch method, for example.

In the mutual capacitance touch method, which is one type of capacitance touch method, one of the horizontal direction electrode and the vertical direction electrode is a Tx electrode (also referred to as a driving electrode) to which a driving voltage is applied, (Mutual capacitance) between the Tx electrode and the Rx electrode depending on the presence or absence of a pointer such as a finger or a pen, and the presence or absence of a touch and the touch Coordinates, and so on.

In the magnetic capacitance touch method, which is another type of capacitance touch method, each touch electrode forms a pointer and a capacitance (magnetic capacitance) such as a finger and a pen, and a touch point between each touch electrode and a point And measuring the capacitance value and detecting the presence or absence of the touch and the touch coordinate based on the measurement. In this magnetic capacitance touch method, unlike the mutual capacitance touch method, a driving voltage (touch driving signal) is applied and sensed simultaneously through each touch electrode. Therefore, in the magnetic capacitance touch method, there is no distinction between the Tx electrode and the Rx electrode.

The touch screen panel integrated display device 100 according to an exemplary embodiment may adopt one of the two capacitance touch methods (mutual capacitance touch method, magnetic capacitance touch method). In the present specification, for convenience of explanation, an embodiment will be described on the assumption that a magnetic capacitance touch method is adopted.

The data driver 120 may include at least one data driver IC (also referred to as a "source driver integrated circuit"), which includes at least one data driver integrated circuit A bonding pad of the panel 110 may be directly connected to the bonding pad of the panel 110 or may be formed directly on the panel 110 by a TAB (Tape Automated Bonding) method or a chip on glass (COG) Or may be integrated and formed on the panel 110.

1, the gate driving unit 130 may be located on one side of the panel 110, or on both sides of the panel 110, as shown in FIG.

In addition, the gate driver 130 may include at least one gate driver IC, which may be a tape automated bonding (TAB) or chip on glass (GIP) type or may be directly formed on the panel 110. In some cases, the panel 110 may be integrated with the panel 110, have.

1, the touch integrated circuit 140 is configured separately from the data driver 120 and the gate driver 130, and may be provided outside the data driver 120 and the gate driver 130, But may be implemented with an internal configuration of another separate driver IC (e.g., a display driver IC) that may include at least one of the data driver 120 and the gate driver 130, or the like, The data driver 120, or the gate driver 130, as shown in FIG.

Accordingly, in the touch driving mode, the touch integrated circuit 140 applies the touch driving signal to all or a part of the plurality of electrodes serving as the touch electrodes in the touch driving mode by using a separate driver including the touch integrated circuit 140 It is also possible to apply a touch driving signal to all or a part of a plurality of electrodes that serve as a touch electrode of the IC. Depending on the designing method, the data driving unit 120 or the gate driving unit including the touch integrated circuit 140 130 may apply a touch driving signal to all or a part of a plurality of electrodes serving as touch electrodes.

The present invention is not limited to the implementation and design method of the touch integrated circuit 140, and may be any other configuration itself, internal or external configuration, if only the performance functions described herein are the same or similar.

The touch integrated circuit 140 is shown as one in FIG. 1, but may be implemented in two or more.

On the other hand, in order for the touch integrated circuit 140 to apply a touch driving signal to all or a part of a plurality of electrodes (for example, S11 to S14, S21 to S24, and S31 to S34) , S21 to S24, and S31 to S34, respectively.

At least one signal line that is connected to each of the plurality of electrodes S11 to S14, S21 to S24, and S31 to S34 and transmits a touch driving signal or a common voltage is connected to each of the plurality of electrodes in a first direction : A horizontal direction).

When two or more signal lines are connected to each of the plurality of electrodes S11 to S14, S21 to S24, and S31 to S34, the resistance can be reduced.

The direction in which at least one signal line connected to each of the plurality of electrodes S11 to S14, S21 to S24 and S31 to S34 is formed is a direction in which the plurality of electrodes S11 to S14, S21 to S24, and S31 to S34 (For example, the vertical direction) in which the data lines are formed, or whether they are grouped and sensed in the second direction (e.g., the horizontal direction) in which the gate lines are formed.

If a plurality of electrodes S11 to S14, S21 to S24, and S31 to S34 are grouped and sensed in a first direction (e.g., longitudinal direction) in which the data lines are formed, S24, and S31 to S34 may be formed in a first direction (e.g., the longitudinal direction) in which the data lines are formed (see FIG. 3).

If a plurality of electrodes S11 to S14, S21 to S24, and S31 to S34 are grouped and sensed in a second direction (e.g., a horizontal direction) in which gate lines are formed, S24, and S31 to S34 may be formed in a second direction (e.g., a horizontal direction) in which the data lines are formed.

As described above, when the driving mode is the touch driving mode, the plurality of electrodes S11 to S14, S21 to S24, and S31 to S34 referred to in the present specification, Quot ;, and serves as a "common electrode" to which a common voltage Vcom opposite to the pixel electrode formed on the panel is applied when the driving mode is the display driving mode. The electrode that performs the role of the touch electrode or the common electrode according to the driving mode is referred to as a second electrode.

The touch screen panel integrated display device 100 according to an exemplary embodiment of the present invention is a method of arranging liquid crystal molecules horizontally and rotating the same in place and displaying a screen. The display device 100 has advantages such as high resolution, low power, Or an IPS (In-Plane Switching) type liquid crystal display device. More specifically, it may be an AH-IPS (Advanced High Performance-IPS) type liquid crystal display.

At this time, in the display driving mode, the pixel electrodes and the common electrodes (S11 to S14, S21 to S24, S31 to S34) are formed so that a horizontal electric field is formed between the pixel electrodes and the common electrodes (S11 to S14, S21 to S24, S31 to S34) ) May be formed on the same substrate.

The touch screen panel integrated display device 100 according to one embodiment may be, for example, an organic light emitting display in which an organic light emitting layer is formed between a pixel electrode and a common electrode. At this time, the pixel electrode and the common electrode may be formed on the same substrate.

FIG. 2 is a diagram illustrating capacitance components (Cself, Cpara1, Cpara2) generated in a touch driving mode in a touch screen panel integrated display device according to an exemplary embodiment.

2, a plurality of electrodes S11 to S14, S21 to S24, and S31 to S34, which serve as touch electrodes in the touch driving mode and serve as common electrodes for forming pixel electrodes and liquid crystal capacitors in the display driving mode, , A pointer such as a finger and a pen and a magnetic capacitance (Cself) are formed in order to detect presence or absence of touch and touch coordinates in the touch drive mode. On the other hand, the plurality of electrodes serving as the common electrode can form the parasitic capacitances Cpara1 and Cpara2 with the gate lines and the data lines, but are negligible because they are very small compared to the magnetic capacitances.

A plurality of electrodes S11 to S14, S21 to S24, and S31 to S34 that serve as a panel 110, a common electrode, and a touch electrode included in the touch screen panel integrated type display device 100 according to an exemplary embodiment, A data voltage to the data line DL and a method of applying the touch driving signal (or a signal corresponding thereto), a data voltage to the gate line GL, and a touch driving signal Or a signal corresponding thereto) will be described in more detail.

First, a panel 110 included in a touch screen panel integrated display device 100 according to an embodiment will be described in more detail with reference to FIGS. 3 to 5. FIG.

3 is a plan view of a panel included in a touch screen panel integrated display device according to an exemplary embodiment.

3, the panel 110 includes a plurality of data lines DL, a plurality of gate lines GL, and a plurality of electrodes S11 to S14, S21 to S24, and S31 to S34 Respectively.

In addition, the panel 110 may operate in a display driving mode or a touch driving mode, as described above.

In this regard, a plurality of data lines DL and a plurality of gate lines GL formed in the panel 110 are the structure in which the panel 110 serves as a display panel.

The plurality of electrodes S11 to S14, S21 to S24, and S31 to S34 formed on the panel 110 are configured to serve both as a display panel and as a touch screen panel.

More specifically, when the panel 110 serves as a display panel, that is, when the driving mode of the panel 110 is the display driving mode, the plurality of electrodes S11 through S14, S21 through S24, and S31 through S34, Common electrode "(also referred to as" Vcom electrode ") which is opposite to the pixel electrode (first electrode, not shown) by applying a common voltage (Vcom: common voltage)

When the panel 110 serves as a touch screen panel, that is, when the driving mode of the panel 110 is the touch driving mode, the plurality of electrodes S11 through S14, S21 through S24, and S31 through S34, A drive voltage is applied to form a touch pointer (e.g., a finger, a pen, etc.) and a capacitor, and the capacitance of the capacitor thus formed becomes a "touch electrode"

In other words, the plurality of electrodes S11 to S14, S21 to S24, and S31 to S34 serve as common electrodes (Vcom electrodes) in the display driving mode and serve as touch electrodes in the touch driving mode.

The common voltage Vcom is applied to the plurality of electrodes S11 to S14, S21 to S24, and S31 to S34 in the display driving mode, and the touch driving signal is applied in the touch driving mode.

3, in order to transmit a common voltage or a touch driving signal to the plurality of electrodes S11 to S14, S21 to S24, and S31 to S34, a plurality of electrodes S11 to S14, S21 to S24 , S31 to S34 may be connected to the signal lines SL11 to SL14, SL21 to SL24, and SL31 to SL34.

The touch driving signal Vtd generated in the touch integrated circuit 140 is supplied to the plurality of electrodes S11 to S14 , S21 to S24 and S31 to S34 in the display driving mode and supplied through the signal lines SL11 to SL14, SL21 to SL24 and SL31 to SL34 in the common mode voltage supply unit (not shown) The common voltage Vcom is applied to the plurality of electrodes S11 to S14, S21 to S24, and S31 to S34.

Referring to FIG. 3, one pixel (P) is defined corresponding to each intersection of a plurality of data lines DL and a plurality of gate lines GL formed in the panel 110. Here, each pixel may be one of a red (R) pixel, a green (G) pixel, a blue (B) pixel, and the like.

3, a region (hereinafter also referred to as a unit touch electrode region) in which each of a plurality of electrodes S11 to S14, S21 to S24, and S31 to S34 serving as a common electrode and a touch electrode is formed, The pixel P can be defined. That is, one electrode of the plurality of electrodes S11 to S14, S21 to S24, and S31 to S34 corresponds to two or more pixels P.

For example, one region (unit touch electrode region) in which each of the plurality of electrodes S11 to S14, S21 to S24, and S31 to S34 serving as a common electrode and a touch electrode is formed has 24 * 3 data lines DL And 24 gate lines GL are arranged, and 24 * 3 * 24 pixels P can be defined.

On the other hand, each of the plurality of electrodes S11 to S14, S21 to S24, and S31 to S34 serving as the common electrode and the touch electrode may be a block-shaped pattern as shown in Fig. 3, It may be a pattern including a comb-shaped portion.

The present invention is also applicable to a case where each of the plurality of electrodes S11 to S14, S21 to S24, and S31 to S34 serving as the common electrode and the touch electrode includes comb-like portions.

A plurality of electrodes, which serve as both the touch electrode and the common electrode in the present specification, are shown as being arranged in a matrix of three rows and four columns in the various figures, and are shown as twelve. However, A plurality of electrodes serving as both the touch electrode and the common electrode can be formed in various matrix shapes and in various numbers in consideration of the size of the screen panel integrated display device 100 and the panel 110, .

FIG. 4 is a cross-sectional view illustrating a touch screen panel integrated display device according to an exemplary embodiment of the present invention when the display device is a liquid crystal display device.

4 is a cross-sectional view showing a region (unit touch electrode region) where one electrode is formed among a plurality of electrodes S11 to S14, S21 to S24, and S31 to S34 serving as a common electrode and a touch electrode.

Referring to FIG. 4, the panel 110 included in the touch screen panel integrated display device 100 according to an exemplary embodiment includes the gate line 402 on the lower substrate 400 in the first direction (Left and right direction in FIG. 4), and a gate insulator 404 is formed thereon.

The data line 406 is formed on the gate insulating layer 404 in the second direction (the longitudinal direction, the direction perpendicular to the paper in FIG. 4), and the first protective layer 408 is formed thereon.

The pixel electrode 410 and the signal line 412 of each pixel region may be formed on the first passivation layer 408 and the second passivation layer 414 may be formed thereon. Here, the signal line 412 is connected from the plurality of electrodes S11 to S14, S21 to S24, and S31 to S34 serving as the common electrode and the touch electrode to the touch integrated circuit 140, The common voltage Vcom generated in the voltage supply unit is transferred to the plurality of electrodes S11 to S14, S21 to S24 and S31 to S34. In the touch driving mode, a plurality of touch driving signals generated in the touch integrated circuit 140 To the electrodes (S11 to S14, S21 to S24, S31 to S34).

On the second protective layer 414, one electrode 416 serving as a common electrode and a touch electrode is formed, and a liquid crystal layer 418 is formed thereon. Here, one electrode 416 serving as a common electrode and a touch electrode may be a pattern having a block shape as one of the plurality of electrodes S11 to S14, S21 to S24, and S31 to S34.

An upper substrate 420 on which a black matrix (Black Matrix) 419a, a color filter 419b, and the like are formed is disposed on the liquid crystal layer 418.

Although the liquid crystal display device is illustrated in FIG. 4, the present invention is not limited thereto and can be applied to various display devices that can be combined with a touch panel.

5 is another plan view of a panel included in a touch screen panel integrated display device according to an embodiment.

3, the signal lines SL11 to SL14 and SL21 to SL24, which are connected to the plurality of electrodes S11 to S14, S21 to S24, and S31 to S34, respectively, for transmitting a touch driving signal or a common voltage, , SL31 to SL34 may be formed in parallel with the second direction (e.g., the horizontal direction) in which the gate line GL is formed.

In this case, the touch driving signal generated in the touch integrated circuit 140 or the common voltage generated or supplied from the common voltage supply unit may include signal lines (SL11 to SL14, SL21 to SL24, SL31 to SL34) To all or part of the plurality of electrodes S11 to S14, S21 to S24, and S31 to S34.

Hereinafter, a manufacturing process for manufacturing a signal line (SL11 to SL14, SL21 to SL24, SL31 to SL34, hereinafter referred to as a touch signal line in FIG. 3 or FIG. 5) for transmitting a touch driving signal to the common electrode shown in FIGS. The manufacturing process of the present invention for reducing the manufacturing process will be described.

The touch signal line may also be referred to as a conductive metal layer (M3L, or third conductive layer) in the process.

It is necessary to form a separate signal line in order to form an electrode for providing a grouped or blocked common voltage in the inelecouch as described above and the number of masks required for forming the signal line may increase, (A pixel electrode) and a thin film transistor protection layer (a planarizing layer or an overcoat layer) formed on the thin film transistor are etched at one time, and a first connection pattern for connecting a source electrode or a drain electrode of the thin film transistor to the first electrode, Is formed of a material of a touch signal line, and the first electrode protection layer and the second electrode formed on the first electrode are formed using a single mask, respectively, and a structure reflecting the process will be described.

Examples of a thin film transistor formed on a back plane to which the present invention can be applied include amorphous silicon (a-Si), metal oxide, and polysilicon polysilicon may be low temperature polysilicon (LTPS), high temperature polysilicon (HTPS), and the like. But is not limited thereto.

6A is a view showing a manufacturing process for each thin film transistor of a substrate.

610, a gate electrode and an activation layer are formed in a manner of manufacturing an a-Si thin film transistor substrate, a source electrode and a drain electrode are formed, and then a planarization layer, a first passivation layer, a pixel electrode and a touch signal line, And then forming the second protective layer and the common electrode again.

620 is a method of forming a metal oxide thin film transistor substrate in which a gate electrode, an activation layer, an etching stopper layer, and a gate hole (G-Hole) are formed and a source electrode and a drain electrode are formed, A protective layer, a pixel electrode and a touch signal line, and a second protective layer and a common electrode.

630, a light shielding layer (LS), an activation layer, a gate electrode, a contact hole, a source electrode and a drain electrode are formed in one method of manufacturing an LTPS thin film transistor substrate, Or a planarization layer), a pixel electrode, a touch signal line, a second passivation layer, and a common electrode.

6B is a view showing an embodiment of a process applied by the process of the present invention. The steps 615, 625, and 636 in FIG. 6A can be changed as shown in FIG. 6B.

In the first embodiment, one mask (Mask # 1) is used to form the pixel electrode, the planarization layer, and the first passivation layer as indicated at 690. In forming the touch signal line, one mask Mask # 2) is used. In this process, a touch signal line is formed as a connection pattern so that the material of the pixel electrode and the source-drain electrode contact with each other.

Next, one mask (Mask # 3) is used to form the second protective layer, and finally one mask (Mask # 4) is used to form the common electrode (Vcom or Vdd). As a result, five steps are performed in step 615, six steps are performed in step 625, and five steps are performed in step 635. In the embodiment of the present invention, however, four steps are performed.

In FIG. 6B, the planarization layer is an embodiment of the thin film transistor protection layer, and an overcoat layer may be formed instead of the planarization layer. The pixel electrode is one embodiment of the first electrode, the second protective layer is one embodiment of the first electrode protection layer, and the common electrode is one embodiment of the second electrode.

7A to 7E are plan views illustrating a process of forming a pixel portion, a gate pad portion, and a data pad portion of a display device according to an embodiment of the present invention.

7A, a gate pad portion 891, a data pad portion 892, a gate electrode 802b, an activation layer (or active layer) 812, a source electrode 824, and a drain electrode 826 are formed Able to know. Two masks can be used to form the top view of Figure 7a on the substrate. Although not shown in FIG. 7A, a first passivation layer and a thin film transistor passivation layer (e.g., a planarization layer or an overcoat layer) may be formed on the thin film transistor. FIG. 7B illustrates an ITO 840 for a pixel electrode. Referring to FIG. 7C, a contact hole such as 865 may be formed by etching a specific region of a first electrode, for example, a pixel electrode. In FIG. 7C, one mask may be used to etch a specific region of the pixel electrode and the first passivation layer and / or the thin film transistor passivation layer applied thereunder. The first contact hole 865 formed in this process exposes the source electrode 824. FIG. 7D illustrates the application of the conductive metal layer for the touch signal line as described above. In this process, one mask may be used. The connection pattern 850a connecting the first electrode, for example, the pixel electrode 840 and the source electrode 824, is formed through the contact hole of the contact hole 865. At the same time, a connection pattern 850c is formed on the data pad 892 like 850c, and a connection pattern 850b connecting the common electrode and the touch signal line to be formed later is formed. 7E, the common electrodes 870a and 870b are formed using a single mask. Gate pads 870d are formed in the gate pad 891 at the same time as the common electrodes. A connection portion 870c is formed. In addition, the common electrode 870b is connected to the second connection pattern 850b through the second contact hole 885 for connection with the touch signal line.

 The structure of a display device of an in-cell type completed by the above-described processes or modified embodiments of the process is summarized as follows. The parts overlapping with those of FIGS. 1, 3 and 5 are omitted. The display device includes a plurality of gate lines, a plurality of data lines, a plurality of thin film transistors and pixels, and first and second electrodes for controlling them. The first connection patterns may be formed for each pixel, and the second connection pattern may be formed for each second electrode grouped by a plurality of pixels, but the present invention is not limited thereto.

The details will be described below. There is a gate line which is located in a first direction on a substrate and transmits a gate signal, and a data line which is located in a second direction on a substrate and transmits a data signal. There are many thin film transistors located in each pixel defined by one gate line and one data line among a plurality of gate lines and data lines. The first electrode is located apart from one of the source electrode and the drain electrode of the thin film transistor, and the second electrode is located corresponding to the first electrode. As shown in FIG. 7C, a thin film transistor protection layer (for example, a planarization layer or an overcoat layer) is formed on the thin film transistor and a first contact hole is formed in the thin film transistor protection layer. Optionally, the first passivation layer may further be included, and the first contact hole may also be formed in the first passivation layer.

A first connection pattern for connecting one of the source electrode and the drain electrode to the first electrode through the formed first contact hole and a second connection pattern for transmitting the touch driving signal to the second electrode and being the same material as the first connection pattern do. The first connection pattern and the second connection pattern may be formed in a process of forming a touch signal line.

When the first electrode and the second electrode are formed in a common electrode on top (COT) structure in which the second electrode is formed after formation of the first electrode, the first electrode is formed on the first electrode, A protective layer (for example, a second protective layer) is located, and the second electrode is located on the first electrode protective layer. Of course, according to another embodiment of the present invention, in the case of a pixel electrode on top (POT) structure in which a first electrode is formed after a second electrode is formed first, a second electrode is formed, (E. G., A second passivation layer) and the first electrode may be located on the second electrode protection layer.

According to an embodiment of the present invention, a first connection pattern may be formed first, and then a first connection pattern may be formed by overlapping a portion of the first electrode on the first electrode. In this case, . In addition, according to another embodiment of the present invention, the first electrode may be formed after the first connection pattern is formed first, the first electrode may be positioned on the first connection pattern, and the first connection pattern may be formed under the first electrode Some areas may overlap and be located. The second connection pattern is connected to the touch signal line formed in the first direction or the second direction and connected to the second electrode through the second contact hole formed in the first electrode protection layer. A gate pad connection portion and a data pad connection portion may be formed in the same process as the second electrode and a third connection pattern which is the same material as the first connection pattern and the second connection pattern may be positioned under the data pad connection portion.

When the display device operates in the display mode, the second electrode serves as a common electrode to which the common voltage is applied. When the display device operates in the touch mode, the second electrode may function as a touch electrode to which the touch driving signal is applied.

One embodiment of the present invention can be applied to both a liquid crystal display or an organic light emitting display.

8 is a cross-sectional view of a pixel portion, a gate pad portion, and a data pad portion of a display device according to an embodiment of the present invention.

8 shows cross sections of I-I ', II-II', III-III 'and IV-IV' of FIG. 7E.

The gate pad portion 891 and the data pad portion 892 may be formed using the same material as the materials for forming the thin film transistor in the pixel portion 893 using the same process as the process for forming the thin film transistor.

Referring to FIG. 8, a gate electrode 802 is disposed on a substrate 800 in a pixel portion 893 of a display device according to an embodiment of the present invention. The gate electrode 802 may be composed of a conductive metal layer and a double electrode 802a or 802b of a transparent conductive material layer, but the present invention is not limited thereto. The gate electrode 802 may be a single electrode or a multi-electrode structure.

Gate lines 804a and 804b, which are components of the gate pad portion 891 formed of the same material as the gate electrode 802, are disposed on the substrate 800.

A gate insulating layer 810 is disposed on the gate electrode 802 and the gate line 804 for the gate pad. An active layer (or active layer) 812, a source electrode 824, and a drain electrode 826 are disposed on the gate insulating layer 810. Data lines 816a and 816b for the data pad portion 892 and data lines 814a and 814b are located on the gate insulating layer 810. [

A first protective layer 820 and a thin film transistor protective layer 830 are sequentially stacked on the source electrode 824 and the drain electrode 826 and on the data lines 814a, 814b, 816a and 816b. The first passivation layer 820 may be omitted according to the embodiment, and the thin film transistor protection layer 830 may be laminated. One embodiment of the thin film transistor protection layer 830 includes a planarization layer 830 or an overcoat layer.

The first electrodes 840a and 840b are located on the thin film transistor protection layer 830. The first electrodes 840a and 840b are pixel electrodes. Among the conductive metal layers 850a, 850b and 850c, reference numeral 850a denotes a first connection pattern for connecting one of the source electrode 824 and the drain electrode 826 to the first electrodes 840a and 840b. And 850b is a second connection pattern for transmitting the touch driving signal to the second electrode 870b. On the data lines 816a and 816b for the data pad, the third connection pattern 850c is located in the third connection pattern, and the data connection 870c and the data lines 816a and 816b are connected to the third connection pattern.

A first electrode protection layer 860 is formed on the first electrodes 840a and 840b and may be the second protection layer as described in the embodiment. The second electrodes 870a, 870b, 870c, and 870d are positioned on the first electrode protection layer 860. The second electrode functions as a common electrode when the display mode is selected. When the touch mode is selected, And functions as a touch electrode.

As described above, reference numeral 870c denotes a data pad connecting portion to which the data driver connects, and numeral 870d denotes a gate pad connecting portion to which the gate driver connects.

8, there are a first contact hole 865, a second contact hole 885, a third contact hole 875 and a fourth contact hole 877, which will be described later.

8 shows a configuration corresponding to one pixel and a data pad portion and a gate pad portion. This is extended to the entire display device and the configuration is as follows.

A thin film transistor is positioned on each of NxP pixels defined in a first direction on a substrate, a gate line transmitting a gate signal, and a data line located in a second direction on the substrate and transmitting a data signal. And there are NxP first electrodes spaced apart from one of the source electrode and the drain electrode of the thin film transistor. The first electrode may exist on a pixel-by-pixel basis and NxP electrodes may be formed. There are P second electrodes corresponding to the first electrodes and providing the same signal for all N pixels. This means that one second electrode functions as a common electrode and a touch electrode of the pixels grouped into N groups. There are a total of P such second electrodes, and as a result, the P second electrodes operate as a common electrode and a touch electrode over the entire NxP pixels.

A thin film transistor protection layer formed on the thin film transistor and having a first contact hole formed therein and formed on the NxP thin film transistor and having NxP contacts for connecting one of the source electrode and the drain electrode to the first electrode through the first contact hole There is a first connection pattern. The first connection pattern connects the source electrode or the drain electrode of the first electrode and the thin film transistor.

Transmits the touch driving signal to the P second electrodes, and includes P second connection patterns which are the same material as the first connection pattern. The display panel includes a gate line, a data line, a thin film transistor, a first electrode and a second electrode, and a first connection pattern and a second connection pattern.

The display device includes, in addition to the display panel, a touch integrated circuit for applying a touch driving signal to all or a part of the plurality of second electrodes when the driving mode of the display panel is the touch driving mode; And a gate driver for sequentially supplying the scan signals to the plurality of gate lines when the drive mode is the display drive mode.

When the first electrode and the second electrode are formed in a COT structure in which the second electrode is formed after the formation of the first electrode according to an implementation method, a first electrode is formed, and then a first electrode protection layer (for example, And a second electrode is located on the first electrode protection layer. Of course, according to another embodiment of the present invention, in a POT structure in which a first electrode is formed after a second electrode is formed, a second electrode is formed, and then a second electrode protection layer And a first electrode may be positioned on the second electrode protection layer.

According to an embodiment of the present invention, a first connection pattern may be formed first, and then a first connection pattern may be formed by overlapping a portion of the first electrode on the first electrode. In this case, . In addition, according to another embodiment of the present invention, the first electrode may be formed after the first connection pattern is formed first, the first electrode may be positioned on the first connection pattern, and the first connection pattern may be formed under the first electrode Some areas may overlap and be located. The second connection pattern is connected to the touch signal line formed in the first direction or the second direction and connected to the second electrode through the second contact hole formed in the first electrode protection layer. A gate pad connection portion and a data pad connection portion may be formed in the same process as the second electrode and a third connection pattern which is the same material as the first connection pattern and the second connection pattern may be positioned under the data pad connection portion.

When the display device operates in the display mode, the second electrode serves as a common electrode to which the common voltage is applied. When the display device operates in the touch mode, the second electrode may function as a touch electrode to which the touch driving signal is applied.

One embodiment of the present invention can be applied to both a liquid crystal display or an organic light emitting display.

9 is a diagram illustrating a configuration of a display apparatus according to an embodiment of the present invention.

More specifically, in FIG. 9, a plurality of NxP pixels and thin film transistors for these pixels are formed in a region where the data line and the gate line cross each other. And there are P common electrodes in one region that is a bundle of N pixels. The P common electrodes have a pixel region equal to 910, which shows the region of the pixel in which the second connection pattern is present. In the normal pixel region, there is no connection pattern between the touch signal line and the common electrode as in 920.

The steps of forming the connection patterns 850a, 850b, and 850c of FIG. 8 and reducing the mask are as follows.

10 is a view showing a state in which the thin film transistor, the first passivation layer, the planarization layer, and the first electrode are stacked and stacked.

A gate electrode 802 is formed on the substrate 800 in the form of double electrodes 802a and 802b and a gate line 804 connected to a gate pad connection portion to which the gate driver is connected is also connected to the dual electrodes 804a and 804b, As shown in FIG.

Reference numerals 802a and 804a denote conductive metal layers made of aluminum (Al), tungsten (W), copper (Cu), molybdenum (Mo), chromium (Cr), titanium (Ti), molybdenum tungsten (MoW), molybdenum / Moly titanium (Cu / MoTi), but the present invention is not limited thereto. In addition, 802b and 804b may use any one selected from the group including ITO (Indium Tin Oxide), IZO (Indium Zinc Oxide), and CNT (Carbon Nano Tube) as the transparent conductive material layer. 802 and 804 are not limited to being formed in the form of a double electrode, so they may be formed in the form of a single electrode instead of a double electrode.

In the process of forming the gate lines, that is, forming the gate lines 802 and 804 of FIG. 10, one mask may be used. And a gate insulating layer 810 may be formed on the layers 802 and 804.

An active layer 812, a source electrode 824, and a drain electrode 826 are formed on the gate insulating layer, and data lines 814 and 816 are formed together in this process. Similarly, a single mask can be used.

In more detail, the activation layer 812 may be formed of, for example, a semiconductor material such as amorphous silicon, polysilicon such as LTPS, HTPS, or the like. In addition, the activation layer 812 may include at least one selected from the group consisting of Zinc Oxide (ZO), Indium Gallium Zinc Oxide (IGZO), Zinc Indium Oxide (ZIO), Gallium-doped Zinc Oxide Ga-doped ZnO, ZGO).

The source electrode 824 and the drain electrode 826 are simultaneously formed using a thin film forming process such as sputtering or vapor deposition to complete the thin film transistor.

A first passivation layer 820 is formed on the thin film transistor. The first passivation layer 820 may be formed of an inorganic material such as SiO ₂ , SiN x, or an organic material such as photoacryl, but the present invention is not limited thereto.

On the first passivation layer 820, a thin film transistor protection layer 830 is formed. In one embodiment of the thin film transistor protection layer 830, the planarization layer has a dielectric constant of several tens to several hundreds, and a light rare earth oxide or a rare earth composite oxide such as LaAlO3, La2O3, Y2O3, LaAl3O6, etc., BST (strontium titanate strontium) A thin film transistor protection layer 830 may be formed using an organic material as the overcoat layer. [0158] A thin film transistor protection layer 830 such as a planarization layer or an overcoat layer The step difference between the electrodes is compensated and flattened.

A first electrode layer 840 is formed on the thin film transistor protection layer 830. The first electrode layer 840 is made of a transparent conductive material, and may be formed of ITO, IZO, ITZO, or the like. The first electrode layer 840 provides a function of a pixel electrode through a subsequent process and is connected to the source electrode 824 or the drain electrode 826.

A photoresist is first applied to form a photoresist by a photolithography process, and then a mask having a light transmitting portion and a light blocking portion is coated on the photoresist and light is irradiated to form a photoresist pattern Can be formed. Light passing through the transmissive portion may cure the photoresist and the remaining photoresist may be developed or vice versa.

11A to 11D are process diagrams illustrating a process of forming a first electrode using one mask according to an embodiment of the present invention. Hereinafter, a total of four masks shown in FIG. 6B are used in the process steps of FIGS. 11A to 13E and are referred to as a first photomask, a second photomask, a third photomask, and a fourth photomask, respectively.

Referring to FIG. 11A, a photoresist 1110 is formed using the first photomask in the stacked structure in FIG. In one embodiment, the photoresist forms a photoresist 1110 having three heights using a halftone mask, a diffraction mask, or the like.

Referring to FIG. 11B, wet etching is performed using a photoresist 1110 to etch a portion of the first electrode layer 840 to form first electrodes 840a and 840b having a specific pattern. .

Referring to FIG. 11C, dry etching is performed using a photoresist 1110 to form a part of the thin film transistor protection layer 830 and the first protection layer 820. The photoresist 1110 is the photoresist 1110 of FIG. Further, a first contact hole 865 and a third contact hole 875 are formed.

11D, a second wet etching is performed on the photoresist 1110 of FIG. 11C to further etch a portion of the first electrode 840b. As a result, the first electrode 840b of a specific pattern is formed, .

12 is a view showing protruding portions of the first electrode after dry etching according to an embodiment of the present invention.

As shown in FIG. 12, one portion 1201 and 1202 of the first electrodes 840a and 840b can protrude in the process of performing dry etching in FIG. 11B. In this case, when the second wet etching of FIG. 11D is performed, the protruded portions 1201 and 1202 may be removed together with further etching of a portion of the first electrode 840b.

13A to 13E are process diagrams illustrating a process of forming a connection pattern using three photomasks according to an embodiment of the present invention, forming a first electrode protection layer, and forming a second electrode.

Referring to FIG. 13A, the photoresist 1110 is removed in FIG. 11D and the touch signal line and the second connection pattern 850b, the first connection pattern 850a, and the second connection pattern 850b are formed by using a mask (second photomask). Thereby forming a third connection pattern 850c.

13B is a view showing the first electrode protection layer 860 formed. The first electrode protection layer 860 may be a second protection layer, but the present invention is not limited thereto. According to another embodiment of the present invention, when the second electrode is formed before the first electrode, the first electrode protection layer may be designated as the second electrode protection layer.

13C, a photoresist 1310 is formed on the first electrode protection layer 860 using one mask (third photomask), and dry etching is performed.

13D shows the result of removing the photoresist after performing the dry time. A first contact hole 865, a second contact hole 885, a third contact hole 875, and a fourth contact hole 877 are formed. Then, second electrodes 870a and 870b, a gate pad connecting portion 870d, and a data pad connecting portion 870c are formed by using one mask (fourth photomask) as shown in FIG. 13E. The second electrode serves as a common electrode, and 870b can transmit a touch driving signal.

The processes of FIGS. 10 to 13E are summarized in FIG.

FIG. 14 is a flowchart showing a process according to an embodiment of the present invention.

A substrate on which a thin film transistor is to be formed is prepared (S1410), and a thin film transistor is formed on the prepared substrate (S1420). Then, the thin film transistor protection layer and the first electrode layer covering the thin film transistor are accumulated (S1430). Then, the first electrode layer and the thin film transistor protection layer are etched using the first photomask to form a first electrode (S1440). This is illustrated in Figs. 11A to 11D.

In operation S1450, a first connection pattern connecting one of the source electrode and the drain electrode to the first electrode and a second connection pattern transmitting a touch driving signal to the second electrode are formed using the second photomask. This is illustrated in FIG. 13A.

13B to 13D, the first electrode protection layer is applied and the first electrode protection layer is formed using the third photomask (S1460).

13E, a second electrode is formed using a fourth photomask (S1470).

In step S1450, a third connection pattern may be formed to be connected to the data pad connection part in the process of forming the first connection pattern and the second connection pattern. In step S1470 of forming the second electrode, the data pad connection portion and the gate pad connection portion may be formed simultaneously with the formation of the second electrode using the same material as the second electrode. This has been described in detail in FIG. 13E.

In addition to the process and configuration in the case where the active layer of the thin film transistor is formed of amorphous silicon, a connection pattern connecting the pixel electrode and the source / drain electrode of the present invention can be realized even in the case of a metal oxide semiconductor or polysilicon such as LTPS. 625, which is a part of the process in which the activation layer of the thin film transistor of FIG. 6B is a metal semiconductor, can be applied as the process 690 of the embodiment of the present invention. Similarly, 635, which is part of the LTPS process of FIG. 6B, can be applied as in process 690 of the embodiment of the present invention.

FIG. 15 is a diagram to which the embodiment of the present invention is applied when the active layer of the thin film transistor is a metal oxide semiconductor.

FIG. 15 is a view showing a connection pattern of a pixel electrode and a source / drain electrode in a case where a process similar to that of FIG. 690 is applied.

The substrate 1500, the gate 1502, the gate insulating film 1504, the source electrode 1512, the drain electrode 1514, the activation layer 1516, the etching stopper layer 1518, the first passivation layer 1520, A transistor protective layer 1522, a pixel electrode 1524 as an example of a first electrode, a first electrode protection layer 1526, and a common electrode 1540, which is an embodiment of a touch signal line and a second electrode, A second connection pattern 1530, and a common electrode 1540 are formed. And a first connection pattern 1550 connecting the pixel electrode 1524 and the drain electrode 1514 are formed. The first connection pattern 1550 and the second connection pattern 1530 are made of the same material in one process.

FIG. 16 is a diagram to which the embodiment of the present invention is applied when the activation layer of the thin film transistor is low-temperature polysilicon.

FIG. 16 is a view showing a connection pattern of a pixel electrode and a source / drain electrode in the case of applying the same process as 690 of FIG. 6B.

In the case of LTPS, a substrate 1600, a light shield 1602, a buffer layer 1604, a lightly doped drain 1606, an activation layer 1608, a gate electrode 1610, and a data electrode (source / drain A gate insulating film 1622, an interlayer insulating film 1624, a thin film transistor protection layer 1626 and a touch signal line 1630 for a touch driving signal and a pixel electrode 1640 as an embodiment of the first electrode, A common electrode 1660 that is an embodiment of the second electrode and a first connection pattern 1670 that connects the pixel electrode 1640 and the data electrode 1620 are formed. Here, the formation of the touch signal line 1630 and the first connection pattern 1670 are performed in one process with the same material.

The features of the structure and the manufacturing method disclosed in the embodiments of the present invention can be applied to a VOT structure including a thin film transistor protection layer such as a planarization layer or an overcoat layer. However, the present invention is not limited thereto, can do. That is, compatibility of the POT (Pixel On Top) and VOT (Vcom On Top) structures with respect to the mask reduction technique can be ensured. When applied to a POT, a first electrode of which a pixel electrode is a VOT (or COT) structure is applied to the common electrode, and a second electrode of the common electrode is applied to the pixel electrode. Further, in the process of forming the touch signal line, the pixel electrode and the source / drain can be brought into contact through the side contact. In one embodiment of the thin film transistor protection layer of the present invention, a planarization layer including a photosensitive material and a non-photosensitive material or an overcoat layer formed of an organic material is applicable, which can be replaced with another organic material having a low dielectric constant.

The mask reduction process specified in the present invention can be applied to both cases where the rear substrate is amorphous silicon, oxide, LTPS, and also applicable to a structure including a touch signal line layer.

According to the structure and the manufacturing method disclosed in the embodiments of the present invention, the mask and the process can be reduced, and the productivity can be improved and the cost can be reduced. Further, the mask is reduced in forming the first electrode (pixel electrode) and the thin film transistor protective layer (planarization layer or overcoat layer).

The third connection pattern formed in the same process as the first connection pattern and the second connection pattern connects the data pad connection portion and the data line (816b in FIG. 8) of the data pad portion, which prevents damage to the data pad portion in the wet etching process .

A process of forming each connection pattern in an LTPS thin film transistor substrate according to another embodiment of the present invention will be described. In the present invention, in the process of forming the first electrode (pixel electrode), a connection pattern for connecting the touch signal line layer and the second electrode (common electrode) and a connection pattern for connecting the first electrode to the source / drain are simultaneously formed Focus on features.

FIG. 17 is a diagram showing the shortening of steps before and after applying the present invention in a POT (Pixel On Top) structure. Reference numeral 1710 denotes a flow for proceeding a process without a connection pattern, and reference numeral 1720 denotes a flow for proceeding a process for applying a connection pattern according to the present invention. In the POT structure, the first passivation layer (or the planarization layer) and the common electrode are formed after the light shielding layer, the activation layer, the gate electrode, the contact hole, the source electrode and the drain electrode are formed, (One or two passivation layers) and a pixel electrode. Ten masks can be used, respectively.

On the other hand, according to the embodiment of the present invention to which the connection pattern is applied, the mask # 1 to # 5 are the same as 1710 like 1720. However, the common electrode and the first passivation layer process (overcoating process) are performed simultaneously, and then a touch signal line, a second passivation layer (one or two passivation layers), and a pixel electrode as a first electrode are formed , And nine masks are used, thereby reducing one mask. In addition, when the present invention is applied, an overcoat layer can be applied instead of the planarization layer, and the mask and cost can be reduced. The process of applying the present invention will be described in more detail as follows.

18 is a view showing a process in which a light shielding layer, an activation layer, and a gate are formed on a substrate according to an embodiment of the present invention.

The light shielding layer 1802 is formed on the substrate 1801 using one mask Mask # 1 and the light shielding layer 1802 is formed on the substrate 1801 as indicated by 1892 A buffer layer 1804 is formed. Then, an activation layer 1806 is formed using one mask (Mask # 2). Thereafter, as indicated by 1893, a gate insulating layer 1808 is placed on the activation layer 1806, and a gate 1810 is formed by using one mask (Mask # 3) on the gate insulating layer 1808 . The activation layer 1806a located under the gate 1801 is not conducted in the etching process by the gate 1810 but the other activation layer 1806b is made conductive. Conducted activation layer 1806b contacts the source and drain electrodes in a subsequent process.

19 is a view illustrating a process of forming a source electrode and a drain electrode according to an embodiment of the present invention. 1991, an interlayer insulating film 1815 is applied and then etched using one mask (Mask # 4). In this process, contact holes 1817a and 1817b are formed to expose the activation layer 1806b.

Source electrode and drain electrode 1820 are then formed using one mask (Mask # 5) as indicated by 1992. [ The source and drain electrodes 1820 and the activation layer 1806a are in contact with each other through the contact holes 1817a and 1817b.

20 is a view showing a process of forming a common electrode, which is a second electrode according to an embodiment of the present invention, and forming an overcoat layer.

2091, an overcoat layer 1825 and a common electrode layer 1830 are formed, and then a photoresist 1835 is formed using one mask (Mask # 6). Then, the common electrode layer 1830 is wet-etched and the overcoat layer 1825 is dry-etched. As a result, the common electrode layer is formed of the common electrodes 1830a and 1830b, and a part of the photoresist 1835 remains on the common electrodes 1830a and 1830b as 2092. [ In the process of dry-etching the overcoat layer 1825 at 2091, the common electrodes 1830a and 1830b, which are the second electrodes, may be formed with a protruding shape such as 2080. Therefore, the second common electrodes 1830a and 1830b are wet-etched to remove the protruding shape. As a result, the photoresist remaining on the common electrodes 1830a and 1830b is removed as in 2093, and the tip 2080 is also removed in this process. In FIG. 20, since the common electrodes 1830a and 1830b and the overcoat layer 1825 are formed by using one mask (mask # 6), the mask is reduced.

21 is a view illustrating a process of forming a touch signal line according to an embodiment of the present invention and connecting a touch signal line and a common electrode, which is a second electrode, using a connection pattern.

2191, a protective layer (PAS1, 1840) is formed, and a touch signal line 1850 is formed thereon by using one mask (Mask # 7). Then, as indicated by 2192, another protective layer (PAS2, 1852) is masked with one mask (Mask # 8). In this process, a contact hole 2101 exposing one of the source electrode and the drain electrode 1820, a contact hole 2102 exposing the common electrode 1830b, and a contact hole 2103 exposing the touch signal line 1850 Is formed.

Then, as indicated by 2193, a pixel electrode 2110, which is a first electrode, is formed by using one mask (Mask # 9), and at the same time, a connection for connecting the common electrode 1830b and the touch signal line 1850 A pattern 2120 and a connection pattern 2130 which is in contact with the pixel electrode 2110 and one of the source electrode 1820 and the drain electrode 1820 are formed. The connection pattern 2120 connecting the common electrode 1830b and the touch signal line 1850 is formed on two contact holes 2102 and 2103 formed in 2192. The pixel electrode 2110 and the source electrode or the drain electrode A connection pattern 2130 connecting one 1820 is formed on the contact hole 2102 formed in 2192.

As shown in FIGS. 17 to 21, a planarization layer is applied and the pixel electrode, which is the first electrode, is formed after the common electrode, which is the second electrode, in the POT (Pixel on Top) Patterns 2120 and 2130 can be formed. In the case of applying the embodiment of the present invention, it is possible to leave a part of the organic material or to etch a part of the passivation layer at the bottom in consideration of process difficulty of selectively etching only the organic material in the dry etching process of the organic material. On the other hand, the planarization layer can be replaced with another organic material having a low dielectric constant, and both a photosensitive material and a non-photosensitive material are possible. In the embodiment of the present invention, the step of reducing the mask can be applied to all types of substrates including a-Si, oxide, and LTPS, and a layer (M3L Layer) And a Vcom on Top structure to which a planarizing layer is applied.

The following is summarized. As shown in FIGS. 7A to 16, the elements constituting the display device include a gate line positioned in a first direction on a substrate and transmitting a gate signal, a gate line positioned in a second direction on the substrate, A first electrode (pixel electrode) disposed at a distance from one of the source electrode and the drain electrode of the thin film transistor, and a second electrode A thin film transistor protection layer formed on the thin film transistor and having a first contact hole formed thereon and a first electrode connected to the first electrode through one of the source electrode and the drain electrode through the first contact hole, And a second connection pattern that transmits the connection pattern and the touch driving signal to the second electrode and is the same material as the first connection pattern. The second electrode protection layers 1840 and 1852 may be formed on the second electrode 1830b and the first electrode protection layers 1840 and 1852 may be formed on the second electrode protection layers 1840 and 1852. [ The electrode 2110 may be positioned. The thin film transistor protection layer may include both the second electrode protection layers 1840 and 1852 and the overcoat layer 1825. The first connection pattern 2130 connecting the first contact hole 2101 formed on the thin film transistor protection layers 1825, 1840 and 1852 and the source or drain electrode 1820 is the same material as the first electrode. A second contact hole 2102 for exposing the common electrode 1830b as a second electrode is disposed on the second electrode protection layer 1840 and a second connection pattern 2102 formed on the second contact hole 2102 2102 are connected to the touch signal line 1850 located in the first direction or the second direction and are connected to the common electrode 1830b which is the second electrode through the second contact hole 2102.

FIG. 22 is a view showing a process of manufacturing a signal line of a display device according to an embodiment of the present invention, and shows the process of FIGS. 18 to 21. FIG.

First, a substrate is prepared (S2210), a thin film transistor is formed (S2220), and an overcoat layer and a common electrode layer are accumulated on the thin film transistor (S2230). Then, the common electrode layer and the overcoat layer are etched using the first photomask to form a common electrode (S2240). Then, the first passivation layer is accumulated on the overcoat layer and the common electrode (S2250), and a touch signal line is formed on the first passivation layer using the second photomask (S2260). Then, A second protective layer is formed on the protective layer (S2270). The first protection layer, the second protection layer, and the overcoat layer are etched using the third photomask to form a first contact hole exposing one of the source electrode and the drain electrode of the thin film transistor, Holes, and a third contact hole exposing the touch signal line (S2280). Thereafter, a pixel electrode is formed on the second passivation layer using a fourth photomask, a first connection pattern is formed on the first contact hole with the same material as the pixel electrode, and the second contact hole and the third contact A second connection pattern is formed on the hole (S2290). Here, the second connection pattern connects the common electrode and the touch signal line.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the inventions. , Separation, substitution, and alteration of the invention will be apparent to those skilled in the art. Therefore, the embodiments disclosed in the present invention are intended to illustrate rather than limit the scope of the present invention, and the scope of the technical idea of the present invention is not limited by these embodiments. The scope of protection of the present invention should be construed according to the following claims, and all technical ideas within the scope of equivalents should be construed as falling within the scope of the present invention.

100: touch screen panel integrated display device 110: panel
120: Data driver 130: Gate driver
140: Touch integrated circuit 800: Lower substrate
802: gate electrode 824: source electrode
826: drain electrode 850a: first connection pattern
850b: second connection pattern 850c: third connection pattern

Claims (21)

A gate line positioned in a first direction on the substrate and transmitting a gate signal;
A data line located on the substrate in a second direction and transmitting a data signal;
A thin film transistor located in each pixel defined by intersecting the gate line and the data line;
A first electrode spaced apart from one of a source electrode and a drain electrode of the thin film transistor;
A second electrode located in a layer different from the first electrode;
A thin film transistor protection layer formed on the thin film transistor and having a first contact hole formed therein;
A first connection pattern connecting one of the source electrode and the drain electrode to the first electrode through the first contact hole;
A second connection pattern that transmits a touch driving signal to the second electrode and is the same material as the first connection pattern; And
And a third connection pattern located under the data pad connection portion, wherein the third connection pattern is the same material as the first connection pattern and the second connection pattern.
The method according to claim 1,
Further comprising: a first electrode protection layer disposed on the first electrode, wherein the second electrode is located on the first electrode protection layer.
The method according to claim 1,
And a second electrode protection layer disposed on the second electrode, wherein the first electrode is located on the second electrode protection layer.
The method of claim 3,
Wherein the second electrode protection layer further includes a second contact hole exposing a portion of the second electrode,
The second connection pattern is connected to the touch signal line located in the first direction or the second direction,
And the second connection pattern is connected to the second electrode through the second contact hole.
The method according to claim 1,
Wherein the first connection pattern overlaps with a part of the area on the first electrode.
The method according to claim 1,
And the first connection pattern is located under the first electrode so that a part of the region overlaps the first connection pattern.
3. The method of claim 2,
Wherein the second connection pattern is connected to the touch signal line located in the first direction or the second direction and is connected to the second electrode through a second contact hole located in the first electrode protection layer.
delete The method according to claim 1,
Wherein the second electrode comprises:
When the display device operates in the display mode, the common electrode serves as a common electrode to which a common voltage is applied,
Wherein the display device functions as a touch electrode to which a touch driving signal is applied when the display device operates in a touch mode.
A thin film transistor located in each of NxP pixels defined in a first direction on a substrate, the gate line transmitting a gate signal, and the data line located in a second direction on the substrate and transmitting a data signal;
NxP first electrodes spaced apart from one of a source electrode and a drain electrode of the thin film transistor;
P second electrodes located in correspondence with the first electrodes and providing the same signal for all N pixels;
A thin film transistor protection layer formed on the thin film transistor and having a first contact hole formed therein;
NxP first connection patterns located on the NxP thin film transistors and connecting one of the source electrode and the drain electrode to the first electrode through a first contact hole; And
A display panel for transmitting a touch driving signal to the P second electrodes and including P second connection patterns which are the same material as the first connection pattern;
A touch integrated circuit for applying a touch driving signal to all or a part of the P second electrodes when the driving mode of the display panel is a touch driving mode;
A data driver for supplying a data voltage to the data line when the driving mode is a display driving mode;
A gate driver for sequentially supplying a scan signal to the gate line when the drive mode is a display drive mode; And
And a third connection pattern located under the data pad connection portion, wherein the third connection pattern is the same material as the first connection pattern and the second connection pattern. 11. The method of claim 10,
Further comprising: a first electrode protection layer disposed on the first electrode, wherein the second electrode is located on the first electrode protection layer.
11. The method of claim 10,
And a second electrode protection layer disposed on the second electrode, wherein the first electrode is located on the second electrode protection layer.
13. The method of claim 12,
Wherein the second electrode protection layer further includes a second contact hole exposing a portion of the second electrode,
The second connection pattern is connected to the touch signal line located in the first direction or the second direction,
And the second connection pattern is connected to the second electrode through the second contact hole.
12. The method of claim 11,
Wherein the second connection pattern is connected to the touch signal line located in the first direction or the second direction and is connected to the second electrode through a second contact hole formed in the first electrode protection layer.
delete 11. The method of claim 10,
Wherein the second electrode comprises:
When the display device operates in the display mode, the common electrode serves as a common electrode to which a common voltage is applied,
Wherein the display device functions as a touch electrode to which a touch driving signal is applied when the display device operates in a touch mode.
Forming a thin film transistor on a substrate;
Accumulating a thin film transistor protection layer and a first electrode layer covering the thin film transistor;
Forming a first electrode by etching the first electrode layer and the thin film transistor protective layer using a first photomask;
Forming a first connection pattern connecting one of a source electrode or a drain electrode of the thin film transistor and the first electrode using a second photomask and a second connection pattern transmitting a touch driving signal to the second electrode;
Applying a first electrode protection layer and forming the first electrode protection layer using a third photomask; And
And forming a second electrode using a fourth photomask. ≪ Desc / Clms Page number 19 >
18. The method of claim 17,
Wherein forming the first connection pattern and the second connection pattern comprises:
And forming a third connection pattern to be connected to the data pad connection portion.
18. The method of claim 17,
The step of forming the second electrode
And forming a data pad connection portion and a gate pad connection portion simultaneously with the formation of the second electrode with the same material as the second electrode.
Forming a thin film transistor on a substrate;
Accumulating an overcoat layer and a common electrode layer on the thin film transistor;
Etching the common electrode layer and the overcoat layer using a first photomask to form a common electrode;
Accumulating a first protective layer on the overcoat layer and the common electrode;
Forming a touch signal line on the first passivation layer using a second photomask;
Forming a second passivation layer on the touch signal line and the first passivation layer;
A first contact hole exposing one of a source electrode and a drain electrode of the thin film transistor by etching the first passivation layer, the second passivation layer and the overcoat layer using a third photomask, a second contact hole exposing the common electrode, Forming a contact hole and a third contact hole exposing the touch signal line; And
A pixel electrode is formed on the second passivation layer using a fourth photomask and a first connection pattern is formed on the first contact hole with the same material as the pixel electrode, And forming a second connection pattern on the third contact hole.
21. The method of claim 20,
Wherein the second connection pattern includes a touch sensor connecting the common electrode and the touch signal line.

Images