KR101798235B1 - Hardmask materials - Google Patents

Abstract

A hard mask film having high hardness and low stress is provided. In some embodiments, the membrane has a stress of about -600 MPa to 600 MPa and a hardness of about 12 GPa. In some embodiments, a hard mask film is fabricated by depositing a plurality of sub-layers of doped or undoped silicon carbide using a plurality of densified plasma post-treatments in a PECVD process chamber. In some embodiments, the hard mask film comprises a boron-containing film having a high hardness selected from Si _x B _y C _z , Si _x B _y N _z , Si _x B _y C _z N _w , B _x C _y, and B _x N _y . In some embodiments, the hard mask film comprises a germanium-rich GeN _x material comprising about 60 atomic percent germanium. These hard masks can be used in various post-processes and all processes of integrated circuit fabrication.

Description

Hard mask material {HARDMASK MATERIALS}

The present invention relates to a hard mask film for use in a semiconductor process. The present invention also relates to a method and apparatus for forming such a film.

The hard mask film is typically used as a sacrificial layer during lithographic patterning (e.g., trench and / or via formation) during a damascene process. In a damascene process, a hard mask film is typically deposited over a dielectric layer that needs to be patterned. A layer of photoresist is deposited over the hard mask film (optionally, an anti-reflective layer is deposited between the hard mask and the photoresist), and the photoresist is patterned as desired. It is common for lasers to be used for alignment of the pattern with underlying structures, and therefore the hard mask must be substantially transmissive to the wavelength used for alignment. After the photoresist is developed, the exposed hard mask film under the pattern is removed, and the exposed dielectric is etched to form recessed features of the desired size. The remaining hardmask functions to protect the dielectric portions that need to be preserved during the etching process. Thus, the hard mask material should have a desirable etch selectivity over the dielectric. Generally, reactive ion etching (RIE) using a halogen-based plasma chemical is employed for dielectric etching.

The etched recessed feature is then filled with a conductive material (e.g., copper) that forms the conductive path of the integrated circuit. Typically, after the recess feature is filled, the hard mask material is completely removed from the partially fabricated semiconductor substrate.

At present, titanium nitride deposited by physical vapor deposition (PVD) is commonly used as a hard mask material in this application. The use of silicon carbide as a hardmask material has also been reported in US Pat. No. 6,455,409 and US Pat. No. 6,506,692.

A hard mask film having improved properties and a method of manufacturing the hard mask are provided. In lithographic applications, materials with high compressive stress or tensile stresses result in buckling or exfoliation of the hard mask film on the substrate, resulting in poor pattern alignment in lithography, . In addition to low stress, the hard mask material must have a hardness and / or a high Young's modulus in order to adequately protect the underlying material, since hardness and elasticity generally correlate to high etch selectivity.

It is generally difficult to obtain a combination of the low stress and the high hardness (or the high elastic modulus) because the higher the hardness of the material, the higher the compressive stress. For example, conventionally used titanium nitride is a relatively hard material, but has a compressive stress of greater than about 1,000 MPa. The use of such a hard mask of high compressive stress is particularly advantageous when it has a ductile, ultra-low k dielectric (k = 2.8 or less), and in particular a high aspect ratio feature (e.g. a feature with an aspect ratio of 2: 1 or more) Resulting in poor alignment and undesirable wiggling of the formed structure. In general, silicon carbide can have a wide range of physical properties and will not have low stress and hardness properties at the same time unless made using the special deposition process of the present invention.

In some aspects of the present invention, a hardmask material having low stress and hardness is provided. In some embodiments, the membrane has a hardness of at least about 12 GPa, preferably at least about 16 GPa, such as at least about 20 GPa, a stress of from about -600 MPa to about 600 MPa, such as from about 300 MPa to about 300 MPa, and most preferably, from about 0 MPa to about 300 MPa Respectively. The film does not contain a metal and typically comprises a material selected from hardness low stress doped or undoped silicon carbide, SixByCz, SixByNz, SixByCzNw, BxNy and BxCy. These materials can be formed by plasma enhanced chemical vapor deposition (PECVD) and other CVD-based processes. The provided hard mask can be used in various lithography methods in front-end processing and back-end processing of a semiconductor process. Deposition conditions that provide low stress hardness properties are described. Structural film properties associated with these attributes are also provided.

In one aspect, a method of forming a hard hardness low stress hardmask film on a semiconductor substrate includes the steps of: receiving a semiconductor substrate in a PECVD process chamber; depositing a doped or undoped multi-layer using a plurality of densified plasma treatments; And depositing a silicon carbide film. The treatment is preferably carried out after each sub-layer of silicon carbide is deposited. In some embodiments, the process comprises introducing a process gas comprising a silicon-containing precursor (e.g., tetramethylsilane) into a process chamber, and forming a plasma to deposit a first sub-layer of the silicon carbide hardmask film . The silicon-containing precursor is then removed from the process chamber by purging the chamber with a purging gas. Thereafter, a plasma-treated gas is introduced into the chamber, a plasma is formed, and the silicon carbide sub-layer is plasma-treated to densify the material. The plasma-treated gas may be the same as the purge gas, or these gases may be different from each other. Suitable gases for purge and / or plasma treatment include inert gases (e.g., He, Ar), CO ₂ , N ₂ , NH ₃ and H ₂ . In some embodiments, He, Ar, H ₂ , or various mixtures thereof are preferred for both purging and plasma treatment. After the first sub-layer of silicon carbide has been plasma-treated, the deposition, purging and plasma processing operations can be repeated to form and densify additional sub-layers of silicon carbide. Typically, each sub-layer has a thickness of less than about 100 angstroms, for example less than about 50 angstroms, for the preferred densification. In some embodiments, the method includes, in some embodiments, depositing and densifying 10 or more sub-layers, e.g., 20 or more sub-layers, to form a hard mask film having a thickness of about 1,000 angstroms to about 6,000 angstroms ≪ / RTI >

A plurality of plasma treatments improve the hardness of the film compared to a single-layer silicon carbide film. In some embodiments, the formed low hardness low stress film comprises an undoped silicon carbide film having a high content of Si-C bonds. In some embodiments, the Si-C peak area ratio to Si-H in the IR spectrum is greater than about 20. In some embodiments, the area ratio of Si-C peak to C-H in the IR spectrum is greater than or equal to about 50. In addition, the silicon carbide film provided by the present invention typically has a density of at least about 2 g / cm3. In some embodiments, it is desirable to perform a plasma post-treatment using high frequency radio frequency (HF RF) and low frequency radio frequency (LF RF) plasma generation wherein the LF / HF power ratio is at least about 1.5, to be.

In another aspect of the invention, the high hardness method of forming a film that stress, Si _x B _y C _z, Si _x B _y N _z, Si _x B _y C _z N _w, B _x N _y and B _x C _y . < / RTI > These films can be deposited by PECVD using amorphous silicon, carbon, and boron-containing precursors. For example, in one embodiment, for the deposition of Si _x B _y C _z , a boron-containing precursor (eg, B ₂ H ₆ ) and a precursor comprising carbon and silicon (eg, tetramethylsilane) Process chamber, so that a Si _x B _y C _z film can be formed in the plasma. For fabrication of hard and low stress films, a dual frequency plasma with an LF / HF power ratio of about 1.5 or more, such as about 2 or more, is preferred. In some embodiments, the film is a boron-rich film and BC / [BC + SiC] is at least about 0.35, as judged by the area of the corresponding peak in the IR spectrum. In some embodiments, a high hardness boron-rich Si _x B _y C _z film is prepared by flowing B ₂ H ₆ at a flow rate of at least about two times the flow rate of tetramethylsilane. Preferably, after the patterning is completed by chemical mechanical polishing (CMP), the boron-containing film can be easily removed because the boron-containing film is hydrophilic and is liable to be dissolved by the CMP chemical reaction.

In another aspect of the present invention, a method of forming a GeNx hard mask film is provided. The method includes, in some embodiments, receiving a semiconductor substrate in a PECVD process chamber and forming a GeNx hard mask film. The film may be formed by flowing a germanium-containing precursor and a nitrogen-containing precursor into a PECVD process chamber and forming a plasma. In some embodiments, the GeNx film formed has a modulus of elasticity greater than about 100 GPa and is a germanium-rich film. In some embodiments, the germanium-rich film comprises about 60 atomic% (excluding hydrogen), preferably 70 atomic% germanium. The density of the film may exceed 4 g / cm3. Preferably, GeN _x is substantially transmitted by the alignment wavelength (e.g., the visible and near infrared portions of the spectrum) used in lithography patterning. In some embodiments, a GeN _x film is deposited by forming a plasma in a process gas comprising germane, ammonia, and nitrogen, wherein the germane / ammonia flow rate ratio is greater than or equal to about 0.05. In some embodiments, a dual frequency plasma source is preferably used to deposit the GeN _x film. In some embodiments, the LF / HF power ratio used during deposition is greater than or equal to about one. Like the other films mentioned above, the GeN _x film can also be used in various processing methods in the pre-process and post-process of the semiconductor process.

In some embodiments, a hard mask film (e.g., any of the aforementioned films) is deposited on a dielectric (e.g., a dielectric with a dielectric constant of less than about 3, e.g., less than about 2.8). It is common that a photoresist layer is deposited over the hardmask (but the photoresist layer need not be in direct contact with the hardmask, and the antireflective layer may be deposited therebetween). Lithographic patterning is then performed, wherein concave features (vias and / or trenches) are formed in the dielectric layer. After the patterning is completed and the feature is filled with metal, the hard mask is removed (e.g., by CMP). In some embodiments, the etch selectivity ratio of the hard mask film to the dielectric is greater than about 8: 1, and the etch refers to the chemical reaction used to etch vias and / or trenches and is typically an RIE process.

In another embodiment, a hard mask film (e. G. Any film of the aforementioned films) is deposited on the polysilicon layer in the previous process and performs the function of protecting the polysilicon during various process steps. In some embodiments, the hard mask material is not removed and will remain in the fabricated device.

1A-1K are cross-sectional views of a device structure created during a post-processing lithographic process of a semiconductor device fabrication process using the hard mask provided in the present invention.
2A-2E are cross-sectional views of a device structure created during a pre-process lithography process of a semiconductor device fabrication process using the hard mask provided in the present invention.
Figure 3 is a process flow diagram of a post-processing lithography process suitable for use with the hard mask provided in the present invention.
4 is a process flow diagram of a full-scale lithography process suitable for use with the hard mask provided in the present invention.
5A is a process flow diagram of a method for depositing a silicon carbide hard mask in accordance with one embodiment presented in the present invention.
Figure 5B provides an IR spectrum of a multi-layer silicon carbide film obtained using a plurality of densified plasma post-treatments, as compared to a single-layer silicon carbide film. A more dominant Si-C peak is shown.
Figure 5C is an experimental plot of the stress and hardness characteristics of a multi-layer silicon carbide film compared to a single-layer film.
5D is an experimental plot of the stress and Young's modulus characteristics of a multi-layer silicon carbide film compared to a single-layer film.
6A is a process flow diagram of an exemplary process method using a boron-containing hard mask, according to one embodiment provided in the present invention.
6B is an experimental plot of the stress and hardness characteristics of a boron-containing film suitable for hard mask applications.
Figure 6C is an experimental plot of the stress and Young's modulus characteristics of a boron-containing film suitable for hardmask applications.
6D is an experimental plot showing the dependency of the hardness of the Si _x B _y C _z film versus the B ₂ H ₆ / tetramethylsilane flow rate ratio used during PECVD.
6E is an experimental plot showing the dependency of the Young's modulus and stress parameters of Si _x B _y C _z versus the BC / [BC + SiC] IR peak area ratio.
Figure 6F is an experimental plot showing the dependence of the Young's modulus and stress parameter of the Si _x B _y N _z film versus the BN / [BN + SiN] IR peak area ratio.
FIG. 6G is an experimental plot showing the performance of a Si _x B _y C _z film compared to an undoped silicon carbide film in a contact angle hydrophobicity test. A relatively high hydrophilic property of the Si _x B _y C _z film is shown.
Figure 7 is a process flow diagram of an exemplary process method using a GeN _x hard mask, in accordance with one embodiment presented herein.
8 is a schematic illustration of a PECVD apparatus that may utilize a low frequency (LF) and high frequency (HF) radio frequency plasma source that may be used to deposit a hard mask film, in accordance with some embodiments of the present invention.
Figure 9 is a schematic illustration of a multi-station PECVD apparatus suitable for forming a hard mask film, in accordance with some embodiments of the present invention.

Introduction and overview

A hard mask film in a back-end and front-end application of a semiconductor process is provided. The film comprises a material selected from SiC _x (doped or undoped), Si _x B _y C _z , Si _x B _y C _z N _w , B _x N _y , B _x C _y and GeN _x .

The material consists essentially of the elements mentioned in the corresponding formulas and, optionally, includes hydrogen which is not explicitly mentioned. The subscripts x, y, z, and w indicate that the material is not necessarily stoichiometric. The material includes a dopant only if the presence of the dopant is explicitly mentioned. For example, the undoped SiC _x (silicon carbide) described herein is a material consisting essentially of silicon and carbon (not necessarily according to a stoichiometric ratio), optionally including hydrogen. The doped SiC further includes a dopant element (e.g., boron, oxygen, phosphorus, or nitrogen).

In some embodiments, the materials provided herein have at least one of the desirable attributes of high hardness, high Young's modulus and low stress. In a preferred embodiment, the material has a combination of high hardness and high hardness at the same time, whereby the material is transferred to an advanced technology node (e.g., 45 nm and below (e.g., 22 nm) ), And is particularly suitable for patterning mechanically weak ultra-low k dielectric (ULK) dielectrics and has an aspect ratio of at least 2: 1 (e.g., at least 4: 1) ) Is formed.

In some embodiments, the hardmask material has a hardness of at least about 12 GPa (e.g., at least about 16 GPa, or at least about 18 GPa, or at least about 20 GPa). Hardness is a well-defined property in the field of materials engineering and can be reliably measured, for example, using any suitable device (e.g., a nano-indentation device). In some embodiments, in addition to hardness, the hard mask material has a low stress of about -600 to 600 MPa, preferably 0 to 600 MPa, particularly preferably 0 to 300 MPa.

Compressive and tensile stresses are measured on a single scale with positive values corresponding to tensile stresses and negative values corresponding to compressive stresses. According to this scale, the higher the compressive stress, the lower the negative value, and the higher the tensile stress, the higher the positive value. According to this scale, the film having no residual stress corresponds to zero. Stress is a well-defined parameter that can be measured, for example, using the "Flexus" tool from KLA-Tencor Corporation.

Materials with high compressive stress tend to cause buckling of the substrate, and materials with high tensile stress tend to cause delamination (especially when adhesion between materials is poor). Both types of stresses are undesirable in hardmask materials. However, for example, low and appropriate tensile stresses (e.g., 200 to 600 MPa) present in some of the boron-containing materials described herein may be more acceptable than compressive stresses of the same magnitude.

In some embodiments, the hard mask film described herein has a Young's modulus of at least about 100 MPa, such as at least about 125 MPa, such as at least 150 MPa. The Young's modulus can be measured by standard techniques using nanoindentation devices.

The hard mask material described herein is very different from the material used as the dielectric diffusion barrier layer and the etch stop layer. The dielectric diffusion barrier and the etch-stop material are typically soft materials having a hardness of less than about 10 GPa and a dielectric constant of less than about 5. The diffusion barrier layer is preserved in the final integrated circuit structure, in which case a low dielectric constant is essential. Alternatively, the hard mask material provided herein does not need to have a low dielectric constant, and generally has a dielectric constant of greater than about 4, such as greater than about 5, or greater than about 6. This is because in many embodiments the hard mask is a sacrificial layer that is completely removed from the structure after the patterning process and thus does not contribute to the electrical properties of the formed integrated circuit. In this embodiment, where the hard mask is not removed from the final structure, the hard mask is present where a low dielectric constant is not required, or where the device can tolerate a material having a relatively high dielectric constant. In addition, the hard mask material deposited by PECVD is typically deposited using significantly higher power in plasma generation than a softer low-k diffusion barrier material. Structurally, the hard mask material is packed more tightly and is more dense than the more ductile low-k diffusion barrier material.

In many embodiments, the hard mask material provided herein is substantially transmitted by the laser wavelength (e.g., the wavelength of the visible portion of the spectrum and the wavelength of the near infrared portion, e.g., 633 nm) used for pattern alignment.

The thickness of the hard mask film to be deposited depends on many parameters (e.g., the specific hard mask material vs. etch selectivity of the material that needs to be etched under the hard mask, etch chemistry used). In general, a hard mask material having a higher hardness and a higher etch selectivity ratio, when deposited, can form a thinner film than a material having a lower hardness and a lower etch selectivity. In addition, a rigid material with a high selectivity ratio is desirable because it allows for more desirable optical alignment due to the relatively higher permeability of the thinner film. In some embodiments, the film is deposited to a thickness of from about 100 to about 10,000 A, for example, from about 500 to about 6000A.

The films of the present invention have a high etch selectivity compared to a dielectric (e.g., a dielectric with a dielectric constant of 3.0 or less, e.g., 2.8 or less, or 2.4 or less) in a chemical reaction used for via and / or trench etch . Exemplary etch chemistries include RIE using plasma formed in a process gas comprising C _x F _y (eg, CF ₄ ), an inert gas (eg, Ar), and an oxidant (eg, O ₂ ). Other dry etching, such as plasma etching using a process gas comprising Cl ₂ and N ₂ , may be used. In some embodiments, for example, in a plasma etch chemistry involving the aforementioned C _x F _y , an etch selectivity of at least about 5: 1, such as an etch selectivity of at least about 8: 1, Etched more than 8 times slower). In some embodiments, for example, in selective wet etching of a silicon oxide-based material using wet fluoride etch chemistry, the inventive film may function as a hard mask during a wet etch operation.

The dielectric that can be etched in the presence of the exposed hard mask material provided herein includes silicon dioxide, carbon-doped silicon oxide (SiCOH), tetraethyl orthosilicate-deposited oxide, various silicate glasses, HSQ hydrogen silsesquioxane, MSQ (methylsilsesquioxane), as well as porous and / or organic dielectrics, including polyimide, polynorbornene, benzocyclobutene, and the like. The hard masks provided herein are most preferably used for patterning mechanically fragile organic and / or porous dielectrics having a dielectric constant of 2.8 or less, such as 2.4 or less.

The hardmask materials described herein may be deposited using a variety of methods, such as CVD-based methods and PVD-based methods. PECVD is a particularly preferred deposition method, and PECVD which allows dual frequency plasma generation is preferred. Devices with high frequency and low frequency power include the SEQUEL ^® and VECTOR ^® tools from Novellus Systems, San Jose, CA. Low frequency radio frequency (RF) power refers to RF power having a frequency between 100 kHz and 2 MHz. A typical frequency range for the LF plasma source is about 100 kHz to 500 kHz, for example, a frequency of 400 kHz may be used. During deposition of the hard mask layer, the LF power density is typically about 0.001 to 1.3 W / cm 2, and in certain embodiments, about 0.1 to 0.7 W / cm 2. Generally, the HF power is from about 0.001 to 1.3 W / cm < 2 >, and in certain embodiments, from about 0.02 to 0.28 W / cm < 2 >. High frequency power refers to RF power having a frequency in excess of 2 MHz. Typical HF RF frequencies fall within the range of about 2 MHz to 30 MHz. Typical HF RF values used include 13.56 MHz and 27 MHz fmf. In certain embodiments, the deposition of the hard mask comprises setting a power ratio of LF / HF of about 1 or more, for example, about 1.5 or more, e.g., about 2 or more.

During PECVD deposition, the reactive gas or vapor is provided to the process chamber at a flow rate of typically from about 0.001 sccm to about 10000 sccm, preferably from about 1 sccm to about 1000 sccm, and is maintained at a temperature of from about 20 캜 to about 500 캜, A substrate support temperature of about 200 [deg.] C to about 450 [deg.] C is used. In some embodiments, for hard mask deposition, a temperature of less than about 400 占 폚 (e.g., from about 200 占 폚 to about 400 占 폚) is preferred. The pressure can be from about 10 mTorr to about 100 Torr, and preferably from about 0.5 Torr to 5 Torr. The flow rate of the precursor may vary depending on the substrate size and the chamber size.

Post process back - end processing )

The films of the present invention can be used in various hardmask applications. Exemplary uses of the hard mask film in subsequent processes are illustrated by the structure shown in Figures 1A-1K and are illustrated by the process flow chart shown in Figure 3. [ Referring to the process flow diagram shown in FIG. 3, in step 301, the process begins by providing a substrate having an exposed dielectric layer. A substrate is typically a semiconductor (e.g., silicon) wafer having a layer of one or more materials (e.g., conductors or dielectrics) deposited thereon. The exposed portion of the substrate includes a dielectric layer that needs to be patterned with vias and trenches. The hard masks provided herein are generally used when patterning various dielectric materials listed at the front. It is particularly advantageous to use the hard mask material of the present invention to pattern ULK dielectrics having a dielectric constant of 2.8 or less, e.g., 2.4 or less, e.g., mechanically less intense porous and organic dielectrics. As described above, the hard mask of the present invention, in many embodiments, has a very low stress, and thus is less susceptible to warping phenomena that typically occur when a high stress hardmask material is used for patterning mechanically fragile ULK dielectrics it is possible to significantly reduce buckling and poor pattern alignment. In some embodiments, a buffer layer of mechanically stronger material is used between the soft ULK dielectric and the hardmask. Thus, in some embodiments, the substrate herein has an exposed buffer layer (e.g., a mechanically stronger dielectric) located on a layer of a ULK material. For example, a buffer layer comprising a dielectric with a k of greater than 2.8 is located in a mechanically less strong dielectric yarn with a lower dielectric constant. For example, a buffer layer comprising a material selected from carbon-doped silicon oxide (SiCOH), tetraethyl orthosilicate (TEOS) -deposited oxide, various silicate glasses, HSQ (hydrogen silsesquioxane), MSQ (methylsilsesquioxane) Or organic dielectric, which may include polyimide, polynorbornene, benzocyclobutene, and the like. The ULK dielectric and buffer layer dielectrics can be deposited, for example, by a spin-on process or by PECVD. In some embodiments, the dielectric and / or buffer layer is deposited on the same PECVD module as the hard mask layer deposited thereon. This provides additional advantages over titanium nitride hardmasks that require PVD modules for deposition. At step 303, in a PECVD process chamber, a hard mask material is deposited over the dielectric layer (or also over the buffer layer, which is typically a dielectric). Thereafter, one or more antireflective layers, such as a bottom anti-reflective coating (BARC), are selectively deposited, and then photoresist is deposited over the hardmask in step 305. The photoresist is not necessarily in direct contact with the hardmask material since it is common for one or more antireflective layers to be located between the hardmask and the photoresist. Then, in step 307, vias and / or trenches are etched in the dielectric layer using a deposited hard mask, lithographic patterning. If the dielectric material is etched with an exposed hard mask having a high etch selectivity for etching, a suitable etch is, for example, the RIE described above.

A variety of lithographic methods may be used, including deposition and removal of a plurality of photoresist layers, deposition of a filler layer, and the like, to form the desired pattern of recessed features. These lithography methods are well known and will not be described in detail here. As shown in Figures 1A-1K, a method of first forming a trench and then forming a partial via is used. However, the post-process can utilize a variety of other methods. After the vias and / or trenches are formed, the vias and / or trenches are filled with a metal (e.g., copper or copper alloy that is electrodeposited) in step 309 and, in step 311, By wet (or dry) etching, the hard mask film is removed. In some embodiments, for hard mask removal, wet etching or CMP compositions containing peroxides (e.g., acidic slurries containing hydrogen peroxide) are preferred.

Figures 1A-1K illustrate schematic cross-sectional views of a partially fabricated semiconductor substrate during a post-process, in accordance with one exemplary process. 1A shows a portion of a semiconductor substrate (underlying silicon layer and active elements not shown) having a copper layer 101 implanted in a first dielectric layer 103 (e.g., a ULK dielectric), wherein , Ta, Ti, W, TaN _x , TiN _x , WN _x, or combinations thereof) is located at the interface between the dielectric and the copper. A dielectric diffusion barrier layer 107 (also known as an etch-stop layer) is laid over copper 101 and dielectric 103, for example, a silicon nitride or nitrogen-doped silicon carbide layer. A second dielectric layer 109 (e.g., a ULK dielectric deposited by spin-on or PECVD) is placed on top of the dielectric diffusion barrier layer 107. The dielectric layer 109 may be mechanically weak and may be damaged during hard mask deposition and the mechanically stronger dielectric buffer layer 111 (e.g., TEOS dielectric or carbon-doped silicon oxide (SiCOH) Lt; / RTI > By PECVD, a hardmask layer 113 comprising a hardness material according to the present invention is deposited over the buffer layer < RTI ID = 0.0 > 111. < / RTI & Unlike dielectric diffusion barrier layer 107, hardmask layer 113 is deposited on a surface that does not contain exposed metal. A photoresist layer 115 is deposited over the hardmask layer 113 by a spin-on method. Generally, one or more antireflective layers are deposited directly between the hard mask and the photoresist. For clarity, these layers are not shown.

After the photoresist 115 has been deposited, the photoresist 115 may be patterned using standard lithographic techniques to form openings having a width t. The opening will be used to form a future trench. A final structure having a patterned photoresist layer 115 is shown in Figure IB. The hard mask layer 113 underlying the removed photoresist is then opened (etched) to form a pattern of exposed dielectric 111 as shown in FIG. 1C. The remaining hard mask will serve to protect the dielectric during photoresist removal and subsequent dielectric etch processes. Thereafter, by using ashing, the photoresist layer 115 is removed from the structure and a structure is formed having the patterned hard mask 113 exposed. In this step, patterning for forming a via is started. To pattern the vias, a filler layer 117, which may include an easily removable dielectric, such as HSQ or MSQ, is deposited over the surface of the structure to fill the openings of the hardmask as shown in FIG. 1E. A second photoresist layer 119 may then be deposited over filler layer 117 (including an optional antireflective layer therebetween) to form the structure shown in FIG. 1F. The photoresist 119 may then be patterned to form openings having a width V, which will be used when forming the vias, as shown in FIG. 1G. Then, the hard mask located under the photoresist pattern is removed, and the via in the dielectric 109 is partially etched using RIE. The photoresist 119 and the filler layer 117 are removed to form a structure with the partially etched vias and the formed trenches, as shown in Figure 1H. The etch of the dielectric layers 111 and 109 then continues until the vias reach the etch stop layer 107 and then is etched at the bottom of the via, (107) is completely etched so as to expose the metal layer (101). The diffusion barrier material 105 may then be conformally deposited by PVD to liner the substrate within the recessed features and substrate portions of the field region. The recessed features are then filled with metal 121 (e.g., electrodeposited copper or copper alloy). The metal overburden, diffusion barrier material 105, hardmask layer 113 and dielectric buffer layer 11 are then removed from the field regions of the structure to form a low- lt; RTI ID = 0.0 > 109 < / RTI > In other processes, the buffer layer 111 will remain on the substrate without being removed.

The processing scheme including the partial via formation shown in Figures 1A-1K illustrates one possible patterning scheme for the low-k dielectric. The hardmask material provided herein may be used in a variety of other process manners and may be used, for example, in a via-first, trench-first manner.

In front-end processing,  use

Another exemplary application of the hard mask provided herein is to protect the polysilicon during the entire process. During the formation of active devices (e.g., transistors) on semiconductor wafers, polysilicon is widely used. In some embodiments, the hard mask material of the present invention is deposited onto polysilicon and used to protect the polysilicon during various process operations used in active device fabrication. In particular, in the previous steps of many embodiments, the hardmask layer of the present invention is not a sacrificial layer and is left in the final device in contact with the polysilicon.

An exemplary pre-processing scheme is shown in the process flow diagram of FIG. 4 and is additionally shown in schematic cross-sectional view of the partially fabricated structure shown in FIGS. 2A-2E. Turning to FIG. 4, a process begins at step 401 where a substrate having an exposed layer of polysilicon located over a layer of oxide (e.g., silicon oxide, hafnium oxide, etc.) is provided . In yet another embodiment, the polysilicon may be located over several different active layers. Oxide is generally located on a layer of monocrystalline silicon. To pattern the oxide and polysilicon layer, two hardmask layers are deposited over the polysilicon layer. As shown in step 403, a first hard mask is deposited directly over the layer of polysilicon and includes the materials described herein, examples of which include (doped or undoped) SiC _x , Si _x B _y C _z , Si _x B _y N _z , Si _x B _y C _z N _w , B _x N _y , B _x C _y, and GeN _x . The hard mask is deposited by a CVD technique, preferably by a PECVD technique. Then, at step 405, an ashable hardmask (e.g., a hard mask consisting essentially of carbon (optionally containing hydrogen)) is deposited over the first hard mask. The ashcable hard mask may also be deposited by a CVD technique, such as PECVD deposition using a hydrocarbon precursor. Then, at step 407, a photoresist layer is deposited over the ashable hard mask, and the photoresist is patterned as desired. Optionally, one or more anti-reflection layers may be deposited between the ashable hard mask and the photoresist, which is not shown for clarity. An exemplary structure with unpatterned photoresist is shown in Figure 2A. Where layer 201 is a layer of monocrystalline silicon. The layer 203 overlying the silicon layer 201 is an oxide layer. The layer 205 on top of the oxide layer 203 is a layer of polysilicon. The hard mask material provided herein is directly on top of the polysilicon 205 and an ashable hard mask (e.g., carbon hard mask) 209 is located over the first hardmask layer 207. A photoresist layer 211 is placed over the asbestos hard mask 209 (the optional anti-reflection layer located between them is not shown in the drawing). The structure obtained after photoresist patterning is shown in Figure 2B, where the photoresist is removed at two locations and only the portion between these locations is shown.

Referring again to FIG. 4, the process continues at step 409 by etching the desired pattern in the polysilicon and oxide layers, using an ashcable hard mask for patterning. This is illustrated by the structure of Figures 2C-2E. In the structure of FIG. 2C, after photoresist patterning, the ashable hard mask 209 is opened (etched) at the exposed portions. The photoresist 211 is then completely removed and the first hardmask layer 207, the polysilicon layer 205 and the oxide layer 203 are etched away by the hard mask layer 209 To provide the structure shown in Figure 2D.

Referring again to Figure 4, in step 411, SiC _x , Si _x B _y C _z , Si _x B _y N _z , Si _x B _y C _z N _w , B _x N _y , B _x C _y, and GeN _x , the above-mentioned hard mask is removed, for example, by oxygen plasma treatment, while leaving the first hard mask layer on the polysilicon layer. The final structure is shown in Figure 2E. The hardmask layer 207 may be maintained during the following process and may perform the function for protecting the polysilicon during various subsequent operations, such as implanting a dopant into the crystalline silicon. In the process steps described above, the hard mask material is used to protect the polysilicon, not the actual masking (performed by the ashable hard mask 209), but mainly. Depending on the integration scheme, the hard mask 207 may be used for masking during the entire process followed by, for example, during dry (or wet) etch cleaning, or during etching of the oxide performed to form the gate Can be used. Depending on the integration scheme used, the hard mask material may ultimately be removed from the final device or left in the device.

It should be understood that the post-process and pre-process applications described above are provided as exemplary procedures and that the materials provided herein may be used in a variety of other processes where a hard material is required for the protection of the underlying layer .

The preparation of a suitable hard mask material will now be described in detail.

Multilayer silicon carbide film

In one embodiment, a multilayer silicon carbide film of high and low stress is provided. In particular, in some embodiments, the membrane has a hardness of greater than about 12 GPa, such as greater than about 18 GPa, and a stress of from about -600 MPa to about 600 MPa, such as from about -300 MPa to about 300 MPa. The film is formed by depositing a sub-layer of doped or undoped silicon carbide material, followed by deposition of each sub-layer, followed by a densified plasma post-treatment.

While silicon carbide can be deposited by a variety of methods, in some embodiments, in one PECVD apparatus, it may be desirable to perform sub-layer deposition and plasma post-treatment. The thickness of each sub-layer is typically less than about 100 Å, eg, less than about 50 Å, to enable more complete densification of the material. Deposition may include the formation of any number of sub-layers and plasma treatment to obtain a suitable hard mask thickness. In some embodiments, two or more sub-layers, e.g., ten or more sub-layers, or about twenty or more sub-layers are deposited.

An exemplary process flow diagram for the formation of a multi-layer silicon carbide film is shown in Figure 5A. At step 501, a semiconductor substrate (e.g., a substrate having an exposed dielectric layer, or an exposed polysilicon layer) is provided in a PECVD process chamber. The PECVD process chamber includes an inlet for introduction of the precursor and a plasma generator. In some embodiments, a dual frequency RF plasma generator with HF and LF generator components is preferred.

In step 503, a first sub-layer of doped or undoped silicon carbide is formed, wherein the deposition process includes flowing the silicon-containing precursor into the process chamber and forming a plasma. In one example, a dual frequency plasma (HF RF frequency is about 13.56 MHz and LF RF frequency is 400 kHz) is used. In this example, the HF power density is about 0.04 to 0.2 W / cm 2 and the LF power density is about 0.17 to 0.6 W / cm 2.

Various silicon-containing precursors may be used, for example, organic silicon precursors such as alkylsilanes, alkenylsilanes, and alkynylsilanes may be used. In some embodiments, saturated precursors (e.g., tetramethylsilane, tri-isopropylsilane and 1,1,3,3-tetramethyl 1,3-disilacyclobutane) are preferred.

In some embodiments, as in the aforementioned example, the silicon-containing precursor comprises carbon. In another embodiment, in a process gas, a carbon-containing precursor (e.g., a hydrocarbon) separate from a zero carbon silicon-containing precursor (e.g., silane) may be used. Additionally, in some embodiments, the process gas may comprise a hydrocarbon and an organosilicon precursor.

The silicon-containing precursor is typically introduced into the process chamber using a carrier gas (e.g., an inert gas such as He, Ne, Ar, Kr, or Xe). In some embodiments, H ₂ may be included in the deposition process gas. In one example, the deposition process gas consists essentially of tetramethylsilane (flowing at a flow rate of about 500 to 2,000 sccm) and helium (flowing at a flow rate of about 3 to 5 slm).

When a layer of doped silicon carbide needs to be formed, a suitable dopant is added to the process gas. For example, N ₂ , NH ₃ , N ₂ H ₄ , an amine, or a different nitrogen containing precursor may be added to the process gas to form nitrogen-doped silicon carbide. Boron-containing precursors (e.g., diborane) may be added to form boron-containing silicon carbide. Phosphorus-containing precursors (e.g., PH ₃ ) may be added to form phosphorus-doped silicon carbide.

After the plasma is ignited and the silicon carbide sub-layer is formed to the desired thickness, at step 505, the silicon-containing precursor is removed from the process chamber. In some embodiments, this is accomplished by purging the process chamber with a purging gas. The purging gas may contain a gas selected from an inert gas (e.g., He, Ar), CO ₂ , N ₂ , NH ₃ , H _2, and mixtures thereof. In some embodiments, He, Ar, H ₂ , or various mixtures thereof are preferred as the purge gas. At step 507, after the silicon-containing precursor is completely removed, a plasma-processing process gas (which may be the same or different from the purge gas) is introduced into the process chamber and preferably the LF / HF power ratio is about The first sub-layer is treated with the plasma under conditions of at least 1.5, such as at least about 2. In step 509, the deposition and post-plasma treatment are repeated so that a multi-layer film including, for example, ten or more sub-layers including two or more sub-layers may be formed. The plasma post-treatment of each sub-layer is performed for the time required for film densification, and the time depends on the sub-layer thickness. In some embodiments, for each sub-layer, a plasma post-treatment is performed for about 5 to 25 seconds, such as for about 8 to 15 seconds.

The final film was found to have a structure and properties distinct from the structure and properties of conventional silicon carbide films. Unexpectedly, it has been found that a multi-layer film fabricated using a plurality of densified plasma post-treatments can have both high hardness and low hardness, which can not be obtained by conventional deposition methods.

The structural properties of these films show that the infrared (IR) spectra of these films have unique high Si-C / Si-H and Si-C / CH peak ratios and the ratio is about 760 to 800 cm ^-1 Refers to the ratio of the corresponding IR peak area having a center value at 2070 to 2130 cm ^-1 (Si-H) and 2950 to 3000 cm ^-1 (CH).

In some embodiments, the ratio of the area of the Si-C peak to the area of the C-H peak in the IP spectrum is greater than or equal to about 50 and the Si-C / Si-H ratio is greater than or equal to about 20. The membranes provided herein also typically have a density of about 2 g / cm3.

FIG. 5B shows the IR spectrum (curve a) of the single-layer undoped silicon carbide film obtained without the plasma post-treatment and the IR spectrum (curve a) of the multi-layer undoped silicon carbide film obtained after multiple densified plasma treatments Curve b). The single-layer film was deposited on a 300 mm wafer by flowing a process gas containing tetramethylsilane (at a flow rate of 1,000 sccm) and helium (at a flow rate of 3000 sccm) at a pressure of 2.1 Torr. A dual frequency plasma at an LF power density of about 0.25 W / cm < 2 > and an HF power density of 0.13 W / cm < 2 > The multi-layer film was deposited under the same conditions for sub-layer deposition. However, after each sub-layer deposition, a plasma post-treatment was further included. The post-treatment process includes flowing argon as a post-treatment gas at a flow rate of 3 slm at a chamber pressure of 2.1 Torr, and a process flow rate of about 0.25 W / cm2 LF power density and about 0.13 W / And forming a dual frequency plasma at the density. The final single layer film was characterized by an SiC / SiH area ratio of about 15. The final multi-layer film formed using the densified plasma treatment was characterized by a SiC / SiH peak area ratio of about 24. The multi-layer film had a Young's modulus of about 170 GPa and a hardness of about 20.4 GPa, while the single-layer film had a Young's modulus of about 95 GPa and a hardness of only about 12 GPa. The single-layer and multi-layer films had stress values of -20 MPa and 179 MPa, respectively.

Figure 5C shows the stress and hardness of two multi-layer undoped silicon carbide films fabricated using densified plasma post-treatment and two single-layer undoped silicon carbide films fabricated without post-treatment Lt; / RTI > Figure 5D shows the stress and Young's modulus values for the same films as the film of Figure 5C. Table 1 summarizes the deposition and post-treatment conditions for the films.

membrane deposition After treatment Stress (MPa) Hardness (GPa) Elastic modulus (GPa) A LF = 0.35 W / cm < 2 >
HF = 0.13 W / cm < 2 > none -830 22.4 180 Membrane B LF = 0.53 W / cm < 2 >
HF = 0.13 W / cm < 2 > LF = 0.53 W / cm < 2 >
HF = 0.13 W / cm < 2 > -412 20.86 166 Membrane C LF = 0.23 W / cm 2
HF = 0.13 W / cm < 2 > LF = 0.23 W / cm 2
HF = 0.13 W / cm < 2 > 179 20.4 170 Membrane D LF = 0.35 W / cm < 2 >
HF = 0.13 W / cm < 2 > none -20 12 96

All membranes were made using a mixture of tetramethylsilane and helium as the deposition process gas at a pressure of about 2 Torr. In all cases, dual frequency plasma generation was used for deposition. The power densities for the HF and LF plasmas are listed in the above table, where the power density is calculated by dividing the power by the substrate area. Films A and D were single-layer films fabricated without plasma post-treatment. These films may appear to have neither high hardness nor high hardness. For example, film A of relatively high hardness (22.4 GPa) has a very high compressive stress of -830 MPa. The film D with a small stress (-20 MPa) has an ordinary hardness of only 12 GPa.

Membranes B and C are multi-layer films, and plasma post-treatment was performed after deposition of each silicon carbide sub-layer. At a pressure of about 2 Torr, argon was used as the plasma processing gas. A dual frequency plasma generation method was used for post-plasma treatment. The power densities for HF and LF plasmas are listed in the table. Unexpectedly, it has been found that the multi-layer film has both high hardness (and / or modulus) and low stress. For example, film B has a hardness of 20.86 GPa and a stress of -412 MPa (which is more than 2 times lower than the stress of film A). In addition, the multi-layer film C has a high hardness of 20.4 GPa and a tensile stress of 179 MPa. The hardness of the film C is larger than the hardness of the film D by 1.5 times. Except for the post-plasma treatment, membranes C and D are deposited under the same conditions. It can be seen that the hardness of the film becomes higher by the plasma post-treatment without increasing the compressive stress of the film to an unacceptable level.

In some embodiments, performing post-processing of the silicon carbide sub-layer using a dual frequency plasma where the LF power is higher than the HF power (e.g., the LF / HF power ratio is about 1.5 or more, or about 2 or more) Lt; / RTI > Unexpectedly, as the ratio of LF / HF power used during post-processing increases, the properties of the film obtained are improved. When the LF / HF power ratio is increased, a parameter having a positive correlation with the refractive index of the film to be obtained and the hardness of the film increases. In some embodiments, a multi-layer silicon carbide film having a refractive index of at least about 2.25, such as at least about 2.30, is provided. An increase in the refractive index of the film accompanied by an increase in the LF / HF power ratio is shown in Table 2.

Membrane ID Post-process HF power per station (W) Post-processing LF power per station (W) Refractive index One 114 211 2.3021 2 325 0 2.2308 3 114 111 2.2527

Boron-containing Hard mask  membrane

In another embodiment, a boron-containing hard mask film is provided. The boron-containing film comprises a material selected from Si _x B _y C _z , Si _x B _y N _z , Si _x B _y C _z N _w , B _x N _y and B _x C _y . In some embodiments, these materials have a low hardness (e.g., a hardness of about 12 GPa, preferably about 16 GPa) and a low stress (e.g., a stress of about -600 to 600 MPa, preferably a stress of about -300 to 300 MPa ). In some embodiments, a boron-containing film having no compressive stress is provided, such as a film having a very low tensile stress (e.g., from about 0 to 300 MPa). In addition, it is common that the boron-containing film is more hydrophilic than the undoped silicon carbide film and can be more easily removed by CMP (using an acidic slurry containing, for example, hydrogen peroxide). Generally, boron-containing hardmasks can be produced by a variety of methods (e.g., CVD-based techniques and PVD-based techniques). In some embodiments, PECVD is preferred for fabrication of a boron-containing hard mask.

Referring to Figure 6, an exemplary process flow diagram for utilizing a boron-containing hardmask in a post-process is shown. The process begins in step 601 by providing a PECVD process chamber with a semiconductor substrate comprising an exposed dielectric layer. For example, the dielectric layer may be an ultra-low K dielectric layer (e.g., a dielectric layer having a k of less than about 2.4, such as less than about 2.4) or a buffer dielectric layer having a higher dielectric constant.

In step 601, a hardness low-stress boron-containing hardmask film selected from Si _x B _y C _z , Si _x B _y N _z , Si _x B _y C _z N _w , B _x N _y and B _x C _y , Lt; / RTI > The deposition is carried out by flowing a process gas containing the appropriate precursor into the process chamber and forming a plasma. In some embodiments, a dual frequency plasma is preferred. In some embodiments, particularly desirable film parameters are obtained when the power density for the LF plasma is higher than the power density for the HF plasma, e.g., when the LF / HF power ratio is greater than or equal to about 1.5 (e.g., greater than about 2) .

After the film is deposited, the dielectric may be patterned at step 605 to form trenches and / or vias as described, for example, in connection with FIGS. 1A-1K. During the dry etching of the dielectric using RIE, the boron-containing film may function as a hard mask. Vias and / or trenches are then formed in the dielectric, and then in step 607, the vias and / or trenches are filled with a metal. Then, in step 609, the boron-containing hardmask is typically removed by CMP after removal of the metal overburden.

PECVD deposition of Si _x B _y C _z may be achieved by using a process gas containing a silicon-containing precursor, a boron-containing precursor and a carbon-containing precursor. One or more of these precursors may be the same molecule. For example, tetraalkylsilanes can function as both carbon-containing precursors and silicon-containing precursors. Diborane is used as a boron-containing precursor, and alkylsilanes (e.g., tetramethylsilane), alkenylsilanes, and alkynylsilanes can be used as silicon and carbon-containing precursors. Additionally, saturated and unsaturated hydrocarbons (C _x H _y ) can be used as the carbon-containing precursor, and SiH ₄ can be used as the silicon-containing precursor.

Deposition of Si _x B _y C _z N _w may be achieved by forming a plasma in a process gas comprising a silicon-containing precursor, a boron-containing precursor, a carbon-containing precursor (as described above) and a nitrogen- have. The nitrogen-containing precursor may comprise ammonia, hydrazine, N _2, and mixtures thereof. Additionally, the nitrogen-containing precursor is the same as the carbon-containing precursor and may include amines (e.g., monoalkylamines, dialkylamines, and trialkylamines). The nitrogen-containing precursor may be the same as the boron-containing precursor and may include trimethylborazine. The nitrogen-containing precursor may be the same as the silicon-containing precursor, for example, in a silazane.

The silicon-containing precursor (e.g., SiH _4), boron-containing precursor (e.g., diborane), and nitrogen - to form a plasma in the process gas comprising a containing precursor (e.g., ammonia, hydrazine, N _2, and various mixtures thereof) Deposition of Si _x B _y N _w can be achieved.

B _x N _y can be deposited using a process gas comprising a boron-containing precursor (eg, diborane) and a nitrogen-containing precursor (eg, ammonia, hydrazine, N _2, and mixtures thereof).

B _x C _y can be deposited using a process gas comprising a boron-containing precursor (eg, diborane) and a carbon-containing precursor (eg, saturated or unsaturated hydrocarbon). An inert carrier gas (e.g., helium or argon) is typically part of the process gas used during the deposition of these boron-containing films. In some embodiments, H ₂ is also included in the process gas.

Figure 6B shows the hardness and stress parameters for Si _x B _y C _z , Si _x B _y N _z , and Si _x B _y C _z N _w films deposited by various PECVD. Figure 6C shows the Young's modulus and stress parameters for the films of Figure 6B above. The deposition conditions and properties of the obtained films are listed in Table 3.

membrane Process gas B ₂ H ₆ / 4MS
Flow ratio Stress (MPa) Hardness (GPa) Elastic modulus (GPa) 1. Si _x B _y C _z N _w B ₂ H ₆ , 4MS, NH ₃ , N ₂ -555 14.5 125 2. Si _x B _y N _z B ₂ H ₆ , SiH ₄ , NH ₃ , N ₂ -256 13.12 126 3. Si _x B _y N _z B ₂ H ₆ , SiH ₄ , NH ₃ , N ₂ -65 13.72 138 4. Si _x B _y C _z B ₂ H ₆ , 4MS, He, H ₂ 3.5 416 17.3 163 5. Si _x B _y C _z B ₂ H ₆ , 4MS, He 3.5 -284 23.54 227 6. Si _x B _y C _z B ₂ H ₆ , 4MS, He 3.5 246 17.9 174 7. Si _x B _y C _z B ₂ H ₆ , 4MS, He 0.5 211 12.29 103 8. Si _x B _y C _z B ₂ H ₆ , 4MS, He 1.5 430 15.15 138

All membranes were fabricated using a dual frequency plasma with an HF RF power density of about 0.08 to about 0.30 W / cm 2 and an LF RF power density of about 0.10 to about 0.24 W / cm 2 at a pressure of about 2 to about 4 torr, Lt; / RTI >

In some embodiments, the Si _x B _y C _z film is deposited using a process gas consisting essentially of B ₂ H ₆ , tetramethylsilane (4MS) and He. The flow rate of B2H6 can be about 2,000 to 4,000 sccm, preferably about 3,500 to 4,000 sccm, and the flow rate of tetramethylsilane can be about 1,000 to 1,5000 sccm. It is preferred that a carrier gas (e.g., He) at a flow rate of about 3 to 8 slm is used. In some embodiments, a dual frequency plasma with an HF RF power density of about 0.04 to 0.26 W / cm 2 and an LF RF power density of about 0.14 to 0.53 W / cm 2 is used.

It was unexpectedly found that the hardness of the obtained film varies greatly according to the ratio of B ₂ H ₆ to tetramethylsilane (4MS). In order to obtain a high hardness boron-rich film, it is preferred that a flow rate ratio of at least about 2, for example at least about 3 B ₂ H ₆ / 4MS is used.

6D shows the hardness of the Si _x B _y C _z film as a function of the flow rate ratio of B ₂ H ₆ / 4MS. It can be seen that by increasing the flow rate from about 0.5 to about 3.5, the hardness can be doubled. Corresponding hardness and stress values for different flow rates are shown in Table 3.

Structurally, membranes with high hardness and high Young's modulus are characterized by high BC bond content. In some embodiments, a hardness film having a BC / [BC + SiC] IR peak area ratio of about 0.35 or greater is preferred. Means the peak area of the IR ratio having a ¹ (Si-C) as a median ^{value, said} ratio is from about 1120 to about 1160㎝ corresponding ^{- 1} (BC) and 760 to 800㎝.

Figure 6E shows the dependence of the Young's modulus and stress parameter of various Si _x B _y C _z films as a function of the BC / [BC + SiC] area ratio. A film having a BC / [BC + SiC] less than about 0.3 is significantly more ductile than a film having a BC bond content higher than that. Table 4 summarizes the data obtained for the three Si _x B _y C _z films. All membranes were loaded with B ₂ H ₆ (flow rate 500 to 3500 sccm), 4MS (at 1,000 sccm flow) and He (at 3,000 sccm flow) Using a fabricated process gas and at a pressure of 2.1 Torr, using a dual frequency plasma with an HF RF power density of about 0.12 W / cm 2 and an LF RF power density of about 0.22 W / cm 2. The hardness, stress and Young's modulus parameters are shown in Table 4 as a function of BC content.

membrane BC / [BC + SiC] Stress (MPa) Hardness (GPa) Elastic modulus (GPa) 1. Si _x B _y C _z 0.386 439 17.3 163 2. Si _x B _y C _z 0.22 211 12.29 103 3. Si _x B _y C _z 0.364 418 15.15 138

In some embodiments, Si _x B _y C _z is deposited using a dual frequency plasma in which the LF power is higher than the HF power (e.g., the LF / HF power ratio is greater than or equal to about 1.5, such as greater than about 2, . It has been found that as the ratio of LF / HF power used during deposition increases, the properties of the obtained film are improved. When the LF / HF power ratio is increased, the refractive index of the final film is increased, and the refractive index of the film has a positive correlation with the hardness of the film. In some embodiments, a Si _x B _y C _z film having a refractive index of at least about 2.3, such as at least about 2.5, such as at least about 2.6, is provided. As shown in Table 5, when the refractive index of the film increases, the LF / HF power ratio increases.

Membrane ID LF / HF power ratio Refractive index I. Si _x B _y C _z 1.86 2.518 II.Si _x B _y C _z 4.33 2.5714 Ⅲ.Si _x B _y C _z 3.05 2.6131 IV. Si _x B _y C _z 0.81 2.3382

In the Si _x B _y N _z film, the critical structural property of the film is the content of BN bonds, which is quantified using the BN / [BN + SiN] ratio, which is the area ratio of the peaks in the IR spectrum, ^-1 (BN) and a corresponding IP peak area ratio with a median value of 820 to 850 cm ^-1 (Si-N).

Figure 6F shows that both stress and Young's modulus are highly dependent on this parameter. In particular, as the BN bond content increases, the compressive stress increases rapidly. In some embodiments, a Si _x B _y N _z film having a BN / [BN + SiN] of less than about 07, such as less than about 0.6, is preferred. By appropriately modifying the flow rates of the silicon-containing precursor and the boron-containing precursor, the BN bond content can be adjusted as needed. Table 1 shows the film properties for the films having different BN / [BN + SiN] ratios.

membrane Process gas BN / [BN + SiN] Stress (MPa) Hardness (GPa) Elastic modulus (GPa) 1.SixByNz B ₂ H ₆ (4125 sccm),
SiH ₄ (300 sccm),
NH ₃ (825 sccm),
N ₂ (16,500 sccm) 0.77 -431 12.89 120 2.SixByNz B ₂ H ₆ (4125 sccm),
SiH ₄ (75 sccm),
NH ₃ (825 sccm),
N ₂ (16,500 sccm) 0.66 -256 13.12 126 3.SixByNz B ₂ H ₆ (4125 sccm),
SiH ₄ (150 sccm),
NH ₃ (825 sccm),
N ₂ (16,500 sccm) 0.59 -65 13.72 138

As mentioned previously, the boron-containing film is suitable for hardmask applications. One of the special advantages of the boron-containing film is that it is easily removed by CMP because it is hydrophilic. Figure 6G shows the hydrophilicity of various Si _x B _y C _z films compared to undoped silicon carbide using a contact angle test in which water droplets are located on the film. The contact angle of the water droplet to the membrane is measured, and the lower the contact angle, the more hydrophilic the membrane. The Si _x B _y C _z films (4-6) listed in Table 3 were tested and a contact angle of 38 to 42 degrees was obtained. Alternatively, the undoped silicon carbide film is much more hydrophobic when viewed at a much larger angle of 66 degrees.

germanium Knit ride Hard mask  membrane

In another aspect of the present invention, a GeN _x hard mask film is provided. In some embodiments, these membranes are characterized by a high Young's modulus of at least about 100 GPa, such as at least about 130 GPa, and a high density (e.g., a density of greater than about 4 g / cm3). The GeN _x film can be used as a hard mask in a variety of post-processes and pre-process schemes and is sufficiently transparent by the wavelengths used for pattern alignment using lasers and can be easily removed from the substrate after being used by CMP or wet etching techniques .

In some embodiments, a germanium-rich GeN _x hardmask film is preferably used. Such a germanium-rich film has a germanium concentration of at least about 60 atomic%, for example, at least about 70 atomic%, for example, at least about 75 atomic%, excluding hydrogen. Due to the high germanium content, the germanium nitride film becomes more responsive to CMP and wet etch removal after the film is used in patterning. In some embodiments, such removal is accomplished by contacting the hard mask with a composition comprising hydrogen peroxide during a CMP or wet etching operation. For example, an acidic CMP slurry containing hydrogen peroxide may be used.

In one example, a GeNx hard mask film having a germanium concentration of about 79 atomic%, a Young's modulus of about 144 GPa, and a density of about 4.4 g / cm3 was prepared.

Germanium nitride hardmasks can be fabricated using a variety of CVD and PCD techniques, and will illustrate PECVD among the various techniques. Referring to the post-process flow diagram shown in FIG. 7, the process begins at step 701 by providing a PECVD process chamber with a semiconductor substrate comprising an exposed dielectric layer. At step 703, a GeN _x hardmask film having a germanium content of about 60 atomic percent is deposited. A process gas comprising a germanium containing precursor (e.g., germane) and a nitrogen-containing precursor (e.g., NH3, N2, N2H4 and a variety of mixtures thereof) is introduced into the process chamber and a plasma is formed to form germanium nitride Deposition is carried out by depositing a layer. The deposition process gas may optionally include an inert gas (e.g., helium or argon). The ratio of the flow rate of the nitrogen-containing precursor to the flow rate of the germanium-containing precursor is selected to form, for example, a germanium-rich germanium nitride film. In one example, if the precursor is germane and ammonia, the germane flow ratio to ammonia is at least about 0.05.

In one exemplary embodiment, a process gas consisting of germane (at a flow rate of about 50 to 100 sccm), NH ₃ (at a flow rate of about 600 to 1200 sccm) and N _{2 (} at a flow rate of about 12 slm) By forming a dual frequency plasma and depositing a germanium nitride film on the substrate at a temperature of about 350 to 450 DEG C where the temperature refers to the temperature of the support, a GeN _x hardmask is deposited on a 300 mm wafer . In this example, the pressure during deposition is about 2.5 to 4 Torr. In this exemplary deposition process, an HF RF component at a frequency of about 13.56 MHz (of a power density of about 0.18 W / cm 2) and an LF RF component at a frequency of about 400 kHz (of a power density of about 0.23 W / cm 2) Is used. In some embodiments, it is desirable to use the LF component at a higher power density than the power density of the HF component.

Referring again to the process flow diagram of FIG. 7, after the germanium nitride film has been deposited, at step 707, the dielectric may be patterned to form trenches and / or vias, for example, as shown in FIGS. 1A-1K. have. A germanium nitride hard mask may be used during dry etch patterning (e.g., during reactive ion etching (RIE) of the dielectric). For example, by contacting the substrate with the dielectric layer having the exposed hard mask, CxFy (e.g., CF _4), inert gas (e.g., Ar) and an oxidizing agent (e.g., O ₂₎ a process gas containing the plasma using , Vias and / or trenches may be etched in the dielectric where exposed GeN _x is present. Other dry etching, such as plasma etching using a process gas comprising Cl ₂ and N ₂ , may be used.

After the dielectric is patterned, the vias and / or trenches are filled with metal in step 707. For example, copper may be deposited into recessed features by electroplating. Then, in step 709, the hard mask is removed by CMP. For example, this can be done while removing copper overburden and diffusion barrier material by CMP. In some embodiments, a CMP slurry having an acidic pH comprising peroxides (e.g., hydrogen peroxide) is used to remove the GeN _x hardmask. In other embodiments, the GeN _x hardmask film may be removed by wet etching (e.g., using a solution comprising H ₂ SO ₄ and H ₂ O ₂ , which may be present in a 3: 1 ratio).

The process flow chart of Fig. 7 shows the post-process method. The GeN _x film can also be used as a hard mask in the previous process. In addition, a germanium nitride film can function as a hard mask during wet etching (e.g., during patterning of a silicon oxide-based material using a fluoride-containing wet etch chemistry).

Device

It is common that the hard mask material described herein can be deposited in many different types of devices (e.g., CVD and PVD devices). In a preferred embodiment, the device is a PECVD device that includes HF RF and LF RF power. An example of a suitable device is the SEQUEL ^® and VECTOR ^® tools commercially available from Novellus Systems, Inc. (San Jose, CA).

Generally, an apparatus will include one or more chambers, or " reactors " (sometimes including a plurality of stations), that house one or more wafers and are suitable for wafer processing. The etch chamber may house one or more wafers for processing. The at least one chamber holds the wafer at one or more designated locations. The wafer does not move (e.g., rotate, vibrate or otherwise stir) within the position, or do not exercise. In some embodiments, the wafer being hard mask layer deposited in the reactor during the process is moved from one station to another. During the process, each wafer is held in place by a pedestal, wafer chuck, and / or other wafer holding device. For operations in which wafer heating is to occur, the apparatus may comprise a heater (e.g., a heating plate).

Figure 8 shows a simple block diagram showing various reactor components of a suitable PECVD reactor arranged to implement the present invention. As shown, the reactor 800 includes a process chamber 824 in which other components of the reactor are embedded, and the process chamber 824 is connected to a grounded heater block 824, And a showerhead 814 that operates in conjunction with the showerhead 820. The showerhead 814 also includes a showerhead 814, A high frequency RF generator 804 and a low frequency RF generator 802 are connected to a matching network 806 and the matching network is connected to a showerhead 814.

Within the reactor, the wafer support table 818 supports the substrate 816. The support generally includes a chuck, or a fork, or a lift pin for holding or moving the substrate during or during the deposition reactions. The chuck can be an electrostatic chuck, a mechanical chuck, or any other various types of chuck available in industry and / or research.

Process gas is introduced through inlet 812. A plurality of source gas lines 810 are connected to the manifold 808. The gas may or may not be premixed. Titration valve means and mass flow control means are used to ensure that the correct gas is delivered during the deposition of the process and the plasma treatment process. When the chemical precursor is delivered in liquid form, a liquid flow control means is used. Thereafter, prior to reaching the deposition chamber, during transport of the gas in the manifold heated to above the vaporization point of the gas, the liquid is vaporized and mixed with other process gases.

The process gas exits chamber 824 through outlet 822. A vacuum pump 826 (e.g., a one- or two-stage mechanical dry pump and / or turbomolecular) is connected to a flow restriction device (e.g., a throttle valve or a pendulum valve) To discharge the process gas and maintain a suitable low pressure in the reactor.

In one of the embodiments, a multi-station device may be used to deposit a hardmask layer. By the multi-station reactor, different processes in the same chamber environment, or the same plurality of processes can be performed at the same time, thereby increasing the efficiency of wafer processing. An example of such a device is the device shown in Fig. A schematic top view is shown. The apparatus chamber 901 includes four stations 903 to 909. In general, any number of stations within one chamber of a multi-station device is possible. Station 903 is used for loading and unloading substrate wafers. The stations 903 to 909 may have the same or different functions and, in some embodiments, may operate under separate process conditions (e.g., different temperature conditions).

In some embodiments, the entire hard mask layer is deposited in one station of the apparatus. In another embodiment, a first portion of the hard mask layer is deposited in a first station, then a wafer is transferred to a second station, and at the second station, a second portion of the hard mask layer is deposited . This continues until the wafer returns to the first station and exits the device.

In one embodiment, in one of the stations of the apparatus, the deposition of the hub-layer of silicon carbide and the post-plasma treatment are carried out. In another embodiment, the deposition of the sub-layers is performed in one or more dedicated stations, and the plasma post-processing is performed in different stations on the substrate.

In one embodiment, stations 903, 905, 907 and 909 all function for deposition of a hard mask layer. An index plate 911 is used to lift the substrate from the support to the correct position at which the substrate will be located at the next process station. After the wafer substrate is loaded into the station 903, it is successively indexed to stations 905, 907 and 909, where portions of the hard mask layer are deposited at each station. The processed wafer is loaded at the station 903, and the module is filled with a new wafer. During normal operation, individual substrates occupy each station, and each time the process is repeated, the substrate is moved to the new station. Thus, an apparatus with four stations 903, 905, 907 and 909 enables simultaneous processing of four wafers.

The process conditions can be controlled by a controller unit 913 including program instructions for monitoring, maintaining and / or adjusting certain process variables (e.g., HF and LF power, precursor flow rate, temperature, pressure, etc.) , The process flow itself can also be controlled. The controller includes program instructions for performing any of the hard mask deposition processes described herein. For example, in some embodiments, the controller includes program instructions for depositing a silicon carbide sub-layer, program instructions for purging a chamber using a purging gas, program instructions for plasma processing a sub-layer using a plasma- And program instructions for repeating deposition and plasma-processing processes as desired (e.g., ten or more sub-layers are deposited and processed). In some embodiments, the controller includes program instructions for depositing a boron-containing hardmask, the program instructions for depositing the boron-containing hardmask include instructions for flowing a process gas of a suitable composition as described above, and , And an appropriate power level (e.g., an LF / HF power ratio of about 1.5 or more). In some other embodiments, the controller is GeN _x comprises program instructions for depositing a hard mask, program instructions for depositing said GeN _x hardmask is germanium-process gas comprising containing precursor-containing precursor and a nitrogen At a flow rate to form a film containing about 60 atomic percent or more of germanium. The controller may include different or the same instructions for different device stations, whereby the device stations may operate independently or simultaneously.

It should be noted that the examples and embodiments herein are for illustrative purposes only, and in that respect, various modifications and variations will be apparent to those skilled in the art. While various details have been omitted for clarity, various design permutations may be implemented. Accordingly, the examples of the invention are to be regarded as illustrative and not restrictive. In certain embodiments, the hard mask film may not necessarily be used for masking in lithography, but may simply function as a hard protective layer for underlying material.

Claims (25)

A method for forming a hard mask film on a semiconductor substrate,
The method comprising:
Receiving a semiconductor substrate in a plasma-enhanced chemical vapor deposition (PECVD) process chamber; And
By PECVD, a hard mask film having a hardness of more than 12 GPa and a stress of -600 MPa to 600 MPa,
The PECVD hardmask deposition process includes depositing a doped or undoped multi-layer silicon carbide film using a plurality of densifying plasma treatments, wherein the PECVD hardmask deposition process comprises:
(a) introducing a process gas comprising a silicon-containing precursor and an inert gas into a process chamber and forming a plasma to deposit a first sub-layer of a silicon carbide hard mask film;
(b) removing the silicon-containing precursor from the process chamber;
(c) introducing a plasma processing gas into the process chamber and processing the substrate using plasma to densify the deposited sub-layer; And
(d) repeating steps (a) to (c) to form and densify additional sub-layers of silicon carbide
The thickness of each of the sub-layers is less than 100 Angstroms, and the method comprises depositing at least ten sub-layers in the hard mask film. The method of claim 1, wherein the film has a stress of from -300 MPa to 300 MPa. The method of claim 1, wherein the film has a stress of between 0 MPa and 600 MPa. 2. The method of claim 1, wherein the film has a hardness of at least 16 GPa. The method of claim 1, wherein the film has a modulus of at least 100 GPa. The method of claim 1, wherein the silicon carbide is not doped and the silicon-containing precursor is a saturated precursor. The method of claim 1, wherein the silicon-containing precursor comprises tetramethylsilane (Me ₄ Si). The method of claim 1, wherein the process gas used during deposition further comprises a carrier gas selected from He, Ne, Ar, Kr, and Xe. The method of claim 1, wherein the plasma processing gas is selected from He, Ar, CO ₂ , N ₂ , NH ₃ and H ₂ . 2. The method of claim 1, wherein in the formed silicon carbide film, the ratio of the SiC peak area to the SiH peak area in the IR spectrum is 20 or more, and the ratio of the SiC peak area to the CH peak area in the IR spectrum is 50 or more , A method for forming a hard mask film. The method of claim 1, wherein the formed silicon carbide film has a density of 2 g / cm 3. 2. The method of claim 1, wherein the formed hardmask layer is deposited on a dielectric layer having a dielectric constant of less than 2.8, and wherein the etch selectivity ratio of the formed hardmask film to dielectric in the dry plasma etch is greater than or equal to 8: Lt; / RTI > The method according to claim 1,
Wherein the formed hardmask layer is deposited over the polysilicon layer. The method of claim 1, wherein the hardmask is formed at a temperature less than 400 占 폚. An apparatus for depositing a hard mask film,
The apparatus comprises:
(a) a process chamber configured for the formation of a plasma;
(b) a wafer substrate support configured to hold the wafer substrate in position during hard mask deposition;
(c) a controller including program instructions for depositing a doped or undoped multi-layer silicon carbide film using a plurality of densified plasma processes, wherein the process of depositing the multi-layer silicon carbide film comprises ,
(i) introducing a process gas comprising a silicon-containing precursor and an inert gas into a process chamber and forming a plasma to deposit a first sub-layer of a silicon carbide hard mask film;
(ii) removing the silicon-containing precursor from the process chamber;
(iii) introducing the plasma processing gas into the process chamber and processing the substrate using plasma to densify the deposited sub-layer; And
(iv) repeating steps (i) to (iii) to form and densify additional sub-layers of silicon carbide
Wherein the step of depositing the multi-layer silicon carbide film comprises depositing at least 10 sub-layers in the multi-layer silicon carbide film, wherein the deposition of the multi-layer silicon carbide film comprises depositing a hard mask film Device. A method for forming a hard mask film on a semiconductor substrate,
The method comprising:
Receiving a semiconductor substrate in a plasma-enhanced chemical vapor deposition (PECVD) process chamber; And
By PECVD, a hard mask film having a hardness of more than 12 GPa and a stress of -600 MPa to 600 MPa,
The PECVD hardmask deposition process includes depositing a doped or undoped multi-layer silicon carbide film using a plurality of densifying plasma treatments, wherein the PECVD hardmask deposition process comprises:
(a) introducing a process gas comprising a silicon-containing precursor and an inert gas into a process chamber and forming a plasma to deposit a first sub-layer of a silicon carbide hard mask film;
(b) removing the silicon-containing precursor from the process chamber;
(c) introducing a plasma processing gas into the process chamber and processing the substrate using plasma to densify the deposited sub-layer; And
(d) repeating steps (a) through (c) to form and densify additional sub-layers of silicon carbide,
Wherein depositing the silicon carbide sub-layer comprises flowing a process gas comprising Me ₄ Si and an inert gas, the power level for the high-frequency plasma is 0.04 to 0.2 W / cm 2, the power level for the low- Lt; / RTI > to about 0.17 to about 0.6 W / cm < 2 >;
Wherein the step of removing the silicon-containing precursor comprises purging the process chamber with a gas comprising at least one of Ar, He and H ₂ ;
Densifying the sub-layers comprises flowing a process gas comprised of one or more of Ar, He, H _2, and mixtures thereof, and forming a dual frequency plasma with an LF / HF power ratio of at least 1.5 Of the hardmask film. 7. A film formed by the method of claim 1, wherein said film comprises doped or undoped silicon carbide, said film having a hardness of 12 GPa or greater and a stress of -600 MPa to 600 MPa, said film comprising 10 or more sub- Wherein each sub-layer has a thickness less than 100 ANGSTROM. 16. A film formed by the method of claim 16, wherein said film comprises doped or undoped silicon carbide, said film having a hardness of 12 GPa or greater and a stress of -600 MPa to 600 MPa, said film comprising 10 or more sub- Wherein each sub-layer has a thickness less than 100 ANGSTROM. delete delete delete delete delete delete delete

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