KR101696926B1 - Frame synchronizing apparatus for passive optical network and method thereof - Google Patents

Abstract

The present invention relates to a frame synchronizing apparatus for a passive optical network, capable of improving network performance by reducing a frame synchronization time of the passive optical network which becomes fast, and a method thereof. The present invention can quickly detect synchronization data capable of synchronizing frame data even though an error is generated in a partial bit by detecting the synchronization data in a state to allow an n-bit error when detecting synchronization data of downlink frame data received through the passive optical network. Network performance can be improve by quickly and reliably detecting synchronization data without error correction information or an additional error detection by verifying the quickly detected synchronization data by repeatedly checking network identifier information or a sequence number included in a plurality of following downlink frame data. The frame synchronizing apparatus for a passive optical network according to the present invention includes a buffer part which stores the downlink frame data which is received, a window part which detects the synchronization data included in a frame by allowing the n-bit error, a verifying part which verifies the validity of the synchronization data detected through the window part, and a synchronization determining part which determines a frame data start point from the data stored in the buffer part.

Description

[0001] The present invention relates to a frame synchronizing apparatus for passive optical networks,

The present invention relates to a frame synchronization apparatus and method for a passive optical network, and more particularly, to a frame synchronization apparatus and method for a passive optical network that improves network performance by reducing frame synchronization time of a passive optical network .

Passive Optical Network (PON) technology is configured to process simultaneous access of multiple subscribers through time division multiplexing or wavelength division multiplexing. Of these methods, cost-efficient time division multiplexing is mainly used. EPON (Ethernet PON) according to IEEE (Institute of Electrical and Electronics Engineers) 802.3av / ah and G-PON (Gigabit PON) according to International Telecommunication Union-Telecommunication Standardization Sector (ITUT) G.984 / 7 are representative. Meanwhile, XG-PON or XGS-PON, which further improves the performance of G-PON, is also being used.

In the configuration of such a PON, a single optical line terminal (OLT) installed in the telephone company and an ONT (Optical Network Terminal) or an ONU (Optical Network Unit) of a plurality of subscribers are connected to a remote node, (Point-to-Multipoint) network structure through an optical splitter (using an optical splitter).

When the OLT continuously transmits the downlink frame data, the plurality of ONTs selectively receive the frame data of the downlink frame data.

Such downlink frame data can be largely divided into a header and a payload. The header and payload data includes error detection or error correction information for verifying normal reception and restoring the error upon occurrence of an error, .

This error detection or error correction is performed when the frame data is substantially received, and such actual frame data reception can be performed after the ONT receiver synchronizes with the downlink frame data.

That is, the initial information of the header included in the downlink frame data includes synchronization data composed of special information indicating that the start of the frame data is synchronized. It is necessary to confirm the start of the frame by completely receiving the synchronization data, And payload data and confirms and corrects the error through the included error detection or correction information.

However, in the downlink frame data structure, error check or correction information for actual header data and payload data is included, but error detection or correction information is not considered for information for synchronization. In other words, data received after synchronization can be verified and corrected for errors during reception, but since there is no separate error detection or correction means for synchronization itself, if a reception error occurs, all the frames are discarded. For this reason, the initial downlink frame synchronization delay can not be avoided.

In particular, in a PON structure for performing high-speed data transmission exceeding 1 Gbps to 10 Gbps, synchronization delay due to such synchronization data error may cause degradation of network performance.

Korean Patent No. 10-1044412 entitled " GEM Frame Synchronization Circuit, System Including the Circuit and Method Thereof "

In one embodiment of the present invention, n-bit error is detected while allowing detection of initial synchronization data of downlink frame data received through a passive optical network to increase detection probability, There is provided a frame synchronization apparatus and method for a passive optical network in which synchronization information and identification information of a passive optical network are checked with respect to a plurality of consecutive frame data to verify the validity of the detected synchronization data, There is a purpose.

According to another embodiment of the present invention, a plurality of windows allowing an n-bit error are applied to detect synchronization data included in received downlink frame data, and a sequence number of a subsequent header based on the synchronization signal detected in each window Passive optical network in which identification information of the optical network or passive optical network is checked with respect to a plurality of consecutive frame data and the synchronization pattern whose detection pattern meets the standard is selected as valid synchronization data, And to provide a frame synchronization apparatus and method for the frame synchronization.

According to another embodiment of the present invention, an initial synchronization data field formed in a header of downlink frame data is modified to include a synchronization code and error recovery information for the synchronization code. In addition, The present invention provides a frame synchronizing apparatus and method for a passive optical network in which reliable sequence data can be detected quickly by confirming sequential header information or identifier information of a passive optical network succeeding a plurality of frame data It has its purpose.

A frame synchronization apparatus for a passive optical network according to an exemplary embodiment of the present invention includes a buffer unit for storing received downlink frame data; A window unit for detecting synchronization data included in a frame by inspecting the received downlink frame data with a window corresponding to a preset synchronization code, and allowing an error of n bits; A verification unit for determining whether at least one of sequence number information and network identifier information arranged subsequent to synchronization data detected through a window unit is associated with one or more succeeding downlink frame data and satisfies a predetermined pattern rule; And a synchronization determination unit for determining that the synchronization data detected by the window unit is valid when the pattern rule of the verification result of the verification unit is satisfied, and determining the start point of the frame data in the data stored in the buffer.

Wherein the window unit is configured by a plurality of window units and detects predicted synchronization data at different positions in the frame data, and the verifying unit is operable to detect at least one of the sequence number information and the network identifier information, It is possible to confirm the downlink frame data.

In order to determine the satisfaction of the predetermined pattern rule, the verification unit may check whether the sequence number information continuously increases by one with respect to the succeeding downlink frame data, or may check whether the network identifier is the same in the succeeding downlink frame data.

The verifying unit may identify the sequence number information or the network identifier information arranged subsequent to the synchronization data detected in the window unit and may select the correspondence information of the following downlink frame data based on the frame length information according to the downlink frame data standard.

The synchronization data may include a predetermined synchronization code and error correction information for the synchronization code.

According to another aspect of the present invention, there is provided a frame synchronization apparatus for a passive optical network, comprising: a buffer unit for storing received downlink frame data; Detecting a Psync of downlink frame data received by checking with a window set as a sync code of Psync included in a PSBd corresponding to a header of the received downlink frame data, and allowing an error of n bits; At least one of SFC (SuperFrame Counter) structure information and OC (Operation Control) structure information following the Psync detected through the window portion is compared with the corresponding information of the downstream frame data received subsequently to determine whether the predetermined pattern rule is satisfied A verification unit; And a synchronization determination unit for determining that the synchronization data detected by the window unit is valid when the pattern rule of the verification result of the verification unit is satisfied.

In another aspect of the present invention, there is provided a frame synchronization method for a passive optical network, comprising the steps of: detecting synchronization data included in a frame by checking received downlink frame data using a window corresponding to a preset synchronization code, A synchronization detection step of allowing synchronization detection; Determining validity of the detected synchronization data by determining whether at least one of synchronization data, a sequence number, and a network identifier of the downlink frame data corresponding to subsequent received downlink frame data satisfies a reference pattern rule; And if the reference pattern rule is satisfied in the synchronization data validation step, determining that the synchronization data detected in the synchronization detection step is valid and proceeding the synchronization.

The synchronization detection step is performed in parallel using a plurality of windows, and the step of verifying the validity is also performed in parallel on the basis of the synchronization data detected in the plurality of windows, and the synchronization step is performed in parallel In the validation step, valid synchronization data is confirmed and synchronization can be performed based on the valid synchronization data.

The present invention detects synchronous data while allowing n-bit errors when detecting synchronous data of downlink frame data received through a passive optical network, and synchronizes the synchronous data that can synchronize frame data even if an error occurs in some bits And the fast-detected synchronization data is verified by repeatedly verifying the sequence number information or the network identifier information included in the subsequent plurality of downlink frame data, so that the synchronization data without additional error detection or error correction information can be detected The network performance can be improved by enabling quick and reliable detection.

Further, a plurality of windows are used to detect synchronous data while allowing n-bit error, and the synchronous data detected in each window is verified using the corresponding frame data and the subsequent frame data, It is possible to determine quickly and accurately by only the inspection, and the network performance can be improved.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is an exemplary view showing a configuration of a general passive optical network. FIG.
2 is a conceptual diagram illustrating a downlink signal transmission method of a passive optical network;
3 is a frame configuration diagram showing a configuration of downlink frame data;
4 is a conceptual diagram illustrating a detection synchronization data verification method according to an embodiment of the present invention.
5 is a conceptual diagram illustrating a method of detecting synchronization data using a plurality of windows according to an embodiment of the present invention.
6 is a conceptual diagram illustrating a synchronization data modification structure according to another embodiment of the present invention.
FIG. 7 is a block diagram of an ONT receiver according to an embodiment of the present invention; FIG.
8 is a flowchart illustrating a synchronization process according to an embodiment of the present invention.

It is noted that the technical terms used in the present invention are used only to describe specific embodiments and are not intended to limit the present invention. In addition, the technical terms used in the present invention should be construed in a sense generally understood by a person having ordinary skill in the art to which the present invention belongs, unless otherwise defined in the present invention, and an overly comprehensive It should not be construed as meaning or overly reduced. In addition, when a technical term used in the present invention is an erroneous technical term that does not accurately express the concept of the present invention, it should be understood that technical terms that can be understood by a person skilled in the art can be properly understood. In addition, the general terms used in the present invention should be interpreted according to a predefined or context, and should not be construed as being excessively reduced.

Furthermore, the singular expressions used in the present invention include plural expressions unless the context clearly dictates otherwise. The term "comprising" or "comprising" or the like in the present invention should not be construed as necessarily including the various elements or steps described in the invention, Or may include additional components or steps.

In addition, terms including ordinals such as first, second, etc. used in the present invention can be used to describe elements, but the elements should not be limited by terms. Terms are used only for the purpose of distinguishing one component from another. For example, without departing from the scope of the present invention, the first component may be referred to as a second component, and similarly, the second component may also be referred to as a first component.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings, wherein like reference numerals refer to like or similar elements throughout the several views, and redundant description thereof will be omitted.

In the following description, well-known functions or constructions are not described in detail since they would obscure the invention in unnecessary detail. It is to be noted that the accompanying drawings are only for the purpose of facilitating understanding of the present invention, and should not be construed as limiting the scope of the present invention with reference to the accompanying drawings.

In addition, the present invention basically provides an OLT (Optical Line Terminal) installed in a telephone company and a plurality of ONTs (Optical Network Terminals) or ONUs (Optical Network Terminals) of a plurality of subscribers as a remote node (Passive Optical Network), which is a passive optical network having a point-to-multipoint network structure through a plurality of optical fiber splinters (for example, a splitter). In addition, the present invention can be applied to various devices constituting a PON.

In particular, in describing the present invention, a subscriber's optical communication terminal is referred to as an ONT (Optical Network Terminal), but this is used to represent a subscriber's optical communication terminal including an ONU (Optical Network Unit) And other types of optical communication modems or optical communication terminal devices.

Hereinafter, detailed embodiments of the present invention will be described with reference to the drawings.

FIG. 1 shows a configuration of a general PON. As shown in the figure, an OLT 1 having an optical transceiver for converting an electric signal into an optical signal is connected to a plurality of subscriber ONTs 2 through a remote node RN. Each ONT 2 also has an optical transceiver.

PON according to the IEEE standard and G-PON according to the ITU-T standard. In the embodiment of the present invention, an XGS-PON among G-PON, XG-PON and XGS- I explain it as a standard.

FIG. 2 is a conceptual diagram for explaining a downstream signal transmission method of a PON. As shown in FIG. 2, when the OLT 1 continuously transmits down-frame data to be transmitted to the ONT 2 as a downstream signal, And selects and receives frame data of the frame data from the frame data. Accordingly, this downstream signal can be continuously transmitted without signal collision only by continuously transmitting a signal modulated by the OLT 1 with its own clock.

In the ITU-T standard, such downlink frame data 10 has a fixed length of 125 microseconds, and in the case of the recently discussed XGS-PON, one downlink frame data has a size of 155520 bytes at 9.95328 Gbit / s.

As shown in FIG. 3, one downlink frame data 10 includes a Physical Synchronization Block (PSBd) 20 corresponding to a header and a physical frame payload The PSBd includes 8 bytes of synchronous data (Psync) 21, 8 bytes of sequence number information (SFC) 22, 8 bytes of operation control structure (OC) 23, .

The sequence number information 22 and the operation control information 23 are composed of 51 bits of substantial information and 13 bits of header error correction information. That is, the sequence number information and the operation control information corresponding to the actual header information among the information constituting the PSBd include HEC (Header Error Correction) information that can correct the error even if the corresponding data has an error, The normal data can be restored.

Of course, FEC (Forward Error Correction) information for error correction is also included in the physical frame payload, which is real data.

Therefore, data having substantial information in the downlink frame data can be corrected even if an error occurs in some bits, so that data transmission can be robust to bit errors occurring in the line.

Of the total downlink frame data, only the synchronous data for synchronization, that is, the 8-byte Psync, does not include information on error detection or correction, which is a unique synchronization code (fixed 64-bit pattern) corresponding to 8 bytes To precisely grasp the start position of the frame data. For example, in the case of XGS-PON, it has a value of '0xC5E51840 FD59BB49'.

Thus, the probability that a specific value of 64 bits exists in an area other than Psync is a probability of 1/2 ⁶⁴ , so that it rarely occurs. Therefore, in the current standard, when the 64 bits having exactly the same special fixed value are received, the start position of the downlink frame can be specified. After that, even if a certain error occurs, .

However, even though the sequence number information and the operation control information of the PSBd are 8-byte information such as Psync, information for error correction is included, which means that even if the 8-byte information is paral- lelized, an error may occur during transmission.

Therefore, there is a possibility that an error occurs in the synchronous data (Psync) according to the line state. In case of such an error, the corresponding frame data can not correct the error, and the entire frame is discarded. If the line environment is not good, There arises a problem that the network performance deteriorates due to delay.

In the embodiment of the present invention, even if an error occurs in some bits in receiving such synchronization data (Psync), the entire frame is discarded, and the synchronization data detection speed is dramatically increased by considering the synchronization data (Psync) . Of course, since the frame data area regarded as synchronous data may not be the actual synchronous data due to the tolerance of the n-bit error, it is judged whether the synchronous data detected through the verification using the pattern characteristic of the other data of the PSBd is valid So that both the detection speed and the reliability can be achieved.

FIG. 4 is a conceptual diagram for explaining a detection synchronous data verification method according to an embodiment of the present invention. FIG. 4 illustrates a method of verifying the detection of synchronous data in a state in which n-bit error is allowed using two consecutive downlink frame data will be. As a result, reliability can be improved as a plurality of downlink frame data are used, but basic validity verification can be performed using only downlink frame data including the detected synchronization data and the next downlink frame data.

Referring to FIG. 4, an embodiment of the present invention will be described. In an embodiment of the present invention, the received downlink frame data is checked using a sync code (unique pattern) window known for detecting Psync, Allow bit error. If the expected synchronous data (8 bytes Psync) detected by the synchronous data is valid, the 8-byte data subsequent thereto is the sequence number information (SFC structure), and the next 8-byte data is the operational control information OC structure. The sequence number information is a value (n → n + 1 in the illustrated embodiment) that increases by one for each frame data, and the operation control information (OC Structure) records the network identifier (PON ID) So they always have the same value.

Accordingly, when the synchronization data is detected while allowing the n-bit error using the sync code window, the sequence number information and the operation control information of the corresponding downlink frame data can be confirmed, and the same area (sequence number information, (The same data area is data after a delay of 125 占 퐏, for example, data of 155520 bytes or later if XGS-PON at 9.95328 Gbit / s speed).

As a result, if the detected expected synchronization data is valid, the sequence number information will have a pattern in which 1 increases in the succeeding frame data, and the operation control information will have a pattern in which the same value (PON-ID) is maintained. The synchronization data can be judged to be valid. In particular, since the sequence number information and the operation control information include the error correction information, even if there is an error in some bits, it can be recovered through correction, so that even if the line environment is not good, quick verification is possible.

Also, the Psync value of the subsequent downlink frame data may be checked to determine whether it is the same as the expected synchronization data detected within the n-bit error range, and the comparison result may be used as a part of the verification. Since the sequence number information and the operation control information include the error correction information but the synchronization data does not include the error correction information, it is possible to perform robust verification against the bit error environment of the line by comparing within the error range of n bits. Therefore, Psync, which does not have separate error correction information, permits n-bit error but verifies the validity of the detected expected synchronization data by utilizing all the synchronization data, sequence number information, and operation control information (network identifier) The reliability problem due to the n-bit error tolerance can be solved.

If it is checked through the verification process that the pattern rule does not match, the detected synchronization data is not valid and the synchronization process can be performed again.

In particular, this scheme allows fast and reliable downlink frame synchronization, but does not require any changes or changes to the sender. That is, the ONT receiver independently performs such synchronization, and it is possible to maintain high compatibility because it is irrelevant to whether other ONTs include such a configuration.

In the synchronization process, when data of a wrong position is detected as synchronous data due to n-bit error tolerance, a subsequent one (when verifying using two downlink frame data) or m (m + Data is used for verification), the synchronization failure period becomes longer by the corresponding length.

Therefore, in order to prevent such a delay, if the synchronization data is detected by using the ONT reception buffer and it is not valid as a result, the process of checking the synchronization data again after the expected synchronization data failed in the verification among the reception data stored in the buffer is repeated So that valid sync data can be detected.

This sequential anticipated synchronization data detection and verification process can minimize the delay through parallel execution. To this end, a plurality of synchronization code windows can be applied in the embodiment of the present invention.

FIG. 5 is a conceptual diagram illustrating a method of detecting synchronous data using a plurality of windows according to an embodiment of the present invention. As shown in FIG. 5, the PSBd 20 of one actual downlink frame data 10 It is possible to detect the synchronous data at the Psync position A of the actual PSBd 20 when using the synchronization code window allowing an n-bit error because the length is relatively short, The synchronous data may be detected at the wrong position (a).

Therefore, a plurality of identical sync code windows are configured in parallel and then sequentially operated to detect the expected sync data within the n-bit tolerance among the received data, and for the expected sync data detected in each of these windows, the sequence number information, And performs a verification procedure to confirm the operation control information (network identifier information) or the subsequent Psync information.

If Psync of the actual PSBd 20 is detected in the first window, as shown in the illustrated example, data received in the buffer may be divided into normal downlink frame data as shown in the figure. In this case, both the sequence number information, the operation control information, and the subsequent Psync information satisfy the set pattern rule (sequential increase of the sequence number, maintenance of the operation control information, and coincidence in the n-bit error range of Psync information).

If the predicted synchronization data is detected in the first window, the second window is operated to check the matching area within the n-bit tolerance with the synchronization code in the subsequent input data, , It is possible to divide the data received in the buffer into fixed frame lengths as shown in FIG. 8B, by predicting a 24-byte area from the corresponding area to the PSBd 20 '. As shown in the figure, since the predictive synchronization data is erroneous, the data classified by the frame are misidentified. Therefore, the information regarded as corresponding to the sequence number information, the operation control information, and the subsequent Psync information does not satisfy the set pattern rule. In this case, the estimated synchronous data detected by the second window is judged to be invalid, do.

By performing the verification process sequentially and in parallel with the predicted synchronization data detected as the n-bit error is permitted by using the plurality of windows, the effective synchronization data can be detected quickly and accurately and the synchronization process can be performed.

FIG. 6 is a conceptual diagram for explaining a synchronous data modification structure according to another embodiment of the present invention. As shown in FIG. 6, an area of 8-byte Psync defined in the standard is divided into 39 synchronous code areas, The error correction and the error correction can be performed on the synchronous data by configuring the correction code and the parity bit. When the size of the synchronization code included in the synchronization data is reduced, there may be a case where the synchronization code is accidentally identical to another area of the downlink frame data. In this case, too, the effectiveness of the sequence number information and the operation control information It is possible to reduce the reliability degradation due to the decrease in the synchronization code. However, when such a configuration is applied, since the standard frame structure needs to be changed, the configuration of the transmission unit of the OLT must also be changed, so that the performance of detecting synchronous data may be enhanced but the compatibility may be lowered. Therefore, this modified structure can be selectively applied as an additional configuration to the embodiment described above.

7 is a block diagram of an ONT receiver according to an embodiment of the present invention. As shown in FIG. 7, the ONU includes a buffer 110 for storing received downlink frame data, A window unit 120 for detecting synchronization data included in a frame by checking with one or more windows and allowing an error of n bits, (SFC) verification unit 130 for performing synchronization data verification through the sequence number information by verifying whether the value is incremented by 1 in comparison with the sequence number information of the subsequent downlink frame data, The operation control information (network identifier information) that is subsequently disposed in the synchronization data is compared with the operation control information of one or more succeeding downlink frame data The OC verifying unit 140 performs verification of synchronization data through the operational control information by verifying whether the same value is identical to the OC verifying unit 140 and the OC verifying unit 140 And a synchronization determination unit 150 determining that the detected synchronization data is valid and determining a start point of the frame data in the data stored in the buffer unit 110.

Herein, the window unit 120 may be a plurality of window units including a plurality of windows. When one window operates on data received in the buffer unit 110 to detect the expected synchronization data, And the SFC verification unit 130 and the OC verification unit 140 can perform the verification procedure in parallel based on the expected synchronization data detected by each window. In this case, the synchronization determination unit 150 can determine the application or discard of the expected synchronization data detected by each window using the verification result of each verification unit.

On the other hand, although not shown, synchronizing data is detected in the subsequent downlink frame data on the basis of the synchronizing data detected through the window unit 120 as the verifying unit, and it is determined whether or not the synchronizing code matches the synchronizing code within the n-bit tolerance The synchronization determination unit 150 may further include a configuration for performing synchronization data verification, and the synchronization determination unit 150 may utilize the synchronization data verification result when determining effective synchronization data.

FIG. 8 is a flowchart illustrating a synchronization process according to an embodiment of the present invention. Referring to FIG. 8, there is shown a flowchart of a synchronization process, which includes setting an allowable error tolerance value (n bits) A synchronous detection step of detecting synchronous data included in a frame by allowing a window corresponding to a predetermined synchronous code to be detected and allowing an error of n bits, It is determined whether the synchronization data included in the downlink frame data matches the synchronization code within the n-bit tolerance, whether the sequence number information included in the downlink frame data is incremented by one from the previous one, Verifying whether the information (network identifier information) matches the previous one, (Or a set part thereof) is satisfied, it is determined that the expected synchronization data is valid and the synchronization procedure is performed. If the verification is failed in the verification step, it is determined that the expected synchronization data is invalid and discarded .

Here, the window may be composed of a plurality of windows, and the verification process may be performed in parallel based on each of the expected synchronization data detected by the windows.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or essential characteristics thereof. Therefore, the embodiments disclosed in the present invention are intended to illustrate rather than limit the scope of the present invention, and the scope of the technical idea of the present invention is not limited by these embodiments. The scope of protection of the present invention should be construed according to the following claims, and all technical ideas within the scope of equivalents should be construed as falling within the scope of the present invention.

100: ONT receiver 110: Buffer unit
120: window part 130: SFC verification part
140: OC verification unit 150: synchronization determination unit

Claims (8)

A buffer unit for storing received downlink frame data;
A window unit for inspecting the received downlink frame data with a window corresponding to a predetermined sync code to allow synchronization data included in the frame to allow an error of n bits to be detected;
The sequence number information subsequent to the sync data detected through the window portion is compared with the sequence number information of the subsequent downlink frame data received to check whether the value is incremented by one, A verification unit for verifying the validity of the synchronization data detected through the window unit by comparing network identifier information with network identifier information of subsequent received downlink frame data to determine whether the same value is present;
And a synchronization determination unit for determining that the synchronization data detected by the window unit is valid and determining a start point of frame data in the data stored in the buffer when the verification result of the verification unit satisfies a predetermined pattern rule, .
The image processing apparatus according to claim 1, wherein the window unit comprises a plurality of window units,
Wherein the verifying unit verifies at least one of the sequence number information and the network identifier information for a plurality of subsequent downlink frame data based on a synchronous data position detected in each window unit.
delete [2] The apparatus of claim 1, wherein the verifying unit verifies sequence number information or network identifier information arranged subsequent to the synchronization data detected in the window unit, and outputs the corresponding information of the following downlink frame data to the base station based on the frame length information according to the downlink frame data standard Wherein the frame synchronizing apparatus comprises:
delete A buffer unit for storing received downlink frame data;
A window unit for accepting and detecting an error of n bits of Psync of downlink frame data received by checking with a window set as a sync code of Psync included in the PSBd corresponding to the header of the received downlink frame data;
(SuperFrame Counter) structure information subsequent to the Psync detected through the window portion is compared with the SFC (SuperFrame Counter) structure information of the subsequently received downlink frame data to determine whether the value is incremented by 1. The SFC A verification unit for verifying the validity of Psync detected through the window unit by comparing OC (Operation Control) structure information subsequent to PSync with OC (Operation Control) structure information of downstream received frame data to see if they are the same value;
And a synchronization determination unit for determining that Psync detected by the window unit is valid if the verification result of the verification unit satisfies a predetermined pattern rule.
A synchronization data detecting step of inspecting downlink frame data received by the frame synchronizer with a window corresponding to a predetermined sync code to allow synchronization data included in the frame to allow an error of n bits;
The frame synchronization apparatus compares the sequence number information arranged subsequent to the synchronization data detected in the synchronization data detection step with the sequence number information of the subsequently received downlink frame data to check whether the value is incremented by one, And verifying the validity of the synchronization data detected in the synchronization data detection step by verifying that the network identifier information that is arranged subsequent to the synchronization data detected in the synchronization data detection step is identical with the network identifier information of the subsequent received downlink frame data, ;
And a synchronization step of causing the frame synchronizer to perform synchronization when it is determined that the predetermined pattern rule is satisfied as a result of the synchronization data validity checking step, A frame synchronization method for optical networks.
The method of claim 7, wherein the synchronizing data detecting step is performed in parallel using a plurality of windows, and the validating step is also performed in parallel based on synchronizing data detected in a plurality of windows,
Wherein the synchronization step verifies valid synchronization data in the step of verifying the validity performed in parallel and performs synchronization based on the valid synchronization data.

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