KR101597532B1 - The Manufacturing Method of Back Contact Solar Cells - Google Patents

Abstract

The present invention relates to a method of manufacturing a back electrode type solar cell, and provides a manufacturing method in which process steps are reduced at a low manufacturing cost.

More particularly, the present invention relates to a method of manufacturing a semiconductor device including a first conductivity type semiconductor region and a second conductivity type semiconductor region on a rear surface of a first conductivity type silicon substrate having a first conductivity type semiconductor region and a second conductivity type semiconductor region, Forming a back passivation layer including at least one opening exposing a portion of the passivation layer; Forming a seed layer in contact with the first conductive semiconductor region and the second conductive semiconductor region through the opening on the rear passivation layer; Applying and drying a first electrode paste and a second electrode paste on a seed layer formed on the opening; Forming a first electrode layer and a second electrode layer simultaneously with formation of a mixed layer of a metal element and Si constituting the seed layer through heat treatment; And removing a seed layer in an area where the first electrode layer and the second electrode layer are not formed; The present invention also provides a method of manufacturing a back electrode type solar cell.

Back electrode type, annealing, sintering process, seed layer

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a back electrode type solar cell,

The present invention relates to a method of fabricating a back electrode type solar cell, in which an annealing process and a sintering process of a first electrode and a second electrode are simultaneously performed under a predetermined hydrogen (H2) gas atmosphere, And a manufacturing method of a solar cell with reduced process steps.

In recent years, interest in new and renewable energy has been rising due to rising oil prices, global environmental problems, depletion of fossil energy, waste treatment of nuclear power generation, and location of new power plants. Research and development of batteries is actively under way.

A solar cell is a device that converts light energy into electrical energy by using photovoltaic effect. The solar cell is divided into a silicon solar cell, a thin film solar cell, a dye-sensitized solar cell, and an organic polymer solar cell . These taejeonjangs are independently used as main power sources for electronic clocks, radios, unmanned lighthouses, satellites, and rockets, and are also used as auxiliary power sources in connection with commercial AC power systems. The interest in solar cells is increasing.

Conventional solar cells have problems such as shading loss of an electrode in which an area absorbed light is reduced and high electric resistance due to a narrow electrode width because an electrode is formed on a front surface where light is incident, To improve the problem, a back contact solar cell structure has been proposed.

In the back electrode type solar cell, p + and n + regions and electrodes are formed on the rear surface where sunlight is not incident. The solar cell of this type can completely eliminate the light blocking loss caused by the front electrode, It is possible to improve both the optical and electrical characteristics of the solar cell. In addition, since the contacts having both polarities are located on the same plane, it is easy to mount the back-contact solar cell into a predetermined circuit, and the cost can also be reduced.

Methods for making such back-contact silicon solar cells include Metallization Wrap Around (MWA), Metallization Wrap Through (MWT), Emitter Wrap Through (EWT), and Interdigitated Back Contact (IBC) Structure or the like.

However, these methods have a complicated etching process and the like in the electrode formation, so that the manufacturing steps are complicated and the manufacturing cost is high.

In addition, a conventional rear electrode type solar cell has a seed layer, a mixed layer of a metal element-Si is formed in advance through another heat treatment, and then a paste is printed and sintered at a high temperature It has been common to form the solar cells separately, which has a problem in that the process steps are complicated and the manufacturing cost is high and the thermal stress of the solar cell device is severe.

Accordingly, there is a demand for a method of manufacturing a back electrode type solar cell capable of forming an electrode using only a simplified process and improving the efficiency of the solar cell.

In the method of manufacturing a back electrode type solar cell, the annealing process and the sintering process of the electrode are simultaneously performed under a hydrogen (H 2) gas atmosphere, and the rear electrode is used as a mask layer during the partial removal of the seed layer, So that it is possible to provide a simpler manufacturing method and to reduce the manufacturing cost.

In addition, the present invention eliminates the need for a separate sintering process at a high temperature to simultaneously reduce annealing and sintering at a relatively low temperature, thereby reducing thermal stress, and forming a Ni seed layer so that the rear electrode functions as a protective film in a hydrogen gas atmosphere And the heat treatment is performed to prevent oxidation.

The technical objects to be achieved by the present invention are not limited to the above-mentioned technical problems, and other technical subjects which are not mentioned can be clearly understood by those skilled in the art from the description of the present invention .

According to an aspect of the present invention, there is provided a semiconductor device including a first conductive type silicon substrate having a first conductive type semiconductor region and a second conductive type semiconductor region, Forming a back passivation layer including at least one opening exposing a portion of the semiconductor region; Forming a seed layer in contact with the first conductive semiconductor region and the second conductive semiconductor region through the opening on the rear passivation layer; Applying and drying a first electrode paste and a second electrode paste on a seed layer formed on the opening; Forming a first electrode layer and a second electrode layer simultaneously with formation of a mixed layer of a metal element and Si constituting the seed layer through heat treatment; And removing a seed layer in an area where the first electrode layer and the second electrode layer are not formed; The present invention also provides a method of manufacturing a back electrode type solar cell.

In the present invention, the rear passivation layer is formed by depositing or compounding at least one selected from the group consisting of SiO ₂ , SiN x, SiC, and intrinsic amorphous silicon on the first conductive semiconductor region and the second conductive semiconductor region Forming a mask layer having an opening located above the first conductive semiconductor region and the second conductive semiconductor region on the material layer and removing the material layer through the opening of the mask layer; And exposing a portion of the first conductive semiconductor region and the second conductive semiconductor region, and removing the mask layer. The method of manufacturing a rear electrode type solar cell according to claim 1, do.

In the present invention, the removal of the material layer through the opening of the mask layer is performed by applying the etching composition by a screen printing method or a direct printing method to remove the material layer.

In the present invention, the etching composition comprises at least one selected from HF, buffered oxide etchant (BOE) and phosphoric acid (H ₃ PO ₄ ), and a mixture of at least one selected from HF and H ₃ PO ₄ The present invention also relates to a method of manufacturing a back electrode type solar cell.

The forming of the seed layer may include forming a seed layer on the rear passivation layer by a sputtering method such as a vacuum method so as to contact the first conductive semiconductor region and the second conductive semiconductor region, ) Method, a vacuum evaporation method, an E-Beam evaporation method, a non-vacuum method, a spray coating method, an ink-jet coating method, or an electroless plating method. And forming a seed layer on the back electrode type solar cell.

In the present invention, the metal layer constituting the seed layer may be aluminum (Al) or nickel (Ni).

In the present invention, the mixed layer is formed of an aluminum-silicon alloy (Al-Si alloy) or a nickel silicide (NiSi).

The coating and drying of the first electrode paste and the second electrode paste may be performed by coating the electrode paste on the seed layer formed on the opening by a screen printing method and drying the electrode paste. And a method of manufacturing an electrode-type solar cell.

In the present invention, the first electrode layer and the second electrode layer are formed of silver (Ag) or an alloy of silver (Ag alloy).

The method of manufacturing a solar cell according to claim 1, wherein the heat treatment temperature is 400 ° C to 500 ° C.

In the present invention, the heat treatment is annealed in a hydrogen (H 2) gas atmosphere.

The present invention includes a method of manufacturing a back electrode type solar cell, wherein the hydrogen gas atmosphere is formed using hydrogen of 3% to 40%.

In the present invention, the annealing, the formation of a mixed layer of a metal element and Si, and the formation of the first electrode layer and the second electrode layer may be performed at a temperature of 350 ° C to 550 ° C .

The step of removing the seed layer in the region where the first electrode layer and the second electrode layer are not formed may include at least one of an optical scribing method, a mechanical scribing method, a plasma using etching method, a wet etching method, a dry etching method, a lift-off method, and a wire mask method. The present invention also provides a method of manufacturing a rear electrode type solar cell.

In the present invention, the step of removing the seed layer in the regions where the first electrode layer and the second electrode layer are not formed may include forming the first electrode layer and the second electrode layer using the first electrode layer or the second electrode layer as a mask layer And removing the seed layer in a region where the seed layer is not formed.

According to the present invention, it is possible to form a mixed layer which can be composed of an aluminum-silicon alloy (Al-Si alloy) or nickel silicide (NiSi) under a predetermined hydrogen (H2) annealing condition and a sintering process of the first electrode or the second electrode simultaneously The process steps are reduced, the manufacturing cost is lowered, and the thermal stress of the solar cell device is lowered because it is not necessary to separately sinter the electrode at a high temperature.

Further, according to the present invention, since the first electrode layer and the second electrode layer are used as a mask layer in the partial removal step of the seed layer, the removal of the seed layer can be performed without requiring a separate mask layer, The manufacturing cost is lowered.

Further, according to the present invention, since the silver (Ag) electrode performs a heat treatment under the hydrogen gas atmosphere in the formation of the Ni seed layer, the NiO _x is prevented from being generated, There is an effect that can be.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. Prior to this, terms and words used in the present specification and claims should not be construed as limited to ordinary or dictionary terms, and the inventor should appropriately interpret the concepts of the terms appropriately The present invention should be construed in accordance with the meaning and concept consistent with the technical idea of the present invention. Therefore, the embodiments described in this specification and the configurations shown in the drawings are merely the most preferred embodiments of the present invention and do not represent all the technical ideas of the present invention. Therefore, It is to be understood that equivalents and modifications are possible.

1 is a cross-sectional view illustrating a structure of a rear electrode type solar cell according to an embodiment of the present invention.

First, on the non-light-receiving surface of the first conductive silicon substrate 101, the same conductivity type as that of the second conductivity type semiconductor region 103 having the conductivity type opposite to the doping impurity of the first conductive type silicon substrate 101 The first conductivity type semiconductor region 102 may be formed.

The first conductive semiconductor region 102 is doped with a semiconductor dopant of the same type at a higher concentration than the concentration of the doped semiconductor dopant in the first conductive type silicon substrate 101, And the second conductivity type semiconductor region 103 serves as an emitter layer doped with a dopant of a type opposite to that of the semiconductor dopant doped to the first conductivity type silicon substrate 101 .

That is, in the present invention, if the first conductive silicon substrate 101 is a p-type crystalline silicon substrate, the second conductive semiconductor region 103 is an n + -type semiconductor region, Type semiconductor region doped with a p-type semiconductor dopant having a higher concentration than the concentration of the p-type semiconductor dopant doped in the first conductive silicon substrate 101. [ In contrast, in the present invention, when the first conductive type silicon substrate 101 is an n-type crystalline silicon substrate, the second conductive type semiconductor region 103 is a p + type semiconductor region, Type semiconductor region doped with an n-type semiconductor dopant at a higher concentration than the concentration of the n-type semiconductor dopant doped in the semiconductor substrate.

The first conductive type semiconductor region 102 and the second conductive type semiconductor region 103 may be formed by thermal diffusing or spin on doping the first conductive type silicon substrate 101, May be formed by any one method selected from direct printing, screen printing, spray doping, and paste doping.

A rear passivation layer 104 having at least one opening is formed on the first conductive semiconductor region 102 and the second conductive semiconductor region 103.

The rear passivation layer 104 may be formed by depositing a material layer or a composite layer of SiO ₂ , SiN x, or SiON on the first conductive semiconductor region 102 and the second conductive semiconductor region 103 , A mask layer having an opening located above the first conductive semiconductor region 102 and the second conductive semiconductor region 103 is formed on the material layer, To expose a portion of the first conductive semiconductor region 102 and the second conductive semiconductor region 103, and then removing the mask layer.

After forming the rear passivation layer 104 having the openings, a seed layer 106 is formed in electrical contact with the first conductive semiconductor region 102 or the second conductive semiconductor region 103 through the openings .

An electrode paste is coated on the seed layer 106 formed in the opening region and dried to form a mixed layer 105 of a metal element and silicon (Si) under a predetermined hydrogen annealing condition and a sintering process of the electrode 107 simultaneously Thereby forming the first electrode layer and the second electrode layer. When the formation of the first and second electrode layers and the formation of the mixed layer 105 is completed, the seed layer 106 in the region where the first and second electrode layers are not formed is partially removed by etching or the like The process of the lower surface of the silicon substrate is completed.

The semiconductor impurity doped layer 108 and the antireflection film 109 may be sequentially formed on the light receiving surface of the silicon substrate 101 of the first conductivity type.

If the first conductive silicon substrate 101 is an n-type silicon substrate, an n + semiconductor impurity doped layer doped with an n-type impurity at a high concentration is formed on the light receiving surface, and in the opposite case, p -Type impurity is doped at a high concentration, and an antireflection film 109 is formed thereon.

The n-type semiconductor impurity may be a compound containing any one element selected from the group 5 elements consisting of phosphorus (P), arsenic (As), and antimony (Sb). the n + type impurity doping layer 108 can be formed by injecting the n-type impurity ink and burning in the furnace when the concentration of the impurity ink on the light receiving surface of the n-type silicon wafer substrate is made high. The reverse is also possible.

The antireflection film 109 prevents reflection of sunlight incident on the light receiving surface to improve light trapping. The reflection preventive film 109 may be formed of Si ₃ N ₄ , TiO ₂ , SiO ₂ , MgO, ITO (INDIUM TIN OXIDE) ₂ , ZnO, Ta ₂ O ₅ , MgF ₂ , CeO ₂ , Cr ₂ O ₃ and ZnS.

In order to minimize the reflectance of the incident light on the surface of the first conductive silicon substrate 101, the light receiving surface of the first conductive silicon substrate 101 is textured to form irregularities to increase the light trapping rate, Solar cells can be realized. The texturing for forming the unevenness may be any one of a wet chemical etching method, a dry chemical etching method, an electrochemical etching method, and a mechanical etching method, and is not necessarily limited thereto.

Although not shown in FIG. 1, an oxide layer such as silicon oxide (SiO ₂ ) may be additionally formed between the semiconductor doping layer 108 and the antireflection film 109.

2 is an enlarged view of a rear electrode of a rear electrode type solar cell according to an embodiment of the present invention.

A first conductive type semiconductor region 202 or a second conductive type semiconductor region is formed under the first conductive type silicon substrate 201 and a mixed layer 203 is formed under the first conductive type semiconductor region 202, The metal element constituting the seed layer 204 is formed by bonding with the silicon (Si). In the present invention, an aluminum-silicon alloy (Al-Si) alloy layer or a nickel silicide (NiSi) layer may be formed.

A seed layer 204 is formed under the mixed layer 203 and a rear electrode 205 is formed under the seed layer.

3A to 3G are cross-sectional views illustrating a process sequence of a method of manufacturing a back electrode type solar cell according to an embodiment of the present invention.

FIG. 3A is a cross-sectional view illustrating a step of forming a rear passivation layer on a rear surface of a silicon substrate of a first conductivity type in which a first conductive semiconductor region and a second conductive semiconductor region are formed.

The first conductive type semiconductor region 302 and the second conductive type semiconductor region 303 may be formed by a method known in the art. Preferably containing a semiconductor impurity corresponding to the rear surface of the semiconductor substrate, a compound, that is, BBr ₃ or gaseous compounds such as POCl ₃ (gas phase) by the injected vapor-deposited, or include a dopant source in which the semiconductor dopant paste the paste is pattern-printed on the area of the rear surface of the semiconductor substrate, and heat-treated and injected.

The step of forming the first conductive type semiconductor region 302 and the second conductive type semiconductor region 303 in the first conductive type silicon substrate 301 may include forming a first conductive type semiconductor region 302 and a second conductive type semiconductor region 303 in the first conductive type silicon substrate 301, Any one method selected from thermal diffusing method, spin on doping method, direct printing method, screen printing method, spray doping method and paste doping method may be used. . ≪ / RTI >

The rear passivation layer 305 is formed on the first conductivity type semiconductor region 302 and the second conductivity type semiconductor region 303 and may be formed of a material such as SiO ₂ , SiNx, SiC, or the like.

In order to finally contact the surface of the silicon semiconductor layer and the rear electrode, a second conductive semiconductor region 303 serving as an emitter and a part of a first conductive semiconductor region 302 serving as a BSF layer Must be exposed to the outside, and the rear passivation layer 350 formed on top of these semiconductor regions must be selectively removed.

FIG. 3B is a cross-sectional view illustrating a step of forming a mask layer having an opening located above the first conductive semiconductor region and the second conductive semiconductor region on the material layer forming the rear passivation layer.

The mask layer 305 may be formed by a lithography process using a photoresist or a screen printing process using a mask paste, but the present invention is not limited thereto. The material constituting the mask layer will suffice if it is a material resistant to the remover solution which subsequently removes a portion of the back passivation layer.

The mask layer 305 may selectively expose the rear passivation layer 304 and form an opening 306 to expose a portion of the first conductivity type semiconductor region 302 and the second conductivity type semiconductor region 303 As shown in FIG.

3C is a cross-sectional view illustrating a process step of removing a material layer through an opening of the mask layer to expose a portion of the first conductivity type semiconductor region and a portion of the second conductivity type semiconductor region.

That is, a part of the rear passivation layer 304 is selectively formed through the opening 306 of the mask layer 305 patterned to expose the first conductivity type semiconductor region 302 and a part of the second conductivity type semiconductor region 303 As shown in FIG.

Here, the removal solution for removing the rear passivation layer 304 may be an acid or an acid mixture, and in particular, a solution selected from HF, buffered oxide etchant (BOE), phosphoric acid (H ₃ PO ₄ ) HF, H ₃ PO ₄ , and mixtures of any one or more of these solutions. Of course, the mask layer 305 should consist of a material resistant to the solution.

When these etching solutions are applied by a screen printing method or a direct printing method through the opening 306 of the mask layer 305, an opening 306 of the rear passivation layer 304 is formed as shown in FIG. 3C, Contact points with the first conductivity type semiconductor region 302 and the second conductivity type semiconductor region 303, respectively. Of course, such a contact point can be implemented by any one of a hole, a line, and a square depending on the shape.

FIG. 3D is a cross-sectional view illustrating a process step of removing the mask layer on the rear passivation layer.

The step of removing the mask layer 305 on the rear passivation layer 304 may be performed by an optical scribing method, a mechanical scribing method, a plasma using etching method, a wet etching method, a dry etching method, A lift-off method, a wire mask method, or the like.

FIG. 3E is a cross-sectional view illustrating a step of forming a seed layer on the rear passivation layer in contact with the first conductive semiconductor region and the second conductive semiconductor region through the opening. FIG.

In the present invention, the metal for the seed layer 307 is not particularly limited, but metals such as aluminum (Al), nickel (Ni), titanium (Ti), palladium (Pd), copper (Cu) .

Particularly, in the present invention, it is preferable that the seed layer is composed of Al or Ni because Al and Ni can exhibit excellent characteristics in terms of ohmic contact and internal reflection to infrared rays.

Al or Ni for the seed layer 307 may be formed by a vacuum method such as sputtering or a vacuum evaporator or an E-beam method, a spray coating method, an ink-jet coating method Or a non-vacuum method such as an electroless plating method. The exposed portions of the first conductive type semiconductor region 302 and the second conductive type semiconductor region 303, which are the silicon semiconductor layers, May be deposited all over a portion of the passivation layer 304.

The seed layer 307 and the first conductive semiconductor region 302 and the second conductive semiconductor region 302 are then annealed through annealing at a temperature of 350 ° C to 550 ° C in a forming gas, An aluminum-silicon alloy (Al-Si alloy) or nickel silicide (NiSi) may be formed on the interface of the semiconductor layer of the conductive semiconductor region 303.

FIG. 3F is a cross-sectional view illustrating a step of forming a first electrode layer and a second electrode layer by applying and drying a first electrode paste and a second electrode paste on a seed layer formed on the opening portion.

In order to form the first electrode layer 308 and the second electrode layer 309, first, the first electrode paste and the second electrode paste are screen printed on the seed layer 307 deposited on the area of the opening 306, And then dried and dried. At this time, since the metal electrode layer is patterned by screen printing method and deposited, the electrode height can be increased to a desired height, thereby widening the application width and reducing the electrical resistance of the electrode.

In the present invention, the first electrode paste and the second electrode paste are coated and dried and then annealed in a hydrogen gas atmosphere at a temperature of 350 ° C to 550 ° C, and at the same time, the first electrode layer 308 and the second electrode layer 309 The sintering process of the sintering process can be simultaneously performed to form the rear electrode. This simplifies the conventional complicated process steps and requires no additional heat treatment process other than the above-mentioned heat treatment on the temperature of 350 to 550 ° C, The thermal stress of the battery element can be reduced.

In addition, in the case of forming a general Ni seed layer, nickel oxide (NiO _x ) is easily formed due to oxidation in a heat treatment process, so that it is difficult to secure desired resistance. However, in the present invention, Ag paste acts as a protective film, It is possible to prevent the generation of NiO _x due to the heat treatment.

The first electrode layer 308 and the second electrode layer 309 are preferably formed of Ag or an Ag alloy. However, the present invention is not limited thereto, and a metal and its alloy constituting a known rear electrode may be used. .

3G is a cross-sectional view illustrating a step of partially removing the seed layer in a region where the first electrode layer and the second electrode layer are not formed.

That is, the first electrode layer 308 formed of a metal such as silver (Ag) or a silver alloy, and the seed layer 307 except for the seed layer in the region where the second electrode layer 309 is formed are removed, And the electrode process of the solar cell is completed. That is, the first electrode 308, the second electrode 309, and the rear passivation layer 304 are exposed on the lower surface of the rear electrode type solar cell.

3G, the first conductive semiconductor region 302 formed on the lower surface of the first conductive silicon substrate 301 and the seed layer 307 contacting the portions of the second conductive semiconductor region 303, respectively, The first electrode 308 and the second electrode 309 are electrically connected to each other through the first electrode layer 308 and the second electrode layer 309 so that carriers excited by the sunlight can be easily transferred to the first electrode layer 308 and the second electrode layer 309 It can be collected.

The step of partially removing the seed layer may be performed by etching the seed layer using the first electrode layer 308 and the second electrode layer 309 as a mask layer. Therefore, since there is no need to provide a mask layer patterned by a lot, the process steps can be simplified and the process cost can be reduced.

The step of partially removing the seed layer may be performed by an optical scribing method, a mechanical scribing method, a plasma using etching method, a wet etching method, a dry etching method, a lift-off method, a wire mask method It is also possible to remove the seed layer by any one method selected from the following methods. Of course, in the method requiring a mask layer, it is needless to say that the seed layer can be removed by using the first electrode layer 308 and the second electrode layer 309 as a mask layer.

10 is a flowchart of a method of manufacturing a back electrode type solar cell according to an embodiment of the present invention.

First, a rear passivation layer is formed on a rear surface of a first conductive silicon substrate having a first conductive type semiconductor region and a second conductive type semiconductor region. In operation S410, the rear passivation layer includes a first conductive semiconductor region And a portion of the semiconductor region of the second conductivity type.

The method of forming the rear passivation layer having the opening may include: i) depositing or compounding any one material layer selected from SiO ₂ , SiNx, and SiON on the first conductive semiconductor region and the second conductive semiconductor region Ii) forming a mask layer on the material layer, the mask layer having an opening located above the first conductivity type semiconductor region and the second conductivity type semiconductor region; iii) A mixture of at least one selected from HF, BOE (buffered oxide etchant), phosphoric acid (H ₃ PO ₄ ) and the above solution, and a mixture of at least one of HF and H ₃ PO ₄ Exposing a portion of the first conductivity type semiconductor region and a portion of the second conductivity type semiconductor region by removing the material layer using at least one etching composition; iv) removing the mask layer Is to be formed through the steps.

After forming the rear passivation layer, a seed layer is formed. (S420) A seed layer is deposited on the rear passivation layer. At this time, the first conductive semiconductor region and the second conductive type It must be deposited to be in contact with the semiconductor region. The seed layer may be formed of Al or Ni.

After the formation of the seed layer, a first electrode paste and a second electrode paste are coated on the seed layer formed on the opening and dried. (S430) The electrode paste is formed of Ag paste or Ag alloy paste Can be used.

Thereafter, annealing is performed in a hydrogen (H 2) gas atmosphere, and a first electrode layer and a second electrode layer are formed in addition to a mixed layer of a metal element constituting the seed layer and Si. (S 430)

The foaming gas atmosphere can be formed using hydrogen of 3% to 40%, and the annealing and sintering processes can be carried out simultaneously at a temperature of 350 to 550 캜. During this process, a mixed layer made of an aluminum-silicon alloy (Al-Si alloy) or nickel silicide (NiSi) is formed at the interface between the first conductivity type semiconductor region and the second conductivity type semiconductor region and the seed layer.

If the seed layer in the region where the first electrode layer and the second electrode layer are not formed is partially removed, the manufacturing process of the rear electrode type solar cell is completed (s450). In this case, since the first electrode layer and the second electrode layer can be etched using the mask layer, the manufacturing process is simplified and the manufacturing cost is reduced.

Although the present invention has been described in connection with the specific embodiments of the present invention, it is to be understood that the present invention is not limited thereto. It will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims and their equivalents. Various modifications and variations are possible.

1 is a cross-sectional view illustrating a structure of a rear electrode type solar cell according to an embodiment of the present invention.

2 is an enlarged view of a rear electrode of a rear electrode type solar cell according to an embodiment of the present invention.

3 to 9 are cross-sectional views illustrating a process sequence of a method of manufacturing a back electrode type solar cell according to an embodiment of the present invention.

10 is a flowchart of a method of manufacturing a back electrode type solar cell according to an embodiment of the present invention.

DESCRIPTION OF THE REFERENCE SIGNS

101, 201, and 301: a first conductive silicon substrate

102, 202, and 302: a first conductivity type semiconductor region

103, 303: a second conductivity type semiconductor region

104, 304: rear passivation layer

105, 203: mixed layer

106, 204, 307: Seed layer

107, 205: rear electrode

108: Semiconductor impurity doping layer

109: Antireflection film

305: mask layer

306: opening

308: first electrode

309: Second electrode

Claims (15)

A first conductivity type semiconductor region and a part of the second conductivity type semiconductor region are formed on the rear surface of the first conductivity type silicon substrate in which the first conductivity type semiconductor region and the second conductivity type semiconductor region are formed apart from each other, Forming a back passivation layer including at least one exposed opening; Forming a seed layer on the rear passivation layer, the seed layer being in contact with the first conductive semiconductor region and the second conductive semiconductor region through the opening and comprising a metal element; Coating a first electrode paste and a second electrode paste on the seed layer formed on the opening in a state of having a pattern by a screen printing method and drying the paste; A mixed layer of a metal element constituting the seed layer and Si is formed at the interface between the first conductive type semiconductor region and the second conductive type semiconductor region through heat treatment to form a first electrode layer and a second electrode layer at the same time step; And Removing the seed layer in a region where the first electrode layer and the second electrode layer are not formed; Lt; / RTI > Wherein the annealing is performed in a hydrogen (H 2) gas atmosphere. The method of claim 1, wherein the back passivation layer comprises: Depositing or compounding at least one selected from the group consisting of SiO ₂ , SiN x, SiC, and intrinsic amorphous silicon on the first conductive semiconductor region and the second conductive semiconductor region; Forming a mask layer on the material layer, the mask layer having openings located on the first conductivity type semiconductor region and the second conductivity type semiconductor region; And Removing the material layer through the opening of the mask layer to expose a portion of the first conductive semiconductor region and a portion of the second conductive semiconductor region, and then removing the mask layer; The method of manufacturing a back electrode type solar cell according to claim 1, 3. The method of claim 2, wherein removal of the material layer through the opening of the mask layer comprises: Wherein the etching is performed by applying the etching composition by a screen printing method or a direct printing method to remove the etching composition. 4. The method of claim 3, HF, buffered oxide etchant (BOE) and phosphoric acid (H ₃ PO ₄ ) and a mixture of at least one selected from HF and H ₃ PO ₄ , and at least one selected from the group consisting of Wherein the first electrode and the second electrode are electrically connected to each other. 2. The method of claim 1, wherein forming the seed layer comprises: A sputtering method, a vacuum evaporation method, or an electron beam method such as a vacuum method to contact a metal element constituting a seed layer on the rear passivation layer to the first conductive semiconductor region and the second conductive semiconductor region, Wherein the seed layer is formed by any one of an E-Beam deposition method and a non-vacuum method such as a spray coating method, an ink jet coating method or an electroless plating method. A method of manufacturing a solar cell. 6. The method of claim 5, Wherein the metal layer forming the seed layer is aluminum (Al) or nickel (Ni). The method according to claim 1, Wherein the mixed layer is formed of an aluminum-silicon alloy (Al-Si alloy) or a nickel silicide (NiSi). delete The method according to claim 1, Wherein the first electrode layer and the second electrode layer are made of silver (Ag) or an alloy of silver (Ag alloy). The method according to claim 1, Wherein the heat treatment temperature is in a range of 400 ° C to 500 ° C. delete The method according to claim 1, Wherein the hydrogen gas atmosphere is formed using 3% to 40% hydrogen. The method according to claim 1, Wherein the step of annealing, forming a mixed layer of a metal element and Si, and forming the first electrode layer and the second electrode layer proceeds at a temperature of 350 ° C to 550 ° C. The method according to claim 1, The step of removing the seed layer in the region where the first and second electrode layers are not formed may be performed by an optical scribing method, a mechanical scribing method, a plasma using etching method, a wet etching method, a dry etching method, a lift- off method, and a wire mask method. The method of manufacturing a rear electrode type solar cell according to claim 1, wherein the seed layer is removed by any one of the following methods. The method according to claim 1, The step of removing the seed layer in the region where the first electrode layer and the second electrode layer are not formed may be performed by using the first electrode layer or the second electrode layer as a mask layer, Wherein the seed layer is removed by etching.

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