KR101434567B1 - Apparatus and method of managing mapping table of non-volatile memory - Google Patents

Abstract

The present invention relates to an apparatus and method for managing a mapping table of a nonvolatile memory, and more particularly, to a mapping table management method and apparatus for managing mapping tables of pages sharing a memory cell in a nonvolatile memory capable of displaying bit information of a plurality of pages through one memory cell To a non-volatile memory mapping table management apparatus and method.

A mapping table management apparatus of a nonvolatile memory according to an embodiment of the present invention includes a nonvolatile memory including a memory cell storing data bits in a plurality of pages included in a predetermined block through a plurality of states implemented with at least two bits, A calculation time measuring unit for measuring a write operation time of a plurality of pages included in the block; and a memory unit for dividing the pages into a plurality of groups according to the measured write operation time, And a mapping table generation unit for generating the mapping table.

Non-volatile memory, mapping table, MLC, memory cell

Description

[0001] Apparatus and method for managing mapping table of non-volatile memory [0002]

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a diagram showing an apparatus for managing a mapping table of a nonvolatile memory according to an embodiment of the present invention. FIG.

FIG. 2 illustrates a state of an MLC non-volatile memory according to an embodiment of the present invention; FIG.

Fig. 3 is a diagram showing voltage according to the state of Fig. 2; Fig.

4 is a diagram showing a configuration of a page included in a block of a non-volatile memory according to an embodiment of the present invention;

Figure 5 shows a first group according to an embodiment of the present invention.

Figure 6 shows a second group according to an embodiment of the present invention.

7 illustrates a mapping table according to an embodiment of the present invention.

8 is a diagram illustrating a mapping table management method of a nonvolatile memory according to an embodiment of the present invention.

DESCRIPTION OF THE REFERENCE NUMERALS

110: nonvolatile memory 120: calculation time measuring unit

130: mapping table generation unit 140: mapping table storage unit

150: Mapping table extracting unit

The present invention relates to an apparatus and method for managing a mapping table of a nonvolatile memory, and more particularly, to a mapping table management method and apparatus for managing mapping tables of pages sharing a memory cell in a nonvolatile memory capable of displaying bit information of a plurality of pages through one memory cell To a non-volatile memory mapping table management apparatus and method.

2. Description of the Related Art In general, non-volatile memory is widely used as a storage medium for storing and processing data in an embedded system such as a home appliance, a communication device, and a set-top box.

A flash memory, which is mainly used in a nonvolatile memory, is a nonvolatile memory element capable of electrically erasing data or rewriting data. The flash memory consumes less power than a storage medium based on a magnetic disk memory, (Access Time) and is suitable for portable devices because of its small size.

The basic mechanism by which data bits are stored in such a non-volatile memory is a memory cell. Such a memory cell consists of a single field effect transistor including a control gate, a floating gate, a source, and a drain. At this time, the data bit is stored by changing the amount of charge on the float gate so that the threshold voltage of the memory cell is changed. In addition, the memory cell is read by applying the selection voltage through the word line of the control gate.

A typical memory cell provides storage capability to store two states through one bit. In other words, the memory cell provides storage capability to store bit 1, which is the data erased state, or bit 0, which is the state where the data is stored, depending on the applied voltage.

At this time, since a requirement for a large-capacity storage device is a required condition, it is necessary to implement a low bit-rate, so that a technique for storing a plurality of bits of data in one memory cell has been actively researched.

A technique capable of drastically reducing the price per bit in nonvolatile memory is described in IEEE, ISSCC Digest of Technical Papers, pp. M.Bauer et al., Entitled A Multilevel-Cell 32 Mb Flash Memory, which includes a technique for providing storage of four states through two bits per memory cell.

A non-volatile memory capable of storing four states through two bits per memory cell is generally referred to as a multi-level cell (MLC) non-volatile memory, and two And stores the data bits for the page. Further, two pages corresponding to one memory cell are referred to as an LSB page and an MSB page, respectively, and data bits are stored from an LSB page.

When using such an MLC nonvolatile memory, a problem is that a sudden power interruption occurs while the program is being executed in the nonvolatile memory. This is because most MLC nonvolatile memories have been adopted in products where data importance is low. Therefore, although various methods have been proposed to ensure stable operation in an MLC nonvolatile memory, they can be applied when the mapping relationship of the LSB page and the MSB page is already known.

In other words, if it is necessary to know the mapping relationship between the LSB page and the MSB page sharing one memory cell, if an error occurs in any one of the LSB page and the MSB page due to a sudden power interruption phenomenon in the MLC nonvolatile memory , It becomes possible to recover the error of another page sharing the memory cell.

Korean Patent Laid-Open Publication No. 2004-0034580 discloses that when a page is recorded in the same block in a flash device, data is written to the page, and the page is stored at a higher address than any previously recorded page in the block However, a method of knowing the mapping relationship between the LSB page and the MSB page in the MLC nonvolatile memory has not been proposed.

The present invention provides an apparatus and method for managing a mapping table of a nonvolatile memory in which a mapping relationship between an LSB page and an MSB page in an MLC nonvolatile memory is determined and one type of nonvolatile memory can be used as one software, .

The objects of the present invention are not limited to the above-mentioned objects, and other objects not mentioned can be clearly understood by those skilled in the art from the following description.

According to an aspect of the present invention, there is provided an apparatus for managing a mapping table of a nonvolatile memory, the apparatus comprising: a memory cell storing a data bit in a plurality of pages included in a predetermined block through a plurality of states, A calculation time measuring unit for measuring a write operation time of a plurality of pages included in the block, and a processor for dividing the pages into a plurality of groups according to the measured write operation time, And a mapping table generation unit for generating a mapping table using the group.

According to another aspect of the present invention, there is provided a method of managing a mapping table of a nonvolatile memory, the method comprising: storing data bits in a plurality of pages included in a predetermined block through a plurality of states, The method of claim 1, further comprising: measuring a write operation time for a plurality of pages included in the block in a nonvolatile memory including a memory cell; dividing each page into a plurality of groups according to the measured write operation time; And generating a mapping table using the group.

The details of other embodiments are included in the detailed description and drawings.

BRIEF DESCRIPTION OF THE DRAWINGS The advantages and features of the present invention, and the manner of achieving them, will be apparent from and elucidated with reference to the embodiments described hereinafter in conjunction with the accompanying drawings. It should be understood, however, that the description herein is not limited to the embodiments disclosed herein but may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, To fully disclose the invention to those skilled in the art, and the invention is only defined by the scope of the claims. Like reference numerals refer to like elements throughout the specification.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described with reference to block diagrams or process flowcharts for explaining an apparatus and method for managing a mapping table of a nonvolatile memory according to embodiments of the present invention. At this point, it will be appreciated that the combinations of blocks and flowchart illustrations in the process flow diagrams may be performed by computer program instructions. These computer program instructions may be loaded into a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus, so that those instructions, which are executed through a processor of a computer or other programmable data processing apparatus, Thereby creating means for performing functions. These computer program instructions may also be stored in a computer usable or computer readable memory capable of directing a computer or other programmable data processing apparatus to implement the functionality in a particular manner so that the computer usable or computer readable memory The instructions stored in the block diagram (s) are also capable of producing manufacturing items containing instruction means for performing the functions described in the flowchart block (s). The computer program instructions It is also possible to mount on a computer or other programmable data processing equipment, so that a series of operating steps are performed on a computer or other programmable data processing equipment to create a computer-executed process to execute a computer or other programmable data processing equipment The instructions that perform may also provide steps for executing the functions described in the flowchart block (s).

In addition, each block may represent a module, segment, or portion of code that includes one or more executable instructions for executing the specified logical function (s). It should also be noted that in some alternative implementations, the functions mentioned in the blocks may occur out of order. For example, two blocks shown in succession may actually be executed substantially concurrently, or the blocks may sometimes be performed in reverse order according to the corresponding function.

1 is a block diagram of a mapping table management apparatus for a non-volatile memory according to an embodiment of the present invention.

The mapping table management apparatus 100 of the nonvolatile memory according to the embodiment of the present invention includes a nonvolatile memory 110, an operation time measurement unit 120, a mapping table generation unit 130, A storage unit 140, and a mapping table extracting unit 150.

The nonvolatile memory 110 is an MLC nonvolatile memory including a memory cell that stores data in a plurality of pages through a plurality of states implemented with at least two bits.

For example, in a MLC non-volatile memory, when a memory cell stores data on a plurality of pages through two bits, pages where data bits are stored by the same memory cell are said to be bound to each other, You can store the data on the LSB and MSB pages that are bound to each other among the included pages. At this time, the LSB page and the MSB page may or may not be positioned successively to each other. In the embodiment of the present invention, data bit information is stored through 4 states in which a memory cell is implemented with 2 bits. However, this is only an example for facilitating understanding of the present invention. The data bits may be stored in a plurality of pages through a plurality of states implemented as described above.

The calculation time measuring unit 120 may perform a write operation on a plurality of pages included in a predetermined block of the nonvolatile memory 110 and measure a time at which a write operation is completed for each page. When the nonvolatile memory 110 is an MLC nonvolatile memory as described above, the LSB page and the MSB page are measured at the completion time of the write operation, This is to distinguish them because of differences.

For example, when the nonvolatile memory 110 stores bit information of data on the LSB page and the MSB page through the four states in which the memory cell is implemented as two bits as shown in FIG. 2, the state of the LSB page and the MSB page As shown in FIG. 3, four states can be implemented according to four voltages.

Referring to FIGS. 2 and 3, the LSB page is lowered by one step, while the MSB page is lowered by two or more steps. Therefore, the LSB page is relatively faster in the write operation completion time than the MSB page. That is, the calculation time measuring unit 120 measures the completion time of the write operation of each page so that the LSB page and the MSB page can be distinguished from each other in the nonvolatile memory 110.

The mapping table generation unit 130 divides pages in a block into a first group, which is an LSB page group, and a second group, which is an MSB page group, according to the write operation completion time measured by the calculation time measuring unit 120, A mapping table can be generated by using the group and the second group to know the mapping relationship between the LSB page and the MSB page.

In other words, when the page configuration of the nonvolatile memory 110 is made up of the LSB page 0 to the LSB page 4 and the MSB page 0 to the MSB page 4 as shown in FIG. 4, the calculation time measuring unit 120 calculates the write operation And the mapping table generator 130 measures the completion time of the MSB pages, as shown in FIG. 5, according to the measured write operation completion time, and the first group, which is a group of LSB pages, And the second group. At this time, the pages in the first group and the second group are arranged in order because the pages in the blocks are programmed in the order of increasing page numbers due to the nature of the non-volatile memory 110. [

Then, the mapping table generating unit 130 generates the mapping table using the first group and the second group. In the embodiment of the present invention, the generated mapping table is divided into the page type field 210, The page page field 220 and the next page field 230 will be described by way of example, but the present invention is not limited thereto. Further, the mapping table generated in the embodiment of the present invention can be understood to be generated in order to know the mapping relationship between the pages sharing the memory cells. Therefore, it is obvious that the number and type of fields included in the mapping table can be changed according to the type and standard of the nonvolatile memory 110. [

The page type field 210 indicates whether the page is an LSB page or an MSB page, 'L' indicates an LSB page, and 'M' indicates an MSB page. The pair page field 220 indicates a page sharing the memory cell with the page. That is, when the page is an LSB page, it indicates an MSB page sharing a memory cell, and when the page is an MSB page, it indicates an LSB page sharing a memory cell. The next page field 230 is the same page type as the page and represents the next page. In FIG. 7, '-' means that the next page does not exist.

The mapping table storage unit 140 stores the mapping table generated by the mapping table generation unit 130. [ In the embodiment of the present invention, the non-volatile memory 110 and the mapping table storage unit 140 are configured as separate components. However, the present invention is not limited thereto, and the mapping table storage unit 140 may store non- And may be replaced with a predetermined area of the memory 110. [

The mapping table extracting unit 150 may extract a mapping table stored in the mapping table storage unit 140. [ Since the mapping table can be extracted by using one type of nonvolatile memory 110 by using one software, the mapping relation of the pages sharing the memory cells in the MLC nonvolatile memory can be performed. Therefore, the MLC ratio And unnecessary time and cost such as correcting the firmware according to the structure of the volatile memory are reduced.

8 is a diagram illustrating a mapping table management method of a nonvolatile memory according to an embodiment of the present invention.

As shown in the figure, in the mapping table management method of the non-volatile memory according to the embodiment of the present invention, the calculation time measuring unit 120 performs a write operation on each page of a predetermined block included in the non-volatile memory 110 And the time at which the write operation is completed is measured (S110).

The mapping table generation unit 130 divides the pages included in the block into a plurality of groups according to the write operation completion time measured by the calculation time measurement unit 120 (S120). In this case, in the embodiment of the present invention, a predetermined block of the nonvolatile memory 110 is composed of 8 pages, and the case of 4 LSB pages and 4 MSB pages will be described as an example. In addition, the group divided by the mapping table generator 130 is a first group of LSB pages and a second group of MSB pages, for example. In this case, dividing the plurality of pages into the first group and the second group is based on the fact that the LSB page ends in a relatively short period of time as compared with the MSB page, and the criteria determined according to the end time of the program in the LSB page And may be divided into a first group and a second group based on time.

In this case, the mapping table generation unit 130 divides the groups into the first group by setting LSB pages whose write operations are relatively fast compared with other pages as the LSB pages, and sets the remaining pages as MSB pages And are grouped into a second group.

After the grouping of the groups is completed, the mapping table generating unit 130 arranges the pages included in each group in order (S130).

The mapping table generation unit 130 sets a pair page of pages included in each group based on the sorted pages (S140).

The mapping table generation unit 130 generates a mapping table between a plurality of groups as described above with reference to FIG. 7 (S150).

In this case, since the efficiency of the method shown in FIG. 8 performed every time the non-volatile memory 110 is initialized may decrease, the mapping table generated by the method of FIG. 8 may be stored in the mapping table storage unit 140, And may be extracted and used by the mapping table extracting unit 150 when necessary.

By storing the mapping relationship between the LSB page and the MSB page in the MLC nonvolatile memory capable of expressing bit information for a plurality of pages with one memory cell as a mapping table and using it, Volatile memory can be used. That is, if the structure of the MLC nonvolatile memory differs for each company, the additional development cost such as correcting the firmware according to the structure of the nonvolatile memory can be reduced.

Means a hardware component such as software or a Field Programmable Gate Array (FPGA) or an Application Specific Integrated Circuit (ASIC), and the component performs certain roles. However, booting is not limited to software or hardware. The components may be configured to reside on an addressable storage medium and configured to execute one or more processors. Thus, by way of example, and not limitation, the elements and components such as software components, object-oriented software components, class components and task components, and processes, functions, attributes, procedures, subroutines , Segments of program code, drivers, firmware, microcode, circuitry, data, databases, data structures, tables, arrays, and variables. The functions provided in the components and parts may be combined into a smaller number of components and parts or further separated into additional components and parts.

As described above, the mapping table management apparatus and method of the nonvolatile memory according to the present invention has been described with reference to the drawings. However, the present invention is not limited to the embodiments and drawings disclosed in the present specification, It is to be understood that various modifications may be made by those skilled in the art.

According to the mapping table management apparatus and method of the nonvolatile memory of the present invention, one or more of the following effects can be obtained.

Since the mapping relationship between the LSB page and the MSB page in the MLC nonvolatile memory is grasped and stored as a mapping table, it is possible to use various kinds of nonvolatile memories as a single software.

In addition, the mapping table can also reduce unnecessary development costs and time such as correcting firmware and software according to the structure of the nonvolatile memory.

Claims (14)

A nonvolatile memory including a memory cell for storing data bits in a plurality of pages included in a predetermined block through a plurality of states implemented with at least two bits; A calculation time measuring unit for measuring a write operation time of a plurality of pages included in the block; And And a mapping table generation unit for dividing the pages into a plurality of groups according to the measured write operation time and generating a mapping table using the divided groups, Wherein the calculation time measuring unit performs a write operation on all pages included in the block, measures a completion time of the write operation, Wherein the mapping table generation unit designates each of the pages included in the block as a first group when the write operation completion time is relatively small compared to pages with different write operation completion time, Wherein the first group is a group of LSB pages and the second group is a group of MSB pages. The method according to claim 1, Wherein the nonvolatile memory expresses bit information of an LSB page and an MSB page through four states implemented with two bits. delete delete delete The method according to claim 1, Wherein the mapping table generation unit generates the mapping table including a type field of the page, a pair page field of the page, and a next page field having the same type as the page. The method according to claim 1, A mapping table storage unit for storing the generated mapping table; And And a mapping table extracting unit for extracting the stored mapping table. Measuring a write operation time for a plurality of pages included in the block in a nonvolatile memory including a memory cell storing data bits in a plurality of pages included in a predetermined block through a plurality of states implemented with at least two bits, ; Dividing the pages into a plurality of groups according to the measured write operation time; And And generating a mapping table using the segmented group, The step of measuring the computation time may include: performing a write operation on all pages included in the block; And measuring a completion time of the write operation, The step of generating the mapping table may include designating each of the pages included in the block as a first group when the write operation completion time is relatively small compared to pages having a different write operation completion time, and, Wherein the first group is a group of LSB pages and the second group is a group of MSB pages. 9. The method of claim 8, Wherein the nonvolatile memory expresses bit information of an LSB page and an MSB page through four states implemented with two bits. delete delete delete 9. The method of claim 8, Wherein the mapping table includes a type field of the page, a pair page field of the page, and a next page field having the same type as the page. 9. The method of claim 8, Storing the generated mapping table; And Further comprising the step of extracting the stored mapping table.

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