KR101275208B1 - Digital broadcasting system and processing method - Google Patents

Abstract

The present invention relates to a digital broadcasting system. In particular, the present invention performs at least one of an error correction encoding process, a row shuffling process, and an error detection encoding process for data to be transmitted. As a result, the present invention enables robust response to fast channel changes while giving robustness to the transmitted data.

Enhanced Data, Coding

Description

Digital broadcasting system and processing method

1 is a schematic diagram of a digital broadcast transmission system according to the present invention.

2 (a) to 2 (e) show an example of an error correction encoding process according to a first embodiment of the present invention.

3A and 3B illustrate a row mixing process according to a first embodiment of the present invention.

4A to 4C illustrate an embodiment of an error detection encoding process according to the present invention.

5A and 5B illustrate examples of dividing a frame encoded according to a first embodiment of the present invention into a plurality of subframes.

6 (a) to (e) are diagrams showing an example of an error correction encoding process according to a second embodiment of the present invention.

7A and 7B illustrate a row mixing process according to a second embodiment of the present invention.

8A and 8B illustrate examples of dividing a frame encoded according to a second embodiment of the present invention into a plurality of subframes.

9 is a block diagram illustrating a digital broadcast transmission system according to an embodiment of the present invention.

10 is a block diagram illustrating a digital broadcast transmission system according to another embodiment of the present invention.

11 is a block diagram of a digital broadcast transmission system according to another embodiment of the present invention.

12A and 12B are diagrams showing an example of data configuration before and after the data deinterleaver in the digital broadcast transmission system according to the present invention.

13 is a block diagram illustrating a digital broadcast receiving system according to an embodiment of the present invention.

14 is a flowchart schematically showing an example of an error correction decoding process according to the third embodiment of the present invention.

FIG. 15 illustrates a detailed operation process of performing error correction decoding by combining the first and second subframes in FIG. 14.

16 shows an example of an error correction decoding process according to a fourth embodiment of the present invention.

Description of the Related Art [0002]

101: RS frame encoder 102: E-VSB processing unit

103: packet multiplexer

801: tuner 802: demodulator

803: equalizer 804: known data detection unit

805: E-VSB Block Decoder 806: E-VSB Data Deformatter

807: RS frame decoder 808: data deinterleaver

809: RS decoder 810: derandomizer

TECHNICAL FIELD The present invention relates to digital broadcasting systems, and more particularly, to a method for transmitting and receiving digital broadcasting.

The 8T-VSB (Vestigial Sideband) transmission system, which is adopted as a digital broadcasting standard in North America and Korea, is a system developed for transmission of MPEG video / audio data. However, with the rapid development of digital signal processing technology and the widespread use of the Internet, digital home appliances, computers, and the Internet are being integrated into one big framework. Therefore, in order to meet various needs of users, it is necessary to develop a system capable of transmitting various additional data in addition to video / audio data through a digital broadcasting channel.

Some users of supplementary data broadcasting are expected to use supplementary data broadcasting by using PC card or portable device with simple indoor antenna. In the room, signal strength is greatly reduced due to wall blocking and influence of nearby moving objects. Due to the effects of ghosts and noise caused by reflected waves, broadcast reception performance may deteriorate. However, unlike general video / audio data, the additional data transmission should have a lower error rate. In the case of video and audio data, errors that the human eye and ears cannot detect are not a problem, while in the case of additional data (eg program executables, stock information, etc.), a bit of error occurs. Even serious problems can occur. therefore There is a need to develop a system that is more resistant to ghosting and noise in the channel.

The transmission of additional data will usually be done in a time division manner over the same channel as the MPEG video / sound. Since the beginning of digital broadcasting, however, ATSC VSB digital broadcasting receivers that receive only MPEG video / audio have been widely used in the market. Therefore, additional data transmitted on the same channel as MPEG video / audio should not affect the existing ATSC VSB-only receivers that have been used in the market. Such a situation is defined as ATSC VSB compatible, and the additional data broadcasting system should be compatible with the ATSC VSB system. The additional data may also be referred to as enhanced data or E-VSB data.

In addition, in a poor channel environment, the reception performance of the conventional ATSC VSB receiving system may be degraded. Especially in the case of portable and mobile receivers, robustness against channel changes and noise is required.

Accordingly, an object of the present invention is to provide a new digital broadcasting system and processing method suitable for additional data transmission and resistant to noise.

Another object of the present invention is to provide a digital broadcasting system and a processing method for improving reception performance of a receiver by performing additional encoding on enhanced data and transmitting the same.

In order to achieve the above object, a transmission method according to an embodiment of the present invention, a frame for error correction by collecting a row consisting of A (A is a natural number) enhanced data bytes with information (K is a natural number) Forming a; Performing error correction encoding on the frame and dividing the error correction encoded frame into a plurality of subframes; And performing row detection for each subframe and performing error detection encoding on at least one subframe among the subframes on which the row mixing has been performed.

The transmission method according to an embodiment of the present invention further comprises the step of forming an enhanced data group layered into a plurality of areas and inserting and transmitting data of each subframe in the corresponding area according to the characteristics of the layered area. Characterized in that made.

According to another aspect of the present invention, there is provided a transmission method comprising: forming a frame for error correction by collecting K (K is a natural number) rows of A (A is a natural number) enhanced data bytes having information; Parity data is added by performing primary error correction encoding in one of column and row directions on the frame, and parity is performed by performing secondary error correction encoding on the other side of the primary error correction encoded frame. Adding data; And dividing the error corrected encoded frame into a plurality of subframes.

According to still another aspect of the present invention, there is provided a transmission method comprising: forming a frame for error correction by collecting K (K is a natural number) rows including A (A is a natural number) data bytes having information; And adding parity data by performing error correction encoding on the frame in a column direction, and then dividing the error correction encoded frame into a plurality of subframes.

In the transmission method according to the present invention, G (G is a natural number) of the first subframes are collected to form a first subframe group, and then row permutation is performed in units of the first subframe group. The method may further include performing row permutation in units of the second subframe group after forming the second subframe group by collecting two G subframes (G is a natural number).

A transmission system according to an embodiment of the present invention includes a frame encoder for performing error correction encoding on a frame formed for error correction and dividing the error correction encoded frame into a plurality of subframes; A data processing unit constituting an enhanced data group layered into a plurality of areas and inserting and outputting data of the subframe in a corresponding area according to the characteristics of the layered area; And a multiplexer for multiplexing and outputting the input main data and the enhanced data group of the data processor.

According to an embodiment of the present invention, a receiving method includes: checking an error number of a subframe including payload data input for intra-frame encoding; And error correction decoding is performed only on the subframe including the payload data input according to the error number, or does not include the subframe including the payload data input for encoding and the payload data input for encoding. And performing a double error correction decoding by combining subframes which do not.

In the decoding step, when the number of errors of the subframe including the payload data input for the intra-frame encoding is equal to or smaller than a preset number, the erasure error is applied to the subframe including the payload data input for the encoding. RS erasure decoding is performed.

In the decoding step, if the error number of the subframe including the payload data input for the intra-frame encoding is greater than a preset number, the error correction decoding is performed on the subframe including the payload data input for the encoding. step; And a subframe including the payload data input for encoding and the payload data input for encoding, when all of the errors in the subframe including the payload data input for encoding are not corrected. And performing error correction decoding by combining subframes which do not.

According to another embodiment of the present invention, a receiving method includes: performing error correction decoding on the frame using CRC data added to the frame when the number of errors of the frame is less than or equal to a preset number; And performing error correction decoding on the frame by using CRC data of a subframe that does not include payload data input for intra-frame encoding when the number of errors of the frame is greater than a preset number. It is characterized by.

According to another embodiment of the present invention, a receiving method includes: performing error correction decoding on the frame using CRC data added to the frame when the number of errors of the frame is less than or equal to a preset number; And performing error correction decoding on the frame without using the CRC data added to the frame, when the number of errors of the frame is greater than a preset number.

The receiving system according to the present invention includes a block decoder for performing trellis decoding and block decoding if the demodulated data is enhanced data; A data deformatter for performing de-randomizing on the decoded enhanced data; And a subframe including payload data input for encoding in the frame and a subframe not including payload data for encoding, according to whether an error occurred in a frame of the de-randomized enhanced data. And a frame decoder for classifying error correction decoding.

Other objects, features and advantages of the present invention will become apparent from the following detailed description of embodiments taken in conjunction with the accompanying drawings.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings. At this time, the configuration and operation of the present invention shown in the drawings and described by it will be described as at least one embodiment, by which the technical spirit of the present invention and its core configuration and operation is not limited. .

In addition, the terminology used in the present invention is a general term that is currently widely used as much as possible, but in certain cases, the term is arbitrarily selected by the applicant. In this case, since the meaning is described in detail in the description of the present invention, It is intended that the present invention be understood as the meaning of the term rather than the name.

In the present invention, the enhanced data may be data having information such as a program execution file, stock information, or the like, or may be video / audio data. The known data is previously known data by the promise of the transmitting / receiving side. In addition, the main data is data that can be received by the existing receiving system, and includes video / audio data.

According to the present invention, additional encoding is performed on the enhanced data to be transmitted, thereby providing robustness to the enhanced data and strongly responding to a rapidly changing channel environment.

According to an embodiment of the present invention, at least one error correction encoding, error detection encoding, and row permutation is performed on the enhanced data.

1 is a block diagram illustrating a part of a digital broadcast transmission system for error correction encoding according to the present invention, wherein an RS frame encoder 101, an E-VSB processor 102, and a packet multiplexer 103 are shown. It is configured to include).

In the present invention configured as described above, the main data is input to the packet multiplexer 103, and the enhanced data is input to the RS frame encoder 101 which performs additional encoding in order to quickly and strongly respond to noise and channel changes. .

The RS frame encoder 101 receives the enhanced data to form a frame for further encoding, and performs an encoding process such as error correction encoding, error detection encoding, and row mixing on the frame. Output to the VSB processing unit 102. Detailed operations of the encoding process will be described later.

The E-VSB processing unit 102 performs processing such as rendering, data expansion, enhanced data group formation, data deinterleaving, etc. on the enhanced data output from the RS frame encoder 101, and then performs MPEG processing in units of 188 bytes. The packet is output to the packet multiplexer 103 in the form of a TS packet (ie, an enhanced data packet).

That is, as one of the processes of the E-VSB processing unit 102, the E-VSB processing unit 102 forms an enhanced data group layered into a plurality of areas or more, and the characteristics of the layered area and the encoded enhanced data. The encoded enhanced data is inserted in each layered area of the enhanced data group in consideration of the characteristic of.

According to an embodiment of the present invention, an enhanced data group is classified into three layered areas, that is, a head, a body, and a tail area, based on a data configuration before data deinterleaving. As a result, the first output part is the head, the middle output part is the body, and the last output part is the tail, based on the enhanced data group that is data interleaved and output.

In this case, based on the enhanced data group input for data deinterleaving, the head area, the body area, and the tail area of the enhanced data group are not mixed with the main data area but completely composed of the enhanced data. Can be set.

Dividing the enhanced data group into three parts is for different purposes. That is, the area corresponding to the body is composed of enhanced data without interfering with main data in the middle, and thus can show more robust reception performance. The enhanced data of the head and tail areas are mixed with the main data by data interleaving. This is because the reception performance is lower than the body area.

In addition, in the case of applying a system for inserting and transmitting known data into an enhanced data group, when the long data is continuously inserted into the enhanced data periodically, the enhanced data is inserted into a body region not mixed with the main data. It is possible to. That is, it is possible to periodically insert known data of a predetermined length into the body region. However, it is difficult to periodically insert known data into the head and tail regions, and also to insert long known data continuously.

Meanwhile, the packet multiplexer 103 multiplexes the input enhanced data packet and the main data packet according to a predefined multiplexing method.

The following is a detailed operation of the encoding process of the RS frame encoder 101.

The present invention will be described by dividing the encoding process for the enhanced data into the first and second embodiments.

First Embodiment

According to the first embodiment of the present invention, the primary error correction encoding is performed in the column direction with respect to the input enhanced data, and the secondary error correction encoding is performed in the row direction with respect to the primary error correction encoded data. Gives robustness to the data. In this case, the present invention may perform first order error correction coding in the row direction and second order error correction coding in the column direction.

Subsequently, a row permutation process and an error detection encoding process of mixing the enhanced data of a predetermined size with respect to the secondary error correction encoded enhanced data are sequentially performed. The row mixing is extremely poor by disturbing the clustering errors that may occur due to the change in the propagation environment, and is intended to cope with the propagation environment that changes rapidly.

2A to 2E are diagrams for describing an error correction encoding process according to a first embodiment of the present invention.

In the first embodiment of the present invention, the input enhanced data is divided into predetermined length (A) units, and a plurality of enhanced data having a predetermined length (A) are collected to form an RS frame, and then a column is configured for the RS frame. First order error correction coding is performed in the direction to add parity data in the column direction. Subsequently, secondary error correction encoding is performed in the row direction on the enhanced data having the parity added in the column direction to add parity data in the row direction.

In the present invention, the predetermined length (A) unit is called a row for convenience of description, and the A value is determined by the system designer. In the embodiment, the error correction encoding is applied to RS encoding.

For example, if the input enhanced data is an MPEG transport stream (TS) packet composed of 188 byte units, the first MPEG sync byte is removed as shown in FIG. 2 (a) and 187 bytes as shown in FIG. This constitutes one row (A). The reason for removing the MPEG sync byte is that all enhanced data packets have the same value.

If there is no fixed byte that can be removed from the input enhanced data or if the length of the input packet is not 187 bytes, the input data is divided by 187 bytes, and the row is divided into 187 bytes. Configure

When row A is determined by the above process, a plurality of rows A are collected to form an RS frame. According to an embodiment of the present invention, as shown in FIG. 2C, 67 rows are collected to form one RS frame.

Then, Nc-Kc parity bytes are generated by performing (Nc, Kc) -RS encoding on each column of the RS frame, and then adding them to the last part of the column (ie, after the 67th row of the column). In this embodiment, Nc is 85 and Kc is 67. Then, as shown in Fig. 2D, the parity data added to each column becomes 18 bytes.

When the (85,67) -RS encoding process is performed on all 187 columns in one RS frame, one row is composed of 187 bytes, and one column is obtained by an RS frame composed of 85 bytes. That is, an RS frame obtained after the first error correction encoding is equivalent to 85 rows of 187 bytes. In other words, all 187 columns of the RS frame contain 85 bytes.

Subsequently, as illustrated in (d) of FIG. 2, Nr-Kr parity bytes are generated by performing (Nr, Kr) -RS encoding on each row of the RS-coded RS frame in the column direction, and then the last part of the row (ie, , After 187th column of the row). In one embodiment, Nr is 201 and Kr is 187. Then, as shown in (e) of FIG. 2, the parity data added to each row is 14 bytes.

When the (201,187) -RS encoding process is performed for all 85 rows in an RS frame, one row is composed of 201 bytes, and one column is composed of 85 bytes of RS frames. That is, an RS frame obtained after the second error correction encoding is equivalent to 85 rows of 201 bytes.

At this time, in the first embodiment of the present invention, the number of bytes constituting one row, the number of rows constituting the RS frame, and the values of Nr, Nc, Kr, and Kc used for RS encoding may vary according to system design and situation. The present invention will not be limited to the above-described embodiment as it is a value.

Meanwhile, according to the present invention, row permutation may be performed on primary and secondary RS encoded enhanced data. Performing the low mixing obscures the clustering error that may occur due to the change in the propagation environment, thereby making it possible to cope with the propagation environment which is extremely poor and changes rapidly.

That is, in the present invention, an RS frame of second error correction coding, that is, an RS frame having 85 201 byte rows is divided into two RS subframes.

In one embodiment, in the present invention, the enhanced data (that is, payload data) input to the RS frame encoder 101 for RS encoding and the parity data generated by column-wise RS encoding are combined to be referred to as a first RS subframe. The parity data generated by the row direction RS encoding is referred to as a second RS subframe.

Accordingly, the first RS subframe consists of 85 187 bytes and the second RS subframe consists of 85 14 bytes.

Row mixing is performed on the divided first and second RS subframes, respectively.

FIG. 3A illustrates a row mixing process of the first RS subframe, and FIG. 3B illustrates a row mixing process of the second RS subframe.

First, a row mixing process of the first RS subframe illustrated in FIG. 3A will be described. That is, G first RS subframes having one row of 187 bytes and one column of 85 bytes are collected to form a first RS subframe group including a total of 85 * G 187 byte rows.

When the row mixing process is performed on the first RS subframe group configured as described above, the positions of the rows before and after the row mixing in the first RS subframe group are changed as shown in FIG. 3A. That is, the i-th row of the first RS subframe group before row mixing is located in the j-th row of the same first RS subframe group after the row mixing process is performed. This relationship between i and j can be seen through Equation 1 below.

Even after the row mixing process is performed, each row of the first RS subframe group includes 187 bytes.

Meanwhile, a row mixing process of the second RS subframe illustrated in FIG. 3B will be described. That is, G second RS subframes having one row of 14 bytes and one column of 85 bytes are collected to form a second RS subframe group including a total of 85 * G 14 byte rows.

When the row mixing process is performed for the second RS subframe group configured as described above, the rows before and after the row mixing in the second RS subframe group are changed as shown in FIG. 3B. That is, the i-th row of the second RS subframe group before row mixing is located in the j-th row of the same second RS subframe group after the row mixing process is performed. Similarly, even after the row mixing process is performed, each row of the second RS subframe group includes 14 bytes.

The relationship between i and j of the second RS subframe group may be applied to Equation 1 as it is or another row mixing method.

That is, Equation 1 is an embodiment of the row mixing method, and the row mixing method may be any method that allows i, j to include all the rows of the frame group. Therefore, the present invention will not be limited to the above described embodiment. In addition, in the equation used for row mixing of the first and second RS subframe groups, the two RS subframe groups may use the same, and it is also possible to use two different methods.

In addition, the present invention may perform an error detection encoding process on the first RS subframe group in which row mixing is performed. The error detection encoding process is used to inform whether or not data of the first RS subframe group is damaged by an error while being transmitted to a receiving system through a channel.

In the embodiment, the error detection encoding may apply CRC encoding, and may use other error detection encoding methods other than CRC encoding, or may improve the overall error correction capability at the receiving end by using an error correction encoding method. .

4A to 4C illustrate embodiments of a CRC encoding process according to the present invention. That is, the CRC data generated by the CRC encoding is used to inform whether enhanced data is damaged by an error while being transmitted through a channel.

4A shows an example of using an 8-bit CRC checksum as CRC data, generating one byte (ie, 8-bit) CRC checksum for 187 bytes of each row in the second RS subframe group, and FIG. To the row.

Equation 2 below shows an example of a polynomial that generates a one-byte CRC checksum for 187 bytes.

g (x) = x ⁸ + x ² + x ¹ + 1

In this case, the position of adding the 1-byte CRC checksum may be any position in the row. In an embodiment of the present invention, the row is configured to be 188 bytes in addition to the end of the row.

4B and 4C show an example of using a 16-bit CRC checksum as CRC data. A 2 byte (ie, 16-bit) CRC checksum is generated in units of two rows and added to the row.

Equation 3 below shows an example of a polynomial that generates a 2-byte CRC checksum for two rows, 374 bytes.

^{g (x) = x 16 +} x 12 + x 5 + 1

In this case, the position of adding the 2-byte CRC checksum may be any position in the two rows. The 2-byte CRC checksum may be added to a predetermined position in the two rows, and then divided into two rows of 188 bytes.

4B shows an example of configuring two rows of 188 bytes by adding a 1 byte CRC checksum to each end of each of the two rows.

4C shows an example of configuring two rows of 188 bytes after adding a 2-byte CRC checksum to the end of the second of the two rows.

Through the aforementioned CRC encoding process, the first RS subframe group is extended from an RS subframe group having 85 * G 187 byte rows to an RS subframe group having 85 * G 188 byte rows.

The first RS subframe group on which the CRC encoding is performed is further divided into G first RS subframes, and the second RS subframe group on which row mixing is performed is further divided into G second RS subframes. It is input to the VSB processing unit 102.

FIG. 5A illustrates a structure of a first RS subframe input to the E-VSB processor 102 by sequentially performing RS encoding, row mixing, and CRC encoding, and having 85 rows of 188 bytes. It is as configured.

FIG. 5B shows the structure of the second RS subframe inputted to the E-VSB processor 102 by performing error correction encoding and row mixing, which is equivalent to 85 rows of 14 bytes.

The E-VSB processor 102 considers the first and second RS subframes in the enhanced data group in consideration of the characteristics of the layered region in the enhanced data group and the characteristics of the first and second RS subframes. Assign to the area.

In the present invention, the first RS subframe in which the CRC encoding is performed is allocated to a body region in an enhanced data group, and the second RS subframe in which row mixing is performed is allocated to a head and / or tail region. It is set as an Example. That is, data of the first RS subframe is inserted and transmitted in the body region, and data of the second RS subframe is inserted and transmitted in the head and / or tail region.

Second Embodiment

In the second embodiment of the present invention, error correction encoding is performed in the column direction on the input enhanced data to provide robustness to the enhanced data.

Subsequently, a row permutation process and an error detection encoding process of mixing the enhanced data of a predetermined size with respect to the error correction encoded enhanced data are sequentially performed. The row mixing is extremely poor by disturbing the clustering errors that may occur due to the change in the propagation environment, and is intended to cope with the propagation environment that changes rapidly.

6A to 6E are diagrams for describing an error correction encoding process according to a second embodiment of the present invention.

Similarly, the second embodiment of the present invention divides the input enhanced data into units of a predetermined length (A), collects a plurality of divided pieces of enhanced data of a predetermined length (A), and configures an RS frame. Error correction coding is performed in the column direction to add parity data in the column direction.

In the present invention, the predetermined length (A) unit is referred to as a row (row) for convenience of description, A value is determined by the system designer. In the embodiment, the error correction encoding is applied to RS encoding.

For example, if the input enhanced data is an MPEG transport stream (TS) packet configured in units of 188 bytes, the first MPEG sync byte is removed as shown in FIG. 6 (a) and 187 bytes as shown in FIG. 6 (b). This constitutes one row (A).

If there is no fixed byte that can be removed from the input enhanced data or if the length of the input packet is not 187 bytes, the input data is divided by 187 bytes, and the row is divided into 187 bytes. Configure

When row A is determined by the above process, a plurality of rows A are collected to form an RS frame. According to an embodiment of the present invention, as shown in FIG. 6C, 67 rows are collected to form one RS frame.

Then, N-K parity bytes are generated by performing (N, K) -RS encoding on each column of the RS frame, and then added to the last part of the corresponding column (ie, after the 67th row of the corresponding column). In this embodiment, N is 91 and K is 67. Then, as shown in Fig. 6D, the parity data added to each column is 24 bytes.

When the (91,67) -RS encoding process is performed for all 187 columns in one RS frame, one row is composed of 187 bytes, and one column is obtained of an RS frame composed of 91 bytes. That is, the RS frame obtained after the error correction encoding is equivalent to 91 rows of 187 bytes. In other words, all 187 columns of the RS frame contain 91 bytes.

In the second embodiment of the present invention, likewise, the number of bytes constituting one row, the number of rows constituting the RS frame, and the N and K values used for RS encoding are values that may vary depending on the system design and the situation. The invention will not be limited to the embodiments described above.

Meanwhile, the present invention may perform row permutation on the RS encoded enhanced data as described above. Performing the low mixing obscures the clustering error that may occur due to the change in the propagation environment, thereby making it possible to cope with the propagation environment which is extremely poor and changes rapidly.

That is, in the present invention, an RS frame encoded with error correction, that is, an RS frame having 91 187 byte rows, is divided into two RS subframes.

In one embodiment of the present invention, rows of enhanced data (ie, payload data) and some parity rows input for RS encoding, for example, 18 out of 24 parity generated by column-oriented RS encoding. The rows including the parity are collectively called a first RS subframe, and the rows including the remaining six parities are called a second RS subframe.

Accordingly, the first RS subframe consists of 85 187 bytes and the second RS subframe consists of six 187 bytes, as shown in FIG.

Row mixing is performed on the divided first and second RS subframes, respectively.

FIG. 7A illustrates a row mixing process of a first RS subframe according to a second embodiment of the present invention, and FIG. 7B illustrates a row mixing process of a second RS subframe according to a second embodiment of the present invention.

The row mixing process of the first RS subframe illustrated in FIG. 7A may be equally applicable to the row mixing process of the first RS subframe described in the first embodiment of the present invention, and thus detailed description thereof will be omitted.

Meanwhile, a row mixing process of the second RS subframe illustrated in FIG. 7B will be described. That is, G second RS subframes of which one row is 187 bytes and one column is 6 bytes are collected to form a second RS subframe group including a total of 6 * G 187 byte rows.

When the row mixing process is performed for the second RS subframe group configured as described above, the positions of the rows before and after the row mixing in the second RS subframe group are changed as shown in FIG. 7B. That is, the i-th row of the second RS subframe group before row mixing is located in the j-th row of the same second RS subframe group after the row mixing process is performed. Similarly, even after the row mixing process is performed, each row of the second RS subframe group includes 187 bytes. And the relationship between the i and j can be seen through the following equation (4).

Equation 4 is also an embodiment of the row blending method, and the row blending method may be any method that allows i, j to include all rows of a frame group. Therefore, the present invention will not be limited to the above described embodiment. In the second embodiment of the present invention, the formula used for row mixing of the first and second RS subframe groups may be the same for the two RS subframe groups, or two different methods may be used. Do.

In addition, the present invention may perform an error detection encoding process on the first and second RS subframe groups in which row mixing is performed. The error detection encoding process is used to inform whether the data of the first and second RS subframe groups are damaged by an error while being transmitted to a receiving system through a channel.

In the embodiment, the error detection encoding may apply CRC encoding, and may use other error detection encoding methods other than CRC encoding, or may improve the overall error correction capability at the receiving end by using an error correction encoding method. .

In the CRC encoding process for the first and second RS subframe groups, the CRC encoding process described in the first embodiment of the present invention may be applied as it is, and thus detailed description thereof will be omitted.

The first RS subframe group subjected to the CRC encoding process is extended from an RS subframe group having 85 * G 187 byte rows to an RS subframe group having 85 * G 188 byte rows. In addition, the second RS subframe group subjected to the CRC encoding process is also extended from an RS subframe group having 6 * G 187 byte rows to an RS subframe group having 6 * G 188 byte rows.

FIG. 8A illustrates a structure of a first RS subframe input to the E-VSB processor 102 by sequentially performing RS encoding, row mixing, and CRC encoding, and having 85 rows of 188 bytes. It is as configured.

8B illustrates a structure of a second RS subframe inputted to the E-VSB processing unit 102 by sequentially performing error correction encoding, row mixing, and CRC encoding. It is like a dog.

The E-VSB processor 102 considers the first and second RS subframes in the enhanced data group in consideration of the characteristics of the layered region in the enhanced data group and the characteristics of the first and second RS subframes. Assign to the area.

Similarly, in the second embodiment of the present invention, the first RS subframe is allocated to the body region in the enhanced data group, and the second RS subframe is allocated to the head and / or tail region. That is, data of the first RS subframe is inserted and transmitted in the body region, and data of the second RS subframe is inserted and transmitted in the head and / or tail region.

In the first and second embodiments of the present invention described above, each code rate of the column direction RS code rate and the row direction RS code rate can be used in any combination that matches the configuration of the system. It is also possible to use error correction coding.

In addition, when performing row mixing, the size of RS subframes before and after row mixing is not necessarily the same, and only the number of all rows in the RS subframe group before and after row mixing need to match. That is, if the RS subframe size before row blending is G and the number of rows of one RS subframe is N, the number of RS subframes after row blending is 2N and the number of rows of one RS subframe is G / 2 (G Is an even number). Therefore, each RS subframe size before and after row mixing may be determined by the system designer as an arbitrary size.

9 to 11 illustrate embodiments of a digital broadcast transmission system including the aforementioned RS frame encoder.

The digital broadcast transmission system of FIG. 9 includes an E-VSB preprocessor 510, a packet multiplexer 521, a data randomizer 522, an RS encoder / Non-systematic RS. An encoder 523, a data interleaver 524, a parity substituent 525, an unstructured RS encoder 526, a trellis encoder 527, a frame multiplexer 528, and a transmitter 530. It is composed.

The E-VSB preprocessor 510 includes an RS frame encoder 511, an E-VSB renderer 512, an E-VSB block processor 513, a group formatter 514, a data deinterleaver 515, and a packet. And includes a formatter 516. That is, the E-VSB renderer 512, the E-VSB block processor 513, the group formatter 514, the data deinterleaver 515, and the packet formatter 516 are the E-VSB processor 102 of FIG. 1. Corresponds to

In the present invention configured as described above, the main data is input to the packet multiplexer 521, and the enhanced data is sent to the E-VSB preprocessor 510 which performs additional encoding to quickly and powerfully respond to noise and channel changes. Is entered.

The RS frame encoder 511 of the E-VSB preprocessor 510 performs an RS encoding process and row permutation on the enhanced data input as in the first or second embodiment described above. The process is performed sequentially, and if necessary, the CRC encoding process is performed and then output to the E-VSB renderer 512.

That is, in the first embodiment of the present invention, the primary RS encoding is performed in the column direction on the RS frame formed for error correction, and the secondary RS encoding is performed in the row direction on the result. The RS-coded RS frames are divided into first and second RS subframes, and row mixing is performed, respectively, and then CRC coding is performed on only the first RS subframe and output to the E-VSB renderer 512 (FIG. 2 to 5).

In the second embodiment of the present invention, RS coding is performed in a column direction on an RS frame formed for error correction, and row mixing is performed by dividing the RS-coded RS frame into first and second RS subframes. . CRC coding is performed on the first and second RS subframes in which row mixing is performed and output to the E-VSB renderer 512 (see FIGS. 6 to 8).

The E-VSB renderer 512 receives the enhanced data having increased robustness through the encoding process as described in the first and second embodiments, and renders the received data to the E-VSB block processor 513. In this case, the E-VSB renderer 512 performs the rendering on the enhanced data, so that the rendering process of the enhanced data may be omitted in the later renderer 522. The enhanced data generator may use the same as the conventional ATSC's renderer, or may use another renderer. For example, the input enhanced data may be randomized using pseudo random bytes generated internally.

The E-VSB block processor 513 encodes the enhanced data at M / N code rate and outputs the encoded data to the group formatter 514. For example, if 1 bit of enhanced data is encoded into 2 bits and outputted, M = 1 and N = 2. If 1 bit of enhanced data is encoded into 4 bits and outputted, M = 1 and N = 4.

In this case, the E-VSB renderer 512 and the E-VSB block processor 513 process the same E-data in processing the enhanced data corresponding to two subframes divided into a first RS subframe and a second RS subframe. A VSB renderer or an E-VSB block processor may be used, or a separate E-VSB renderer or an E-VSB block processor may be used. 9 shows an example of using the same E-VSB renderer and the E-VSB block processor.

The group formatter 514 forms an enhanced data group as described above, and inserts the enhanced data input in the corresponding region in the formed enhanced data group and outputs the enhanced data to the data deinterleaver 515.

FIG. 12A illustrates a form in which data before data deinterleaving is listed separately, and FIG. 12B illustrates a form in which data after data deinterleaving is classified and listed.

In other words, FIG. 12A is a form of data after data interleaving, and FIG. 12B is a form of data before data interleaving.

FIG. 12A illustrates an example of dividing an enhanced data group into three layered areas, that is, a head, a body, and a tail area in a data configuration before data deinterleaving. As a result, the first output part is the head, the middle output part is the body, and the last output part is the tail, based on the enhanced data group that is data interleaved and output.

12A and 12B show an example in which 260 packets form an enhanced data group. This shows that the data interleaver operates periodically in units of 52 packets so that five multiples of 52 packets form an enhanced data group.

In addition, when the enhanced data group is input to the data deinterleaver as shown in FIG. 12A, the body region is not mixed with the main data region in the middle of the enhanced data group so that the body region is composed entirely of the enhanced data. This is an example of setting the body and tail area.

In an embodiment, the group formatter 514 inserts data of a first RS subframe encoded and input at an M / N code rate into a body region of the enhanced data group, and data of a second RS subframe. Insert into the head and / or tail area.

In addition, the group formatter 514 allocates signaling information indicating overall transmission information to the body region separately from the enhanced data. That is, the signaling information is information necessary for receiving and processing data included in the enhanced data group in a receiving system, and may include enhanced data group information, multiplexing information, and the like.

In addition, the group formatter 514 inserts an MPEG header position holder, an unstructured RS parity position holder, and a main data position holder in relation to data deinterleaving as shown in FIG. 12A. The reason for assigning the main data position is that the enhanced data and the main data are mixed between the head and tail regions based on the input of the data deinterleaver as shown in FIG. 12A. The position holder for the MPEG header is assigned to the beginning of each packet, based on the output data after the data deinterleaving.

The group formatter 514 inserts known data generated by a predetermined method into the corresponding area, or inserts a known data position holder into the corresponding area for inserting the known data later. Also, the position holder for initializing the trellis encoder 527 is inserted into the corresponding region. In one embodiment, the initialization data location holder may be inserted before the known data sequence.

As described above, the enhanced data group into which the data or position holder is inserted in the group formatter 514 is input to the data deinterleaver 515.

The data deinterleaver 515 deinterleaves the input enhanced data group in a reverse process of data interleaving and outputs the deinterleaved data to the packet formatter 516. That is, when an enhanced data group of the type shown in FIG. 12A is input, it is deinterleaved as shown in FIG. 12B and output to the packet formatter 516. 12B shows only the parts related to the enhanced data group.

The packet formatter 516 removes the main data position holder and the RS parity position holder which have been allocated for deinterleaving among the deinterleaved input data, collects the remaining portions, and then stores an MPEG header in a 4-byte MPEG header position holder. Replace it.

Also, the packet formatter 516 may insert and replace the known data in the known data position holder when the known data position holder is inserted in the group formatter 514, or the known data position for replacement insertion later. The holder can also be output without adjustment.

The packet formatter 516 then configures the data in the packet-formatted enhanced data group as MPEG TS packets in units of 188 bytes as described above, and provides them to the packet multiplexer 521.

The packet multiplexer 521 multiplexes the enhanced data packet and the main data packet in units of 188 bytes, which are output from the packet formatter 516, to the data randomizer 522 by multiplexing the same according to a predefined multiplexing method. The multiplexing method can be adjusted by various parameters of the system design.

As one of the multiplexing methods of the packet multiplexer 521, the enhanced data burst section and the main data section may be divided on the time axis, and the two sections may be alternately repeated. In this case, at least one enhanced data group may be transmitted in the enhanced data burst section and only main data may be transmitted in the main data section. The main data may be transmitted in the enhanced data burst period.

As described above, when the enhanced data is transmitted in a burst structure, the receiving system receiving only the enhanced data turns on the power only in the burst period to receive the data, and turns off the power in the main data section in which only the main data is transmitted. By not receiving, the power consumption of the receiving system can be reduced.

If the input data is a main data packet, the data randomizer 522 performs rendering in the same manner as the existing one. That is, the MPEG sync byte in the main data packet is discarded and the remaining 187 bytes are randomly generated using a pseudo random byte generated internally, and then output to the RS encoder / unstructured RS encoder 523.

However, if the input data is an enhanced data packet, the MPEG sync byte is discarded among the 4 byte MPEG headers included in the enhanced data packet, and only the remaining 3 bytes are rendered, and the rest of the enhanced data except the MPEG header is performed. The RS is output to the RS encoder / unstructured RS encoder 523 without performing any rendering. This is because the E-VSB renderer 512 performs rendering on the enhanced data in advance. Rendering may or may not be performed on the known data (or known data location holder) and the initialization data location holder included in the enhanced data packet.

The RS encoder / unstructured RS encoder 523 adds 20 bytes of RS parity by performing RS encoding on the data to be rendered or bypassed by the data randomizer 522, and then the data interleaver 524. Will output In this case, the RS encoder / unstructured RS encoder 523 adds 20 bytes of RS parity to 187 bytes of data after performing systematic RS encoding in the same manner as the existing ATSC VSB system when the input data is a main data packet. In the case of an enhanced data packet, a 20-byte RS parity obtained by performing unsystematic RS encoding is inserted at a parity byte position determined in the packet.

The data interleaver 524 is a convolutional interleaver in bytes.

The output of the data interleaver 524 is input to a parity substituent 525 and an unstructured RS encoder 526.

On the other hand, in order to make the output data of the trellis encoder 527 located at the rear end of the parity substituent 525 into known data defined by appointment on the transmission / reception side, the memory in the trellis encoder 527 is first initialized. Is needed. That is, before the input known data string is trellis encoded, the memory of the trellis encoder 527 must be initialized.

At this time, the beginning of the known data string input is not the actual known data but the initialization data position holder included in the group formatter 514. Therefore, it is necessary to generate the initialization data immediately before the input known-data sequence is Trellis-coded and to replace it with the corresponding Trellis-memory initialization data location holder.

The trellis memory initialization data is generated based on a value determined according to the memory state of the trellis encoder 527. Also, a process of recalculating RS parity due to the substituted initialization data and replacing the RS parity with the RS parity output from the data interleaver 524 is required.

Accordingly, the unstructured RS encoder 526 receives an enhanced data packet including an initialization data position holder to be replaced with initialization data from the data interleaver 524 and inputs initialization data from the trellis encoder 527. Receive. The initialization data position holder of the input enhanced data packet is replaced with initialization data, the RS parity data added to the enhanced data packet is removed, and a new unsystematic RS parity is calculated and output to the parity substituter 525. The parity substituent 525 then selects the output of the data interleaver 524 for the data in the enhanced data packet, and the trellis encoder 527 for the RS parity by selecting the output of the unstructured RS encoder 526. Will output

Meanwhile, when the main data packet is input or an enhanced data packet including an initialization data position holder to be replaced is input, the parity substituter 525 selects data and RS parity output from the data interleaver 524 as it is. Output to trellis encoder 527.

The trellis encoder 527 converts the data of the byte unit into the symbol unit, performs 12-way interleaving, trellis-encodes, and outputs the trellis to the frame multiplexer 528.

The frame multiplexer 528 inserts field synchronization and segment synchronization into the output of the trellis encoder 527 and outputs them to the transmitter 530.

The transmitter 530 includes a pilot inserter 531, a VSB modulator 532, and an RF up-converter 533. Since the transmitter 530 has the same role as a conventional VSB transmitter, detailed description thereof will be omitted.

The digital broadcast transmission system of FIG. 10 includes an E-VSB preprocessor 610, a packet multiplexer 521, a data randomizer 522, an RS encoder / Non-systematic RS. An encoder 523, a data interleaver 524, a parity substituent 525, an unstructured RS encoder 526, a trellis encoder 527, a frame multiplexer 528, and a transmitter 530. It is composed.

The E-VSB preprocessor 610 may include an RS frame encoder 611, a randomizer / byte expander 612, a group formatter 613, an E-VSB block processor 614, a data deinterleaver 615, and a packet formatter. And 616. That is, the randomizer / byte expander 612, the group formatter 613, the E-VSB block processor 614, the data deinterleaver 615, and the packet formatter 616 are provided to the E-VSB processor 102 of FIG. 1. Yes.

The digital broadcast transmission system of FIG. 10 differs from the digital broadcast transmission system of FIG. 9 in the arrangement order of the group formatter and the E-VSB block processor.

In FIG. 9, the group formatter 514 is positioned after the E-VSB block processor 513, whereas in FIG. 10, the E-VSB block processor 614 is positioned after the group formatter 613.

That is, in the digital broadcast transmission system of FIG. 10, since the group formatter 613 is located before the E-VSB block processor 614, the E-VSB before the group formatter 613 for the smooth operation of the group formatter 613. In order to cope with the encoding of the block processing unit 614, it is necessary to extend the byte. Accordingly, in the digital broadcast transmission system of FIG. 10, the randomizer / byte expander 612 performs byte expansion through null data insertion as well as randomization.

On the other hand, in the transmission system of FIG. 9, the E-VSB block processor 513 is provided before the group formatter 514, and is directly extended by encoding of the E-VSB block processor 513. Therefore, a separate byte expansion process is required. You will not. Therefore, in FIG. 9, only randomization is performed on the enhanced data, and no byte expansion is performed.

Next, only a part of the E-VSB preprocessor 610 of FIG. 10 will be described in detail, and other blocks (ie, 521 to 528 and 530) may be referred to the aforementioned FIG. 9, and thus a detailed description thereof will be omitted.

That is, the enhanced data is input to the E-VSB preprocessor 610 which performs additional encoding in order to respond quickly and strongly to noise and channel changes.

The RS frame encoder 611 of the E-VSB preprocessor 610 receives the enhanced data, constructs a frame for additional encoding and performs encoding as in the first and second embodiments described above. The output is then sent to the randomizer / byte expander 612.

The randomizer / byte expander 612 receives enhanced data having increased robustness through an encoding process and performs byte expansion through randomization and null data insertion.

In this case, by performing the randomization on the enhanced data in the randomizer / byte expander 612, the subsequent randomizer 522 may omit the randomizing process on the enhanced data. The enhanced data generator may use the same as the conventional ATSC's renderer, or may use another renderer.

In addition, the rendering process and the byte expansion process may be performed in a reversed order. That is, as described above, the byte expansion may be performed after rendering, and conversely, after the byte expansion, the rendering may be performed, which may be selected in consideration of the overall system.

The byte extension may vary depending on the code rate of the E-VSB block processor 614. That is, if the code rate of the E-VSB block processing unit 614 is M / N code rate, the byte expander expands M bytes to N bytes. For example, if the code rate is 1/2 code rate, 1 byte is extended to 2 bytes, and if the code rate is 1/4, 1 byte is extended to 4 bytes.

The enhanced data output from the randomizer / byte expander 612 is input to the group formatter 613.

The group formatter 613 forms an enhanced data group as described with reference to FIGS. 9, 12A, and 12B, and inserts enhanced data input in a corresponding region of the formed enhanced data group. Detailed operations of the group formatter 613 may be omitted by referring to FIGS. 9, 12A, and 12B.

The enhanced data group into which the data or position holder is inserted in the group formatter 613 is input to the E-VSB block processor 614.

The E-VSB block processor 614 performs additional encoding only on the enhanced data output from the group formatter 613. For example, if the randomizer / byte expander 612 extends 1 byte into 2 bytes, the E-VSB block processing unit 614 encodes the enhanced data at 1/2 code rate, and 1 If the byte is extended to 4 bytes, encoding is performed at the 1/4 code rate. The MPEG header position holder, the main data position holder, and the RS parity position holder are output without change.

In addition, the known data (or known data position holder) and the initialization data position holder may be output as they are without changing the data, or may be replaced with the known data generated by the E-VSB block processor 614 and output.

The data encoded, replaced, and bypassed by the E-VSB block processor 614 is input to the data deinterleaver 615, and the data deinterleaver 615 decodes the input data in a reverse process of the data interleaver 524. Interleaves and outputs the packet formatter 616.

The packet formatter 616 removes the main data position holder and the RS parity position holder which have been allocated for deinterleaving among the deinterleaved input data, collects the remaining portions, and then stores the MPEG headers in the 4-byte MPEG header position holder. Replace with.

The packet formatter 616 configures packet-formatted data into MPEG TS packets in units of 188 bytes and provides them to the packet multiplexer 521.

The packet multiplexer 521 multiplexes the enhanced data packet and the main data packet in units of 188 bytes output from the packet formatter 616 and outputs the multiplexed data packet to the data randomizer 522. The packet multiplexing method and a detailed operation description thereafter will be omitted since referring to FIG. 9.

The digital broadcast transmission system of FIG. 11 includes an E-VSB preprocessor 710, a packet multiplexer 521, a data randomizer 522, an E-VSB post processor 730, and an RS encoder. RS encoder / Non-systematic RS encoder 523, data interleaver 524, parity substituter 525, unsystematic RS encoder 526, trellis encoder 527, frame multiplexing It comprises a firearm 528, and a transmitter 530.

The E-VSB preprocessor 710 includes an RS frame encoder 711, a randomizer / byte expander 712, a group formatter 713, a data deinterleaver 714, and a packet formatter 715. That is, the randomizer / byte expander 712, the group formatter 713, the data deinterleaver 714, and the packet formatter 715 correspond to the E-VSB processor 102 of FIG. 1.

The E-VSB post processor 730 includes an RS parity position holder inserter 731, a data interleaver 732, an E-VSB block processor 733, a data deinterleaver 734, and an RS parity position holder remover 735. It is configured to include).

That is, except for the E-VSB block processor 614 from the E-VSB preprocessor 610 of FIG. 10, the E-VSB preprocessor of FIGS. 10 and 11 performs the same operation as the same configuration.

11 further includes an E-VSB post-processing unit 730 including the E-VSB block processing unit 733.

A packet multiplexer 521 and a data randomizer 522 provided between the E-VSB preprocessor 710 and the E-VSB postprocessor 730 are provided at the rear end of the E-VSB postprocessor 730. RS encoder / Non-systematic RS encoder 523, data interleaver 524, parity substituent 525, unstructured RS encoder 526, trellis encoder 527 Since the frame multiplexer 528 and the transmitter 530 perform the same configuration and operation as those of FIG. 9, a detailed description thereof will be omitted.

In FIG. 11, since a block using the same name as the configuration block of FIG. 9 or FIG. 10 may be referred to FIG. 9 or FIG. 10, detailed description thereof will be omitted and only the E-VSB post-processing unit 730 will be described in detail.

That is, the data to be rendered or bypassed by the data randomizer 522 is input to the RS parity position holder inserter 731 of the E-VSB post-processor 730.

The RS parity position holder inserter 731 inserts a 20-byte RS parity position holder after 187 bytes of data and outputs the data to the data interleaver 732 when the input data is a 187-byte main data packet. If the input data is an 187-byte enhanced data packet, a 20-byte RS parity position holder is inserted into the packet for unsystematic RS encoding to be performed later, and the bytes of the enhanced data packet are inserted into the remaining 187 byte positions. The data is output to the data interleaver 732.

The data interleaver 732 performs data interleaving on the output of the RS parity position holder inserter 731 and outputs the data to the E-VSB block processor 733.

The E-VSB block processor 733 performs additional encoding only on the enhanced data output from the data interleaver 732. As an example, if the randomizer / byte expander 712 extends 1 byte into 2 bytes, the E-VSB block processor 733 performs encoding at 1/2 code rate on the enhanced data, and 1 If the byte is extended to 4 bytes, encoding is performed at the 1/4 code rate. The main data or RS parity position holder is bypassed as it is. The known data and the initialization data position holder are bypassed as they are, and in the case of the known data position holder, the known data and the initialization data position holder may be replaced with the known data generated by the E-VSB block processing unit 733 and output.

The data encoded, replaced, and bypassed by the E-VSB block processor 733 is input to the data deinterleaver 734, and the data deinterleaver 734 is inputted to the input data in a reverse process of the data interleaver 732. The data is deinterleaved and then output to the RS parity position holder remover 735.

The RS parity position holder remover 735 removes the 20-byte RS parity position holder added by the RS parity position holder inserter 731 for operation of the data interleaver 732 and the data deinterleaver 734. Output to encoder / unstructured RS encoder 523. At this time, if the input data is the main data packet, the RS parity position holders of the last 20 bytes of the 207 bytes are removed, and if the enhanced data packet is the 20-byte RS parity position inserted to perform unsystematic RS encoding of the 207 bytes, Remove the holders.

The main data sequentially passes through the RS parity position holder inserter 731, the data interleaver 732, the E-VSB block processor 733, the data deinterleaver 734, and the RS parity position holder remover 735. This is the same as the main data when inputted to the RS parity position holder inserter 731.

The above-described digital broadcast transmission system of FIGS. 9 to 11 are only embodiments for better understanding of the present invention, and the present invention may be any transmission system capable of performing additional error correction encoding on enhanced data. It is possible. Therefore, the present invention will not be limited to what is presented in the embodiments described above.

Meanwhile, in the transmission system of FIG. 9, the E-VSB renderer 512 may be located in front of the RS frame encoder 511. Also in the transmission system of FIG. 10 or 11, only the functions of the E-VSB renderer in the E-VSB renderer and the byte expander 612 or 712 may be located in front of the RS frame encoder. In this case, in the receiver as shown in FIG. 13, the E-VSB de-randomizer function included in the E-VSB data deformatter 806 is located after the RS frame decoder 807. In the transmission system of FIG. 9, 10, or 11, the MPEG frame performed by the RS frame encoder 511, 611 or 711 when the E-VSB preprocessor 510, 610 or 710 is located at the front end of the E-VSB preprocessor. The function of eliminating sync bytes may be performed in the E-VSB renderer.

FIG. 13 is a block diagram illustrating an embodiment of a digital broadcast reception system for receiving, demodulating, and equalizing data transmitted from a digital broadcast transmission system and restoring original data.

The digital broadcast receiving system of FIG. 13 includes a tuner 801, a demodulator 802, an equalizer 803, a known data detector 804, an E-VSB block decoder 805, and an E-VSB data deformatter 806. And an RS frame decoder 807, a data deinterleaver 808, an RS decoder 809, and a derandomizer 810.

That is, the tuner 801 tunes the frequency of a specific channel, down-converts the intermediate frequency (IF) signal, and outputs the demodulator 802 and the known data detector 804.

The demodulator 802 performs automatic gain control, carrier recovery, and timing recovery on the input IF signal to generate a baseband signal and outputs the same to the equalizer 803 and the known data detector 804.

The equalizer 803 compensates for the distortion on the channel included in the demodulated signal and outputs it to the E-VSB block decoder 805.

At this time, the known data detector 804 detects the position of the known data inserted by the transmitting side from the input / output data of the demodulator 802, that is, the data before the demodulation is performed or the data after the demodulation is performed. The symbol string of the known data generated at the position is output to the demodulator 802, the equalizer 803, and the E-VSB block decoder 805. In addition, the known data detection unit 804 enhances the data by the E-VSB block decoder 805 on the receiving side to distinguish the enhanced data that has been further encoded from the transmitting side and the main data that has not been further encoded. The E-VSB block decoder 805 outputs information for knowing the starting point of the block of the DE coder. Although the connection state is not illustrated in the diagram of FIG. 8, the information detected by the known data detection unit 804 may be generally used in the reception system, and may be used in the E-VSB deformatter 806 and the RS frame decoder 807. Can also be used.

The demodulator 802 can improve demodulation performance by using the known data symbol string during timing recovery or carrier recovery. The equalizer 803 can also use the known data to improve equalization performance. have. In addition, the equalization performance may be improved by feeding back the decoding result of the E-VSB block decoder 805 to the equalizer 803.

On the other hand, if the data input from the equalizer 803 to the E-VSB block decoder 805 is enhanced data in which both additional encoding and trellis encoding are performed at the transmitting side, trellis decoding and additionally at the transmitting side are performed. Decoding is performed and only trellis decoding is performed if additional data is not performed and only trellis encoding is performed. The enhanced data group decoded by the E-VSB block decoder 805 is input to the E-VSB data deformatter 806, and the main data packet is input to the data deinterleaver 808.

That is, if the input data is main data, the E-VSB block decoder 805 may perform Viterbi decoding on the input data to output a hard decision value or hard decision the soft decision value and output the result.

Meanwhile, if the input data is enhanced data, the E-VSB block decoder 805 outputs a hard decision value or a soft decision value with respect to the input enhanced data.

If the input data is enhanced data, the E-VSB block decoder 805 performs decoding on the data encoded by the E-VSB block processor and the trellis encoder of the transmission system. At this time, the RS frame encoder of the E-VSB preprocessor of the transmitting side becomes an external code, and the E-VSB block processor and the trellis encoder can be regarded as one internal code.

In order to maximize the performance of the outer code at the time of decoding the concatenated code, the soft decision value should be output from the decoder of the inner code.

Accordingly, the E-VSB block decoder 805 may output a hard decision value for the enhanced data, and preferably output a soft decision value if necessary.

In other words, the E-VSB block decoder 805 outputs one of a soft decision value and a hard decision value for enhanced data, and a hard decision value for main data.

Meanwhile, the data deinterleaver 808, the RS decoder 809, and the derandomizer 810 are blocks necessary for receiving main data, and may not be required in a receiving system structure for receiving only enhanced data. .

The data deinterleaver 808 deinterleaves the main data and outputs the main data to the RS decoder 809 in a reverse process of the data interleaver on the transmitting side.

The RS decoder 809 performs systematic RS decoding on the deinterleaved data and outputs the deserializer 810.

The derandomizer 810 receives the output of the RS decoder 809 to generate the same pseudo random byte as the transmitter's renderer, bitwise XORs the MPEG sync byte, Insert it before and output in 188 byte main data packet unit.

The data output from the E-VSB block decoder 805 to the E-VSB data deformatter 806 is input in the form of an enhanced data group. In this case, since the E-VSB data deformatter 806 already knows the input data configuration, the E-VSB data deformatter 806 distinguishes the signaling information having the system information from the enhanced data group in the body region of the enhanced data group. At this time, the E-VSB data deformatter 806 includes the known data, trellis initialization data, the MPEG header and the RS encoder / unstructured RS encoder or unstructured RS encoder of the main data and the enhanced data group. Remove and output the added RS parity.

Then, de-randomizing is performed in the reverse process of the sender's randomizer / byte expander on the enhanced data. At this time, the null data used for expansion in the byte expander may or may not be necessary. That is, according to the design method of the receiving system, a part for removing the expanded byte by the byte expander of the transmitting system may be required. In that case, the need for extended byte elimination is eliminated. If extended bytes need to be removed, the order of extended byte removal and derandomization depends on the configuration of the sending system. In other words, if a byte expansion after rendering is performed in the transmitting system, de-rendering is performed after removing bytes from the receiving system. If the transmitting system is performed in reverse, the receiving system is also performed in reverse.

In the de-rendering process, if a soft decision is required in the RS frame decoder 807 at a later stage and a soft decision value is input from the E-VSB block decoder 805, the soft decision value is de-randed. It is difficult to XOR with a pseudo random bit.

Accordingly, the E-VSB data deformatter 806 reverses the sign of the soft decision value when the pseudo random bit to be XORed with respect to the soft decision value of the enhanced data bit is 1, and outputs the soft value when the value is 0. By outputting the sign of the determination value as it is, the soft determination state can be maintained and transmitted to the RS frame decoder 807.

The reason for changing the sign of the soft decision value when the pseudo random bit is 1 in the above description is that the output data bit is reversed when the pseudo random bit XORed to the input data bit in the transmitter's renderer is 1. That is, 0 XOR 1 = 1 and 1 XOR 1 = 0. In other words, when the pseudo-random bit generated by the E-VSB packet deformatter 806 is 1, when the XOR of the hard decision value of the enhanced data bit is reversed, the soft decision value is outputted. The code of the soft decision value is reversed and output.

The RS frame decoder 807 outputs enhanced data by performing an inverse process in the RS frame encoder of the transmission system.

Since the encoding process of the RS frame encoder in the transmission system of the present invention has been described in two embodiments (that is, the first and second embodiments), the RS frame decoder 807 of the reception system corresponds to two implementations. For example, the decoding process will be described by dividing into third and fourth embodiments.

Third Embodiment

The third embodiment of the present invention describes a decoding process when a transmission system performs encoding and transmits enhanced data as in the first embodiment.

14 is a flowchart illustrating an entire RS decoding process according to a third embodiment of the present invention. When decoding is performed only on the first RS subframe and all errors cannot be corrected, the decoding is performed using the second RS subframe together. Perform

According to an embodiment of the present invention, when the number of errors in the body region, that is, the number of errors of the first RS subframe is greater than or equal to a preset number, or when the decoding is performed only with the first RS subframe, all errors are not corrected. Decoding is performed using the enhanced data of the head / tail area, that is, the second RS subframe.

Next, an RS decoding process according to the third embodiment will be described in detail.

The RS frame decoder 807 collects G first RS subframes transmitted to the body region to form a group of 85 * G first RS subframes. In the case of using a 1 byte (i.e., 8 bit) CRC checksum as shown in FIG. 4A, after checking whether each 188 byte packet is in error, the 1 byte CRC checksum is removed, leaving only 187 bytes, and an error flag corresponding to the packet. Indicates whether there is an error.

If a 2 byte (i.e. 16 bit) CRC checksum is used as shown in FIGS. 4B and 4C, two 188 byte packets are checked for errors, and then the two byte CRC checksums are removed to make two 187 byte packets. The error flag corresponding to each 187 byte packet indicates whether an error occurs. If a two-byte CRC checksum is used, both packets should be marked as having errors or no errors at the same time.

After checking each row using the CRC checksum as described above, performing the reverse mixing of the low mixing process on the first RS subframe group consisting of 85 * G 187 bytes to perform the low mixing process in the transmission system. It sorts in the original order before (step 901). Subsequently, it is divided into G first RS subframes composed of 85 187 bytes. When performing the reverse row mixing process, an error flag indicating whether each packet (or row) is in error is also converted and inherited. Each RS frame is configured in the form of a 187x85 byte matrix.

In addition, the RS frame decoder 807 collects G second RS subframes transmitted to the head / tail region to form a 85 * G second RS subframe group, and for the second RS subframe group The reverse of the low shuffle process is performed to sort in the original order prior to the low shuffle process in the transmitting system (step 901). Subsequently, it is divided into G second RS subframes consisting of 85 14 bytes. In this case, since the CRC encoding is not performed by the transmitting system, the CRC decoding is not performed on the second RS subframe group transmitted to the head / tail region.

After the row shuffle process, RS decoding is performed with an error flag indicating whether an error of each packet (or row) inherited with the first RS subframe occurs (step 902).

At this time, in step 903, a CRC error flag corresponding to each row in the first RS subframe is checked to correct an erasure when the number of rows having an error in the first RS subframe is column-oriented RS decoding. It is determined whether the number is less than or equal to the maximum number of errors (= Nc-Kc) that can be performed. If it is determined to be the same or smaller, (85,67) -RS erasure decoding is performed in the column direction on the first RS subframe having 85 187-byte rows, and 18-byte parity data added to the end of each column is performed. Remove (step 904, 908).

Then, as shown in step 908, 67 187-byte row (ie, packet) RS frames can be obtained. In step 909, the enhanced TS packet recovered to 188 bytes is output by adding the MPEG sync byte removed at the beginning of each 187-byte row.

On the other hand, if it is determined in step 903 that the number of rows having an error in the first RS subframe is larger than the maximum number of errors (= Nc-Kc) for which erasure correction can be performed when performing column-wise RS decoding. (85,67) -RS decoding is performed in the column direction for the first RS subframe having 85 187 byte rows (step 905). As a result of performing the (85,67) -RS decoding, it is checked whether all errors in the first RS subframe are corrected (step 906).

If it is determined in step 906 that all errors have been corrected as a result of the (85,67) -RS decoding, 18 bytes of parity data added to the end of each column are removed. Then, as shown in step 908, 67 187-byte row (ie, packet) RS frames can be obtained. In step 909, the enhanced TS packet recovered to 188 bytes is output by adding the MPEG sync byte removed at the beginning of each 187-byte row.

If it is determined in step 906 that all errors are not corrected as a result of the (85,67) -RS decoding, RS decoding is performed by combining the first and second RS subframes (step 907).

FIG. 15 illustrates an example of performing RS decoding by combining the first RS subframe transmitted to the body region and the second RS subframe transmitted to the head / tail region in step 907.

By merging the first and second RS subframes in which the inverse processes of row mixing are performed, as shown in FIG. 15A, an RS frame having 85 packets (or rows) of 201 bytes can be obtained. have.

In this case, each RS frame is in a state where a double RS coding is individually performed in the transmission system. Therefore, the RS frame decoder 807 also performs double RS decoding in the reverse order of double RS coding of the transmission system.

For example, if (85,67) -RS coding is performed in the column direction as shown in FIG. 2 and (201,187) -RS coding is performed in the row direction with respect to the result, the RS frame decoder 807 uses the FIG. As shown in (a), (201,187) -RS decoding is performed in the row direction for each RS frame (first RS decoding), followed by (85,67) -RS decoding in the column direction as shown in FIG. (Secondary RS decoding). In this case, (a) of FIG. 15 performs (201,187) -RS decoding in a row direction with respect to an RS frame having 85 201 byte rows, and FIG. 15 (b) shows an RS frame having 85 187 byte rows. Perform (85,67) -RS decoding in the column direction. Then, the column or row direction RS decoding process is repeated or the decoding process is terminated according to a preset condition.

On the contrary, if the RS encoding is performed in the row direction and the RS encoding is performed in the column direction with respect to the result, the RS frame decoder 807 first performs RS decoding in the column direction for each RS frame (primary RS decoding). Then, RS decoding is performed in the row direction on the result (secondary RS decoding). Similarly, the row and column direction decoding processes are repeated or the decoding process is terminated according to preset conditions.

Herein, the preset condition may be various. In one embodiment of the present invention, whether the repetition is determined based on the corrected number of repetitions by performing a preset number of repetitions and performing secondary RS decoding.

That is, if the maximum number of repetitions is all repeated or additional error correction is not performed as a result of performing secondary RS decoding, the decoding process is terminated. Otherwise, the primary and secondary RS decoding processes are terminated. Repeat.

After the (85,67) -RS decoding is performed in the column direction as shown in (b) of FIG. 15, whether the preset maximum number of repetitions has been completed or the RS decoding is performed in the column direction as shown in (c) of FIG. As a result, it is confirmed that there is no error corrected data.

At this time, if the maximum number of repetitions set in FIG. 15C remains and at least one data error corrected by column direction RS decoding is returned, the process returns to the step of FIG. 15A to perform RS decoding in the column direction. RS decoding is performed again in the row direction for the RS frame.

That is, when one or more error-corrected data exist as a result of performing RS decoding in the column direction, if row RS decoding is performed on the RS frame RS-decoded in the column direction again, the row direction RS decoding process adds the data. There is a possibility that the error can be corrected. In addition, if column direction RS decoding is performed on the RS frame additionally error corrected by the row direction RS decoding, similarly, an error may be additionally corrected.

Therefore, in the present invention, if one or more error-corrected data exist as a result of column-direction RS decoding within a predetermined number of repetitions, the row and column-direction RS decoding is repeatedly performed while reflecting the error-corrected result to increase decoding performance.

In this case, if the row and column direction RS decoding is repeatedly performed, error correction is continuously performed to increase decoding performance. However, in a specific error state, a result corrected by row direction RS decoding causes an error in the column direction again. The vicious cycle can be continued where the result corrected by the direction RS decoding again produces an error in the row direction. Therefore, in the present invention, in order to prevent the aforementioned vicious cycle, the number of repetitions is limited.

The absence of error corrected data as a result of the column direction RS decoding means that there is no error in the RS frame, and thus RS decoding does not need to be repeated.

Therefore, if the maximum number of repetitions set in FIG. 15 (c) is completed or there is no data error corrected by column-wise RS decoding, the RS decoding process is terminated as shown in FIG. 14-byte parity data added to the end of each row and 18-byte parity data added to the end of each column are removed. Then, as shown in (d) of FIG. 15, 67 187-byte row (ie, packet) RS frames can be obtained.

As shown in Fig. 15E, the enhanced TS packet recovered to 188 bytes is output by adding the MPEG sync byte removed at the beginning of each 187-byte row.

In this case, since the number of repetitions and the number of error corrected data for determining RS decoding re-execution may vary by the system designer, the present invention will not be limited to the above examples.

Fourth Embodiment

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The fourth embodiment of the present invention describes a decoding process when a transmission system performs encoding and transmits enhanced data as in the second embodiment.

16 is a flowchart schematically illustrating an RS decoding process according to a fourth embodiment of the present invention, in which an error number of a first RS subframe transmitted to a body region in an enhanced data group and a second transmitted to a head / tail region are shown. The RS decoding process varies according to the sum of the number of errors in the RS subframe.

To this end, the RS frame decoder 807 collects G first RS subframes transmitted to the body region to form 85 * G first RS subframe groups. At this time, one first RS subframe is composed of 85 187-byte rows (ie, packets) as shown in FIG.

In the case of using a 1 byte (i.e. 8 bit) CRC checksum as shown in FIG. 4A, after checking whether an error of each 188 byte packet in the first RS subframe group occurs, the 1 byte CRC checksum is removed to leave only 187 bytes. The error flag corresponding to the packet indicates whether an error occurs.

If a 2 byte (ie 16 bit) CRC checksum is used as shown in Figs. 4B and 4C, after checking whether two 188 byte packets are errored, the 2 byte CRC checksum is removed and two 187 byte packets are formed. The error flag corresponding to each 187 byte packet indicates whether an error occurs. If a two-byte CRC checksum is used, both packets should be marked as having errors or no errors at the same time.

After checking the error of each row using the CRC checksum as described above, the reverse mixing of the row mixing process is performed on the first RS subframe group composed of 85 * G 187 bytes as shown in FIG. Arrange them in their original order before going through the row shuffle process in the transmitting system. Subsequently, it is divided into G first RS subframes composed of 85 187 bytes. When performing the reverse row mixing process, an error flag indicating whether each packet (or row) is in error is also converted and inherited.

In addition, the RS frame decoder 807 collects G second RS subframes transmitted to the head / tail region to form a group of 6 * G second RS subframes. In this case, one second RS subframe includes six 187-byte rows (ie, packets) as shown in FIG.

In the case of using a 1 byte (i.e. 8 bit) CRC checksum as shown in FIG. 4A, after checking whether an error of each 188 byte packet in the second RS subframe group occurs, the 1 byte CRC checksum is removed to leave only 187 bytes. The error flag corresponding to the packet indicates whether an error occurs.

If a 2 byte (i.e. 16 bit) CRC checksum is used as shown in FIGS. 4B and 4C, two 188 byte packets are checked for errors, and then the two byte CRC checksums are removed to make two 187 byte packets. The error flag corresponding to each 187 byte packet indicates whether an error occurs. If a two-byte CRC checksum is used, both packets should be marked as having errors or no errors at the same time.

After checking the error of each row using the CRC checksum as described above, the reverse mixing of the row mixing process is performed on the second RS subframe group consisting of 6 * G 187 bytes as shown in FIG. Arrange them in their original order before going through the row shuffle process in the transmitting system. Subsequently, it is divided into G second RS subframes consisting of six 187 bytes. Similarly, when performing the reverse row mixing process, an error flag indicating whether an error occurs in each packet (or row) is also converted and inherited.

In this case, when the first and second RS subframes in which the inverse process of row mixing is performed are combined, an RS frame having 91 packets (or rows) of 187 bytes is combined. In FIG. 16C, it is checked whether the total number of CRC errors generated in the RS frame is greater than the number of parity added to the RS frame.

Here, the total number of CRC errors generated in the RS frame can be known by checking the CRC error flag corresponding to each row in the RS frame, and the number of parity added to the RS frame can be known by performing N-K.

If the total number of CRC errors generated in the RS frame is less than or equal to the number of parity added to the RS frame, as shown in (d) of FIG. 16, 91 CRC error flag values corresponding to each row of the RS frame are used. (91,67) RS erasure decoding is performed in each column direction of the RS frame.

Meanwhile, if the total number of CRC errors generated in the RS frame is larger than the number of parity added to the RS frame, six CRC errors corresponding to each row of the second RS subframe in the RS frame as shown in FIG. (91,67) RS erasure decoding is performed in the direction of each column of the RS frame using the flag value. According to another embodiment of the present invention, if the total number of CRC errors generated in the RS frame is larger than the number of parity added to the RS frame, RS decoding may be performed without using a CRC error flag value (91,67). .

As shown in (d) or (e) of FIG. 16, when RS decoding is performed on each RS frame, parity data of 24 bytes added to the end of each column is removed during RS encoding. That is, as shown in FIG. 16 (f), an RS frame composed of 67 187 byte rows (that is, a packet) can be obtained.

As shown in Fig. 16G, the enhanced TS packet recovered to 188 bytes is output by adding the MPEG sync byte removed at the beginning of each 187-byte row.

As such, the present invention is not limited to the above-described embodiments, and can be modified by those skilled in the art to which the present invention pertains as can be seen in the appended claims, and such modifications are within the scope of the present invention. Belongs.

As described above, the digital broadcasting system and the processing method according to the present invention have an advantage of being resistant to errors and compatible with existing VSB receivers when transmitting additional data through a channel. In addition, there is an advantage that the additional data can be received without error even in a ghost and noisy channel than the conventional VSB system.

In addition, the present invention performs an error correction encoding process and a row mixing process on the enhanced data, and performs error detection encoding as necessary, thereby robustly responding to a fast channel change while giving robustness to the enhanced data. .

The present invention is more effective when applied to portable and mobile receivers in which channel variation is severe and robustness to noise is required.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the invention.

Therefore, the technical scope of the present invention should not be limited to the contents described in the embodiments, but should be defined by the claims.

Claims (56)

delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete delete Add RS parity data to the bottom end of the columns of the Reed-Solomon (RS) frame payload including enhanced data, and cyclic redundancy check (CRC) checksum at the right end of the rows of the RS frame payload to which the RS parity data has been added. An RS frame encoder for generating RS frames by performing RS-CRC encoding for adding data; A block processor which encodes data included in the RS frame at a code rate of 1 / N (where N is an integer greater than 1); Inserting a portion of the data encoded at the 1 / N code rate into a data group, and adding known data sequences, a main data position holder, an MPEG header position holder, and an RS parity data position holder to the data group Group formatters; A deinterleaver for deinterleaving data of the data group; A packet formatter for removing the main data position holder and the RS parity data position holder from the data of the deinterleaved data group, replacing the MPEG header position holder with MPEG header data, and outputting enhanced data packets; And And a multiplexer for multiplexing the enhanced data packets and main data packets including main data. 53. The digital broadcast transmission system of claim 51 further comprising a data interleaver for interleaving data of the multiplexed data packets. 53. The apparatus of claim 52, further comprising a trellis encoder for trellis encoding the interleaved data, wherein at least one memory included in the trellis encoder is initialized at each start of the known data sequences. Digital broadcasting transmission system characterized in that. Add RS parity data to the bottom end of the columns of the Reed-Solomon (RS) frame payload including enhanced data, and cyclic redundancy check (CRC) checksum at the right end of the rows of the RS frame payload to which the RS parity data has been added. Generating an RS frame by performing RS-CRC encoding for adding data; Encoding data included in the RS frame at a code rate of 1 / N (where N is an integer greater than 1); Inserting a portion of the data encoded at the 1 / N code rate into a data group, and adding known data sequences, a main data position holder, an MPEG header position holder, and an RS parity data position holder to the data group step; Deinterleaving data in the data group; Removing the main data position holder and the RS parity data position holder from the data of the deinterleaved data group, replacing the MPEG header position holder with MPEG header data, and outputting enhanced data packets; And And multiplexing the main data packets including the enhanced data packets and main data. 55. The method of claim 54, further comprising interleaving data of the multiplexed data packets. 56. The method of claim 55, further comprising trellis encoding the interleaved data in a trellis encoder, wherein at least one memory included in the trellis encoder is at each start of the known data sequences. Broadcast signal processing method of a digital broadcast transmission system, characterized in that the initialization.

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