KR100625408B1 - Downlink preamble detecting apparatus of ofdma/tdd communication system - Google Patents

Abstract

The present invention provides an apparatus for detecting downlink preamble in an OFDMA / TDD communication system used for a portable Internet. To this end, the present invention includes a predetermined buffer for storing the received signal and a downlink preamble detection unit for detecting the downlink preamble symbol by using the conjugate symmetry relation of the downlink preamble symbols from the signal stored in the buffer. do. Accordingly, the present invention has the effect that even if the frequency error or phase error is included in the OFDMA / TDD communication system, accurate frame synchronization can be performed regardless of these errors.

OFDMA / TDD communication system, frame synchronization, downlink preamble symbol detection

Description

DOWNLINK PREAMBLE DETECTING APPARATUS OF OFDMA / TDD COMMUNICATION SYSTEM}

1 is a diagram illustrating a signal sequence according to a TDD wireless communication in a time domain in a conventional frequency downlink preamble detection algorithm;

2 illustrates an IFFT output of a portable Internet downlink preamble.

3 is a block diagram illustrating an internal block diagram of an apparatus for acquiring a TDD frame sync according to an embodiment of the present invention;

4A is a first conceptual diagram illustrating an operation process according to an algorithm proposed by the present invention in a downlink preamble detector according to an embodiment of the present invention;

4B is a second conceptual diagram illustrating an operation process according to an algorithm proposed by the present invention in a downlink preamble detection unit according to an embodiment of the present invention;

5 is an exemplary view showing an output example when the signal-to-noise ratio is 0dB and the frequency is 1KHz in the downlink preamble detector according to an embodiment of the present invention;

6 is an exemplary view showing an example of output when the signal-to-noise ratio is 3dB and the frequency is 2KHz in the downlink preamble detector according to an embodiment of the present invention;

7 is an exemplary diagram showing an output example when the signal-to-noise ratio is 3dB and the frequency is 3KHz in the downlink preamble detector according to an embodiment of the present invention.

The present invention is an algorithm for frame synchronization detection in an Orthogonal Frequency Division Multiple Access (OFDMA) / Time Division Duplexing (TDD) frame. In particular, there is no deterioration in the preamble detection performance even when frequency error and phase error occur due to the Doppler shift effect, which may inevitably occur due to the difference in frequency due to the instability of the oscillator or the movement of the terminal.

In general, the OFDMA / TDD system refers to a method of transmitting an OFDMA signal by alternately assigning an uplink signal and a downlink signal in the same frequency band in the same frequency band.

According to the OFDMA / TDD standard specification of the current portable Internet, a frame of an OFDMA / TDD communication system is composed of a downlink signal and an uplink signal having a time gap for one frame (5 ms), and an uplink / downlink therebetween. In order to prevent link signal classification and collision of uplink / downlink signals, there are no signal transmission periods such as Rx / Tx Transition Gap (RTG) and Tx / Rx Transition Gap (TGT). Here, the uplink / downlink duration ratio can be adjusted to the rate recommended in the standard, depending on the service provider service and on the number of uses and the amount of data transmitted.

The frame of the OFDMA / TDD communication system of the portable Internet begins with downlink preamble transmission consisting of one OFDMA symbol. The communication principle between a terminal and a base station in the OFDMA / TDD communication system of the portable Internet is as follows. First, only the downlink signal that meets the frame standard is transmitted from the base station to the terminal. The terminal detects frame synchronization by detecting preamble symbols differently set according to Cell ID and Sector from the received downlink signal. After frame synchronization, the terminal analyzes downlink data to find out the cell ID and the sector connected thereto, and then transmits a signal to the uplink signal region to communicate with the base station. Therefore, in the TDD communication system, the synchronization of frames through the discovery of downlink preamble symbols is a very important factor.

According to the preamble mapping method set in the portable Internet standard, a pattern determined according to a cell ID and a sector is inserted into three subcarriers except the guard band, and the rest is complex zero padding (0 + j0). Is inserted. The signals of all preambles are modulated into BPSK signals having an imaginary number of zero. When the preamble is subjected to an Inverse Fast Fourier Transform (IFFT), the real number is about y-axis symmetry and the imaginary part about half of the size of the Fast Fourier transform (FFT size / 2). The value has the property of origin symmetry. That is, after the inverse fast Fourier transform, the signals are conjugate symmetrical.

1 illustrates a method of finding a starting point of a signal transmission section according to a signal characteristic of a TDD communication scheme having a no transmission section. In FIG. 1, W1 152 and W2 154 denote data input to a window buffer at different time zones, respectively. Accordingly, when the signal transmission section 154 starts, the signal energy ratio of W2 / W1 becomes maximum, and in the section 156 where signal transmission ends, the signal energy ratio of W2 / W1 becomes minimum. However, when frequency error and phase error occur, signal distortion occurs and energy loss occurs. Accordingly, it is difficult to find the exact downlink start point and frame synchronization by the above method. In addition, although the signal non-transmission period and the signal transmission period can be distinguished through the presence or absence of the signal, in this case, it is difficult to find the starting point and frame synchronization of the downlink.

As described above, the downlink preamble detection method for frame synchronization of the TDD communication method, which is currently commonly used, is accurate in frame synchronization detection when a frequency error or a phase error that may be caused by fading, Doppler shift, or instability of the oscillator occurs. There may be a problem that it may not, and there is also a problem that requires an additional component to increase the accuracy of the frame synchronization detection.

Accordingly, an object of the present invention is to provide an OFDMA / TDD communication system having a simple hardware complexity in the portable Internet OFDMA / TDD communication scheme, and capable of obtaining accurate frame synchronization even if a frequency error occurs, regardless of the presence or absence of a signal transmission interval. It is to provide a downlink preamble detection apparatus of.

In accordance with an aspect of the present invention, there is provided an apparatus of the present invention, wherein the received signal is obtained by using an operation value extracted through an algorithm as shown in Equation (1) from samples extracted from a signal received from a base station of an OFDMA / TDD communication system. It is characterized by detecting the downlink preamble symbol from the.

는 i번째 수신 복소 신호 버퍼에 저장된 신호의 실수측에 해당하는 심볼의 신호 비트이며,

는 i번째 수신 복소 신호 버퍼에 저장된 신호의 허수측에 해당하는 심볼의 신호 비트이다. 여기서 N은 수신된 신호로부터 추출한 샘플들의 개수를 의미하며, N이 클수록 신호 검출 성능이 우수하나, 하드웨어 복잡도가 증가하는 관계가 있다.here

Is the signal bit of the symbol corresponding to the real side of the signal stored in the i-th received complex signal buffer,

Is the signal bit of the symbol corresponding to the imaginary side of the signal stored in the i-th received complex signal buffer. Here, N denotes the number of samples extracted from the received signal. The larger N, the better signal detection performance, but the hardware complexity increases.

The apparatus of the present invention extracts a predetermined number of samples from a received complex signal buffer storing a signal received from a base station of the OFDMA / TDD communication system and a signal stored in the received complex signal buffer, By using the conjugate symmetry relation of the downlink preamble symbols of the OFDMA / TDD communication scheme through an algorithm such as 1, the downlink from the samples regardless of the frequency error or phase error included in the received signal A downlink preamble detector for detecting the presence of a link preamble symbol is provided.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the following description and the annexed drawings, detailed descriptions of well-known functions and configurations that may unnecessarily obscure the subject matter of the present invention will be omitted.

According to the current portable Internet standard, a downlink preamble symbol of OFDMA / TDD is inserted with pilot signals every three subcarriers excluding guard bands, and complex zero padding (0 + j0) is inserted into the remaining subcarriers. All preamble signals are modulated with BPSK signals having an imaginary imaginary value of zero. When the preamble is IFFT (Inverse FFT), the real value is Y axis symmetry and the imaginary value is origin symmetry centered on 1/2 of the FFT size. That is, after the inverse fast Fourier transform, all signals of the downlink preamble have a characteristic that the conjugate symmetry relationship is repeated. 2 shows an example of signals of such a downlink preamble. In FIG. 2, [(a)] and [(a) '] mean that they are in the conjugate symmetric relationship with each other. Therefore, the present invention uses an algorithm that detects only downlink preamble symbols having a characteristic of conjugate symmetry after the inverse fast Fourier transform (IFFT), so that the downlink OFDMA symbols other than the preamble are not reacted.

3 is a block diagram illustrating an apparatus for obtaining frame synchronization in an OFDMA / TDD communication system according to an exemplary embodiment of the present invention. Referring to FIG. 3, the apparatus for acquiring frame synchronization according to an embodiment of the present invention receives a down-converted received signal into a baseband and receives a received complex signal buffer buffering the received signal according to a fast fourier transform (FFT) size. 402 and a downlink preamble detector 400 for detecting a preamble symbol of a downlink signal from 1024 (FFT size) symbols stored in the received complex signal buffer 402 according to an embodiment of the present invention. do. The size of the received complex signal buffer 402 should be equal to the FFT size.

The downlink preamble detector 400 detects a downlink preamble symbol from the symbols input to the received complex signal buffer 402 using an algorithm proposed by the present invention. Looking at the operation of the downlink preamble detection unit 400 according to the FFT size, a symbol of one frame input from the reception complex signal buffer 402, that is, a predetermined number of symbols from the earliest of 1024 symbols Samples from the last part of the pair and their conjugate pairs. The samples are computed through an algorithm as shown in Equation 1, and the result value determines whether the preamble symbol of the downlink signal is detected.

)과 허수성분(

)으로 하기 수학식 2와 같이 표현할 수 있다. 그러나 실제로 수신되는 복소 송신 신호에는 주파수 오차(△f)와 위상 오차(θ)가 포함되어 있을 수 있으므로, 이러한 주파수 오차(△f)와 위상 오차(θ)가 포함되어 있는 경우 수신되는 신호는 하기 수학식 3과 같이 표현할 수 있다. In general, the complex transmitted signal is a real component (

) And imaginary components (

) Can be expressed as in Equation 2 below. However, since the complex transmission signal actually received may include a frequency error Δf and a phase error θ, when the frequency error Δf and the phase error θ are included, the received signal is as follows. It can be expressed as Equation 3.

After the inverse fast Fourier transform, the signals of the downlink preamble having a conjugate relationship have the same relationship as in Equation 4 below.

Accordingly, even in the downlink preamble signal including the frequency error Δf and the phase error θ, the downlink preamble symbol can be detected regardless of the frequency error Δf and the phase error θ. A detection algorithm is proposed as in Equation 5 below.

In Equation 5, the downlink preamble detection unit 400 sets the number N of samples for checking whether a downlink preamble symbol is detected from the received complex signal buffer 402 to 255. . Here, the number of samples 255 may be changed according to a user's selection or a predetermined condition.

는 상기 수학식 3에 의해 하기 수학식 6와 같이 전개될 수 있다. In addition, when the downlink preamble signal is correctly input to the reception complex signal buffer 402,

Equation 3 may be developed as in Equation 6 below.

는 상기 수학식 3에 의해 하기 수학식 7과 같이 전개될 수 있다.　 And of Equation 5

May be developed as in Equation 7 by Equation 3.

은 하기 수학식 8과 같이 전개될 수 있다. The equation (5) by the equation (6) and the equation (7)

May be developed as in Equation 8 below.

는 상기 수학식 3에 의해 하기 수학식 9와 같이 전개될 수 있다. And of Equation 5

May be developed as in Equation 9 by Equation 3 below.

역시 상기 수학식 3에 의해 하기 수학식 10과 같이 전개될 수 있다. And of Equation 5

Equation 3 may also be developed as in Equation 10 below.

는 하기 수학식 11과 같이 전개될 수 있다.　 Therefore, the equations (5) are expressed by equations (9) and (10).

May be developed as in Equation 11 below.

Therefore, when Equation 5 is developed by combining Equations 8 and 11, Equation 5 may be finally developed as in Equation 12 below.

Accordingly, as a result of the algorithm according to the embodiment of the present invention, that is, the influence of the frequency error Δf and the phase error θ shown in Equation 3 is eliminated. Accordingly, even if the frequency error or phase error occurs in the downlink preamble detection unit 400 using the algorithm of Equation 5 proposed in the present invention, the detection of the preamble symbol notifying the start of the downlink signal is not required. This is possible.

Reference is made to FIG. 4 to describe this process in detail. 4 is a diagram illustrating a calculation process in the downlink preamble detection unit 400 according to an embodiment of the present invention. That is, Equation 5 may be expressed as a conceptual diagram as shown in FIG. 4. In detail, the real part and the imaginary part included in each symbol of the OFDMA signal are input from the real side buffer and the imaginary side buffer of the reception complex signal buffer 402, respectively. Although not shown, the signal bits of the symbol corresponding to the real side are input to the real side buffer of the reception complex signal buffer 402, and the imaginary side buffer of the symbol corresponding to the imaginary side is input to the imaginary side buffer of the reception complex signal buffer 402. Signal bits are input.

부분(A)이 연산되는 과정을 보이고 있으며, 상기 도 4b는 상기 수학식 5의

부분(B)이 연산되는 과정을 보이고 있다. 그리고 상기 도 4a와 도 4b에서 있는 바와 같이 상기 실수측 버퍼에서는 소정의 방식을 통해 비트 연산이 수행된 값들을 합산하여 출력하고, 같은 방식으로 허수측 버퍼에서도 비트 연산이 수행된 값들을 합산하여 출력한다. 그리고 이와 같은 과정을 통해 연산된 값들은 다시 합산되어 본 발명에서 제안하는 하향링크 프리앰블 검출 알고리즘의 출력값을 도출한다. And in Figure 4a of Equation 5

Part A is calculated, and FIG. 4B shows Equation 5

Part B is shown in the process of operation. As shown in FIGS. 4A and 4B, the real-side buffer adds and outputs values obtained by performing bit operations through a predetermined method, and in the same manner, adds and outputs the bit-operated values in the imaginary buffer. do. The calculated values are summed up again to derive the output value of the downlink preamble detection algorithm proposed by the present invention.

5, 6, and 7 illustrate an example in which a downlink preamble signal is detected in a frame detection apparatus having a downlink preamble detector 400 according to an exemplary embodiment of the present invention. First, referring to FIG. 5, FIG. 5 illustrates values output from the frequency downlink preamble detector 400 according to an embodiment of the present invention when the signal-to-noise ratio is 0 dB and the frequency error is 1 KHz. .

In the case of the algorithm proposed by the present invention, the effects of the frequency error Δf and the phase error θ are removed as described above, and thus, when the preamble signal is included in the symbols input to the downlink preamble detector 400. When the number of samples extracted from the received complex signal buffer 402, that is, the number of samples, for example, is set to 255, 255 samples from the foremost part and 255 samples from the rear part are described in the present invention. If it is calculated by the proposed downlink preamble detection algorithm, the result of the algorithm has a peak value compared to other OFDM signals as shown in FIG.

Accordingly, the downlink preamble detection unit 400 may set a predetermined criterion for determining the detection of the preamble, and may determine that the preamble symbol is detected when an operation result that exceeds the predetermined criterion occurs. That is, for example, when the algorithm operation result in FIG. 5 is 0.08 or more, a downlink preamble symbol indicating the start of the downlink signal is included among the OFDM / TDD symbols currently input to the received complex signal buffer 402. It can be judged. Therefore, in the present invention, regardless of the influence of the frequency error Δf and the phase error θ, synchronization to the frame of the downlink signal is possible.

6 and 7 are the same. 6 is a diagram illustrating the result values output from the frequency downlink preamble detector 400 according to an embodiment of the present invention when the signal-to-noise ratio is 3 dB and the frequency error is 2 KHz. 7 illustrates an example of the result values output from the frequency downlink preamble detector 400 according to an embodiment of the present invention when the signal-to-noise ratio is 3 dB and the frequency error is 3 KHz. Referring to FIGS. 6 and 7, when the symbols input from the reception complex signal buffer 402 also include downlink preamble symbols indicating the start of the downlink signal, also in FIGS. 6 and 7. When the samples extracted from the received complex signal buffer 402 are computed through the algorithm proposed in the present invention, it is shown that the result value of the calculation has a peak value. Accordingly, in the present invention, the downlink preamble symbol can be detected regardless of the influence of the frequency error [Delta] f and the phase error [theta], and thus accurate frame start time can be derived.

The downlink preamble detection apparatus according to the embodiment of the present invention can be used in a mobile communication terminal or a conventional repeater using a portable Internet. For example, when the downlink preamble detection apparatus according to an embodiment of the present invention is used in a repeater, the downlink preamble detection unit 400 of the downlink preamble detection apparatus according to an embodiment of the present invention may use the preamble symbol. If detected, the downlink preamble detector 400 inputs the preamble detection signal to a conventional repeater, that is, a TDD switch control and a traffic data transmitter. In this case, the conventional repeater buffers timing from the time point at which the preamble symbol is input, that is, a received signal is stored in the received complex signal buffer 402, and the symbols stored in the received signal buffer are stored in the embodiment of the present invention. The downlink signal is detected by the downlink preamble detector in consideration of the time taken for the synchronization detection. In this case, since the buffering timing is generally determined, correcting the time when the downlink preamble is detected by such a predetermined time allows the frequency of the correct downlink signal to be detected and synchronized. Accordingly, the present invention can detect the preamble of the downlink signal irrespective of this even when a frequency error Δf and a phase error θ occur, thereby accurately synchronizing frames to the downlink signal.

Meanwhile, in the above description of the present invention, specific embodiments have been described, but various modifications may be made without departing from the scope of the present invention. In particular, in the embodiment of the present invention, only the frequency error or phase error is mentioned as an example of the error, but the error due to the distortion may also be removed through the process of signal accumulation. In addition, the embodiment of the present invention has been shown to receive 255 samples from the received complex signal buffer for detecting the downlink preamble, and to detect the downlink preamble from the samples. It may be set differently according to a preset condition. That is, the number of such samples may be increased if the user wants to detect the downlink preamble more precisely, or vice versa, that is, if it is determined that it is not necessary to extract 255 samples, the number of samples may be further reduced. It may be. Therefore, the scope of the invention should not be defined by the described embodiments, but should be determined by the equivalent of claims and claims.

Although the present invention extracts a predetermined number of samples from a signal stored in a received complex signal buffer and calculates the extracted samples using an algorithm that can remove a frequency error or a phase error included in the received signal, although OFDMA Even if the received signal in the / TDD communication system includes a frequency error or a phase error, the downlink preamble signal can be detected regardless of these errors. Accordingly, the present invention can accurately derive the starting point of the downlink signal irrespective of the frequency error or phase error, so that accurate frame synchronization can be performed without being affected by the errors.

Claims (5)

An apparatus for performing frame synchronization in an orthogonal frequency division multiple access (OFDMA) / time division duplexing (TDD) communication system, A reception complex signal buffer for storing a signal received from a base station of the OFDMA / TDD communication system; Extracts a predetermined number of samples from the signal stored in the received complex signal buffer, and uses a conjugate symmetric relationship of downlink preamble symbols of the OFDMA / TDD communication scheme to generate a frequency error included in the received signal. Or detecting a downlink preamble symbol from the samples after removing a phase error. The method of claim 1, wherein the received complex signal buffer, A real side buffer for storing the signal bits of the symbol corresponding to the real side from the symbols of the input signal; And an imaginary side buffer for storing signal bits of a symbol corresponding to the imaginary side from the symbols of the input signal. The method of claim 1, wherein the downlink preamble detector, Downlink preamble detection, characterized in that for extracting a predetermined number of symbols among the symbols of the signal input to the received complex signal buffer and symbols in a pair-symmetric relationship with the predetermined number of symbols as samples. Device. The method of claim 3, wherein the downlink preamble detector, The downlink preamble detection apparatus, characterized in that the number of the extracted samples can be adjusted variably. The method of claim 3, wherein the downlink preamble detector, A frame of an OFDMA / TDD communication system, characterized in that it is determined whether a downlink preamble symbol is detected in a signal stored in the received complex signal buffer according to an operation value calculated by substituting the extracted samples into Equation (13). Detection device.

here

Is the signal bit of the symbol corresponding to the real side of the signal stored in the i-th received complex signal buffer,

Is the signal bit of the symbol corresponding to the imaginary side of the signal stored in the i-th received complex signal buffer, N means the number of samples extracted from the received signal.

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