KR100577793B1 - Nonvolatile memory device - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a nonvolatile memory device, and includes a checksum calculation circuit and a control circuit for controlling the calculation circuit inside the nonvolatile memory, whereby the checksum value can be calculated in hardware. You can eliminate the piece of software that handles the checksum, which simplifies the program that controls the microprocessor. To this end, the nonvolatile memory device of the present invention selects a row of a main memory based on an address / data controller for processing an address and data input / output according to a read or write command signal, and a row address transmitted from the address / data controller. A column decoder unit for selecting a column of a main memory based on a decoder unit, a column address transferred from the address / data control unit, and read data transferred from the main memory or write data transferred from the address / data control circuit unit. A data latch unit for storing the data, a check sum calculating unit for obtaining a sum of data stored at each address of the main memory, a signal for receiving a check sum request signal and a check sum program signal to control the operation of the check sum calculating unit. Generates a checksum value at a specific address desired by the user, or It characterized in that it includes a control unit that used when it is necessary to check several hapgap in the memory.

Description

Nonvolatile Memory Device {NONVOLATILE MEMORY DEVICE}

1 is a diagram illustrating an example of storing data in a nonvolatile memory using a checksum value.

2 is a block diagram of a nonvolatile memory according to the prior art.

3 is a block diagram of a nonvolatile memory according to the present invention.

4 is a diagram showing the steps required when inputting and outputting data to and from a nonvolatile memory using a check sum.

   4A illustrates a case of a nonvolatile memory according to the present invention in which a check sum calculation circuit and a calculation circuit are integrated.

   4B is a diagram illustrating a conventional nonvolatile memory.

(Explanation of symbols for the main parts of the drawing)

11: Main memory part 12: Address / data control circuit part

13 column decoder unit 14 row decoder unit

15: data latch circuit portion 16: control circuit portion

17: check-sum operation circuit

The present invention relates to a nonvolatile memory device, and more particularly, to a nonvolatile memory device capable of computing a checksum value in hardware.

With the recent increase in the use of portable devices, the share of the non-volatile memory that can store data without supplying power is rapidly increasing in the semiconductor industry. Such nonvolatile memory must be capable of read / write operations even at low voltages. In addition, if the data is changed due to external noise in the nonvolatile memory, a microprocessor that reads and operates the data has a high risk of malfunctioning. Therefore, accurate data must be preserved even in external noise.

When external noise causes data to change in nonvolatile memory, a checksum is usually used to store data to prevent the microprocessor from malfunctioning. The checksum value is expressed as the sum of all data in the nonvolatile memory and is stored at a specific address in the nonvolatile memory.

1 shows an example in which data is stored in a nonvolatile memory using a check sum value. The nonvolatile memory of FIG. 1 has a total of 256 addresses from 0 to 255. At this time, it is assumed that the checksum value is stored in the last 255th address.

Since the result of microprocessor operation is '1', '1' is stored at 0 ~ 254 and 255 is stored at 255. If a nonvolatile memory needs data stored at a specific address, the microprocessor checks the checksum before reading the data. That is, the microprocessor reads all the data of addresses 0 to 254, sums them, and compares them with the checksum of address 255. If the two sums are equal (255), the microprocessor determines that the data in the nonvolatile memory is correct (FIG. 1A).

If an error occurs and the data of the nonvolatile memory address 3 is changed to 0 (FIG. 1B), the sum of the data of addresses 0 to 254 is 254, which is different from the value of 255 stored at address 255. Therefore, the microprocessor can determine that the data in the nonvolatile memory is wrong and store the newly calculated value in the nonvolatile memory.

The method of verifying the correctness of data using the checksum described above has been handled in software until now. For example, suppose you use a nonvolatile memory with addresses 0-255, and the checksum is handled in software. To calculate the checksum of this nonvolatile memory, the microprocessor must first read all data from address 0 to address 254 from the nonvolatile memory.

The microprocessor then sums the read data and compares the value with the value at the 255th address of the nonvolatile memory to determine whether the data is correctly preserved.

2 is a block diagram of a nonvolatile memory according to the prior art.

The nonvolatile memory has a main memory 1, an address / data control circuit section 2, a column decoder section 3, a row decoder section 4 and a data latch circuit section 5.

The address / data control circuit 2 processes the address / data input / output according to the signal of the read / write port.

The row decoder unit 4 selects a row of the main memory 1 by the row address transmitted from the address / data control circuit unit 2.

The column decoder section 3 selects a column of the main memory 1 by the column address transmitted from the address / data control circuit section 2.

The data latch circuit section 5 temporarily stores the read data transmitted from the main memory 1.

However, in the conventional nonvolatile memory configured as described above, in order to calculate a checksum of the nonvolatile memory, all data from the 0th address data to the 254th address data of the nonvolatile memory are read from the microprocessor. Next, the sum of the read data is calculated and the value is compared with the value at the 255th address of the nonvolatile memory to determine whether it is the same. Therefore, the conventional nonvolatile memory has a problem that the microprocessor spends a lot of time when computing the checksum in software.

Accordingly, the present invention has been made to solve the above problems, and an object of the present invention is to provide a checksum calculation circuit and a control circuit capable of controlling the calculation circuit, thereby providing a checksum value. An object of the present invention is to provide a nonvolatile memory device capable of computing a checksum value in hardware.                         

Another object of the present invention is to provide a nonvolatile memory device which can simplify a program for controlling a microprocessor by removing a software portion for processing a checksum.

A nonvolatile memory device according to the present invention for achieving the above object,

An address / data control unit for processing address and data input / output according to a read or write command signal,

A row decoder unit for selecting a row of a main memory based on a row address transmitted from the address / data control unit;

A column decoder to select a column of a main memory based on a column address transmitted from the address / data controller;

A data latch unit for temporarily storing read data transferred from the main memory or write data transferred from the address / data control circuit unit;

A check sum calculating unit for obtaining a sum of data stored at each address of the main memory;

Receives a check sum request signal and a check sum program signal to generate a signal for controlling the operation of the check sum calculation unit, and causes the check sum value to be stored at a specific address desired by the user or when multiple check sum values are needed in the main memory. It is characterized by including the control part to be used.

The user may program the memory address and the number of check sums stored in the check sum through an input port of the nonvolatile memory device connected to the controller.

Hereinafter, an embodiment of the present invention will be described with reference to the accompanying drawings.

3 is a block diagram of a nonvolatile memory according to the present invention.

The nonvolatile memory includes a main memory section 11, an address / data control circuit section 12, a column decoder section 13, a row decoder section 14, a data latch circuit section 15, a control circuit section 16 and a check sum. The calculation circuit section 17 is provided.

The address / data control circuit unit 12 performs address / data input / output processing according to a signal of a read / write port.

The row decoder unit 14 selects a row of the main memory 11 based on the row address transmitted from the address / data control circuit unit 12.

The column decoder unit 13 selects a column of the main memory 11 by the column address transmitted from the address / data control circuit unit 12.

The data latch circuit unit 15 temporarily stores read data transferred from the main memory 11 or write data transferred from the address / data control circuit unit 12.

The control circuit unit 16 receives a checksum request signal Che_req and a checksum program signal Che_pro to generate a signal for controlling the operation of the checksum calculation circuit unit 17. The control circuit section 16 is used when a checksum value is stored at a specific address desired by a user or when several checksum values are required in the main memory section 11. Determination of the memory address where the checksum is stored and the number of checksums are user programmable using a port of a nonvolatile memory connected to the control circuitry 16.

The check sum calculating circuit unit 17 calculates the sum of data stored at each address of the main memory 11.

The check sum calculating circuit unit 17 is controlled by the control circuit unit 16. Such arithmetic circuit portion can be simply configured in hardware.

The operation of the nonvolatile memory to which the checksum calculation function is added is as follows.

First, the microprocessor first applies a signal to a checksum program port of a nonvolatile memory and then applies an address signal. The control circuit section 16 of the nonvolatile memory then recognizes this address as the address where the checksum is written. If multiple checksums are needed, the above operation is repeated.

When the microprocessor needs to store data in nonvolatile memory during operation, it writes the data to a desired address and then checks by applying signals to the address where the checksum is stored and the checksum request port. Update the checksum.

To check if the data stored in the nonvolatile memory is correct, use the following method.

First, the checksum stored in the nonvolatile memory is called, and then a signal is applied to the checksum request port to call a hardware-calculated checksum. The microprocessor then compares the two checksum values. If the data in the nonvolatile memory is correct, the two values will match.

If for some reason wrong data is recorded in the nonvolatile memory, the previous two values will be different, and the microprocessor will be able to know quickly that the wrong data is stored in the nonvolatile memory.

The operation of the nonvolatile memory according to the present invention is as follows.

First, the microprocessor applies a signal to a checksum program port, and then applies address 255 to the address port of the nonvolatile memory to store the checksum. The nonvolatile memory then recognizes this address as the address where the checksum is to be stored. At this time, if the calculation result of the microprocessor is all 1, the microprocessor recognizes data of addresses 0 to 254.

If the microprocessor calculates all 1s, the microprocessor writes all data from 0 to 254 as 1. The signal is then input to the checksum program port to quickly calculate the checksum in hardware.

If a non-volatile memory needs a stored address at a particular address, the microprocessor checks the checksum before reading the data. First we call the gaiter at the address where the checksum is stored.

Thereafter, a signal is applied to a checksum request port to call a checksum calculated quickly in hardware. If there is no error in the data in the nonvolatile memory, the two values are equal to 255.

If an error exists, the data value of the address at which the checksum is stored is 255, and the checksum value obtained by applying a signal to the checksum request port is 254. Therefore, the microprocessor can quickly check the accuracy of the nonvolatile memory without any calculation.

FIG. 4 is a diagram illustrating steps required when inputting and outputting data to and from a nonvolatile memory using a checksum.

4A illustrates a nonvolatile memory in which a checksum calculation circuit and an operation circuit are integrated, and FIG. 4B illustrates a conventional nonvolatile memory.

In the case of the nonvolatile memory having 256 addresses, as shown in the present invention, when the checksum block is integrated, it takes three steps to call the data, whereas the conventional nonvolatile memory takes 517 steps. . Therefore, when the checksum block is integrated, the microprocessor reduces the time spent reading and writing data in the nonvolatile memory, thereby enabling high-speed operation.

The nonvolatile memory of the present invention can be applied to devices using all nonvolatile memories such as mobile phones, PDPs, MP3 players, and notebook computers. In addition, the present invention can be applied to a mass storage device such as an HDD and a magnetic tape.

As described above, according to the nonvolatile memory device of the present invention, a checksum value is provided in the nonvolatile memory by providing a checksum calculation circuit and a control circuit capable of controlling the calculation circuit. It can be computed in hardware, which eliminates the software portion that handles the check-sum, which simplifies the program that controls the microprocessor.

In addition, preferred embodiments of the present invention are disclosed for the purpose of illustration, those skilled in the art will be able to various modifications, changes, additions, etc. within the spirit and scope of the present invention, these modifications and changes should be seen as belonging to the following claims. something to do.

Claims (2)

In a nonvolatile memory device, Main memory section, An address / data control unit for processing address and data input / output according to a read or write command signal, A row decoder unit for selecting a row of the main memory based on a row address transmitted from the address / data control unit; A column decoder to select a column of the main memory based on a column address transmitted from the address / data controller; A data latch unit for temporarily storing read data transferred from the main memory or write data transferred from the address / data control circuit unit; A check sum calculating unit for obtaining a check sum of data stored at each address of the main memory; Receives a check sum request signal and a check sum program signal to generate a signal for controlling the operation of the check sum operation unit. When writing data, the check sum is updated to an address where a check sum of data written to a desired address is stored. When the data is called, the control unit compares the check sum stored in the main memory with the check sum calculated by the check unit, and allows the check sum value to be stored at a specific address desired by the user or in the main memory. And a control unit for controlling to set the check sum of the nonvolatile memory device. The method of claim 1, And a user programmable memory address storing the check sum and the number of check sums through an input port of the nonvolatile memory device connected to the controller.

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