KR100237422B1 - Lcd monitor display device and its display method - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an LCD monitor display device for displaying and converting video signals having different resolutions into resolutions of a predetermined display module. The present invention relates to an analog / digital converter for converting an input video signal into a digital signal. The microcomputer determines the resolution ratio of the input video signal, determines the magnification ratio, controls the operation of the system, a control signal generator that outputs the control signal according to the operation of the system, and horizontal magnification of the video signal. A first interpolation unit configured to interpolate a vertically enlarged video signal in a horizontal direction, and to receive a video signal, determine a resolution thereof, and determine an enlargement ratio according to a resolution to be output; And determining the pixel having the data value of the original pixel and then expanding the first process. That in accordance with the pixel data formed of the adjacent between each pixel in a second step of determining and outputting the existence of the pixels having a value arithmetic means is characterized.

Description

LCD Monitor Display and Display Method

The present invention relates to an LCD monitor display device, and more particularly, to an LCD monitor display device for converting and displaying video signals having different resolutions into resolutions of a predetermined display module.

In general, each video signal used in the PC has various resolutions, and since the display module has a specific resolution, in order to display the video signal on the display module, it is necessary to convert the video signal to the specific resolution of the display module. .

In the following description, a video signal is displayed on an XGA (1024 * 768) LCD module as an example. (In the following video signals, horizontal and vertical frequencies are the same and only the aspect of resolution is considered.)

In general, the resolution of a video signal used in a PC is shown as the number of pixels in the width and height, and there are types as shown in the following table.

In order to display a video signal having various resolutions as described above on an XGA-level LCD module, an enlarged interpolation method of the video signal is required. Usually, the input video signal is stored in a large frame memory or a plurality of line memories. Processing such as extended interpolation will be performed.

Japanese Laid-Open Patent Publication No. 7-104710 describes a method of enlarging or reducing video signals having different resolutions so as to be displayed to fit the LCD module.

The Japanese Laid-Open Patent Publication No. 7-104710 includes a line memory corresponding to each line for converting a video signal having a first resolution to a second resolution to increase or decrease the number of pixels according to a predetermined enlargement ratio. After performing the brightness was determined to output on the monitor.

However, in the above case, since a large number of line memories are used, the system becomes complicated, which makes it impossible to achieve miniaturization and increases the price of the product.

The present invention has been made to solve the above problems of the prior art, the object of which is to determine the number of pixels in accordance with the magnification ratio and the luminance by the arithmetic mean to determine using only two line memory per color An LCD monitor display device capable of converting to have a resolution of is provided.

1 is a view showing an enlarged method according to the present invention.

2 is a block diagram showing the configuration of an LCD monitor display device according to the present invention;

3 is a timing diagram showing a relationship between input and output signals according to the present invention.

* Explanation of symbols for main parts of the drawings

10: analog / digital converter 20: microcomputer

30: control signal generator 31: first phase fixed loop (PLL)

32: second phase locked loop 33: input control

34: output control unit 40: horizontal expansion interpolation unit

41: First-in-first-out (FIFO) memory 42: Buffer

43: first arithmetic mean calculation unit 44: horizontal interpolation switch

45: first write operation control unit 46: first read operation control unit

50: vertical expansion interpolation unit 51: first line memory

52: second line memory 53: second arithmetic mean calculation unit

54: vertical interpolation switch 55: second write operation control unit

56: third write operation control unit 57: second read operation control unit

58: third read operation control unit

The LCD monitor display device of the present invention for achieving the above object, the analog / digital converter for converting the input video signal into a digital signal for each color, and receiving the horizontal and vertical synchronization signal to receive the resolution of the input video signal A microcomputer for determining the enlargement ratio and determining the operation of the system according to the determination, a control signal generator for outputting a control signal according to the operation of the system according to the horizontal and vertical synchronization signals and the output signal of the microcomputer, and the analog / Horizontal converter to receive the video signal output from the digital converter sequentially in the line unit to perform horizontal expansion, and to receive the video signal of the horizontal expansion output from the horizontal expansion interpolation unit in the vertical direction It consists of a vertical magnification interpolation section that outputs to a monitor by enlarging It shall be.

According to an exemplary embodiment of the present invention, the control signal generator includes a first phase-locked loop for inputting an input synchronization signal, which is a clock required for sampling an input video signal, to the analog / digital converter, and an output video according to the control signal of the microcomputer. A second phase locked loop for determining and outputting an output synchronization signal, which is a clock required for signal generation, an input controller for performing a division function of the first phase locked loop and controlling a write operation of an input signal; And an output control section for controlling the read operation of the interpolated output signal while performing the division function of the phase locked loop.

Hereinafter, a preferred embodiment of an LCD monitor display device and a display method thereof according to the present invention will be described in detail with reference to the accompanying drawings.

1 is a diagram showing a method of enlarging a video signal according to the present invention.

The present invention first processes an input video signal to determine an enlargement ratio.

When the magnification ratio is determined, as shown in FIG. 1 (a), when the magnification ratio is enlarged, three pixels A1, B1, and C1 are made from two pixels a1 and b1. The first A1 of the three pixels A1, B1, and C1 preserves the data of the first pixel a1 that is input, and the output third pixel C1 is the second pixel B1 that is input. The data of the first pixel a1 and the second pixel b1 inputted are arithmetic averaged.

On the other hand, when the magnification is 1.75 times, seven pixels are made from four pixels as shown in FIG. 1 (b). When the magnification is 1.25 times, four pixels are shown as shown in FIG. 1 (c). Produces five pixels from

2 is a block diagram showing the configuration of an LCD monitor display for performing magnification interpolation according to the present invention.

Referring to FIG. 2, the present invention provides an analog / digital converter 10 for converting an input video signal into a digital signal for each color (R, G, B), and horizontal and vertical synchronization signals (HSYNC, VSYNC). In response to the input and output signal of the microcomputer 20, the horizontal and vertical synchronization signals (HSYNC, VSYNC) and the microcomputer 20 to determine the resolution of the input video signal and determine the magnification ratio accordingly. Accordingly, the control signal generator 30 for outputting a control signal according to the operation of the system, the horizontal signal receiving the video signal output from the analog-to-digital converter 10 sequentially in line units to perform horizontal expansion The executive part 40 and the vertical magnification interpolation part 50 which receives the video signal of the horizontal magnification output from the horizontal magnification interpolation part 40 and performs the vertical direction magnification and output it to the monitor. The.

The control signal generator 30 includes a first phase locked loop (PLL) 31 for inputting an input synchronization signal, which is a clock required for sampling an input video signal, to the analog-to-digital converter 10, and the microcomputer 20. A second phase locked loop 32 for determining and outputting an output synchronization signal, which is a clock required for generating an output video signal, in accordance with a control signal of and performing a division function of the first phase locked loop 31, and at the same time an input signal. And an input control section 33 for controlling the write operation of the second control circuit, and an output control section 34 for performing the division function of the second phase locked loop 32 and controlling the reading operation of the interpolated output signal.

The horizontal expansion interpolation unit 40 is a first-in first-out (FIFO) memory 41 which sequentially receives video signals output from the analog-to-digital converter 10 in line units and outputs them in the order of input. A buffer 42 for delaying the video signal output from the first memory 41 by a period of one line, and a line delayed from the buffer 42 and the next line output from the first-in first-out memory 41. A horizontal value for selecting and outputting one of a first arithmetic mean calculator 43 that receives data and performs an arithmetic mean, and a video signal output from the first-in first-out memory 41 and the first arithmetic mean calculator 43 It is composed of an interpolation switch 44. In this case, a first write operation controller 45 and a first read operation controller 46 are connected to the first-in first-out memory 41.

The vertical magnification interpolator 50 may include first and second line memories 51 and 52 that receive a video signal of a horizontal magnification output from the horizontal magnification interpolator 40 for each line, and the first first and second line memories 51 and 52. And a second arithmetic mean calculation unit 53 which receives data from the second line memories 51 and 52 and performs arithmetic mean, and calculates the first and second line memories 51 and 52 and the second arithmetic mean. And a vertical interpolation position 54 for selecting and outputting one of the video signals output from the unit 53. In this case, second and third write operation controllers 55 and 56 and second and third read operation controllers 57 and 58 are connected to the first and second line memories 51 and 52, respectively.

In addition, the second line memory 52 is input with the next line data of a line input to the first line memory 51.

Referring to the timing diagram of FIG. 3 attached to the operation of the present invention configured as described above in detail as follows.

First, the video signal input to the analog-to-digital converter 10 is converted into a digital signal in synchronization with an input synchronization signal output from the first phase lock loop 31 of the control signal generator 30 for each color. .

The digitally converted video signal is converted according to the resolution of the output monitor while passing through the horizontal magnification interpolation unit 40 and the vertical magnification interpolation unit 50 for each color (R, G, B), and the microcomputer 120. The video signals R ', G', and B 'converted according to the output horizontal and vertical synchronizing signals HSYNC' and VSYNC 'set by the second phase-locked loop 32 are output by the control signal of.

For example, when a VGA GRAPHIC video signal is used as an input signal, it is as follows.

The VGA GRAPHIC video signal has a horizontal resolution of 640 * vertical 480 and has a horizontal frequency fH = 31.5 Hz and a vertical frequency fV = 60 Hz. In FIG. 3, reference numerals a1, b1, a2, b2, etc. denote scan lines, and 640 pixels horizontally for one scan line are applied to each scan line after the horizontal interpolation unit 40 performs horizontal interpolation. 1.5 times magnification for 960 pixels. In addition, when vertical interpolation is performed in the vertical enlarged interpolation unit 50, the vertical interpolation unit is enlarged by 1.5 times to change the 480 lines to 720 lines. At this time, the horizontal synchronizing signal HSYNC 'in the output video signal is increased by an enlargement ratio compared to the horizontal synchronizing signal HSYNC which is input, but the vertical synchronizing signal VSYNC' is the same as the input vertical synchronizing signal VHSYNC.

As described above, the LCD monitor display device of the present invention can optimize the size of the line memory used for the enlarged interpolation to make the enlarged interpolator into one chip, thereby enabling a low-cost system configuration. It works.

In addition, since newly generated pixel data is determined as the arithmetic mean value of the front and rear pixels, the image shape of the original video signal can be enlarged without being damaged, and the deterioration of image quality can be prevented.

Claims (2)

An analog / digital converter that converts an input video signal from an external source into a digital signal for each color, and receives horizontal and vertical synchronization signals to determine the resolution of the input video signal and to determine the enlargement ratio accordingly. A microcomputer for determining a signal, a control signal generator for outputting a horizontal and vertical synchronization signal, and a control signal according to the operation of the system according to whether the microcomputer is determined, and a video signal output from the analog / digital converter sequentially A horizontal magnification interpolation unit for receiving horizontal expansion and a horizontal magnification interpolation unit for receiving a video signal having a horizontal magnification outputted from the horizontal magnification interpolation unit, and performing vertical magnification to output to a monitor Consisting of; The horizontal enlarged interpolation unit receives a video signal output from the analog-to-digital converter 10 sequentially in line units and outputs a first-in first-out (FIFO) memory 41 and the first-in first-out memory 41. A first arithmetic mean that receives a buffer for delaying the video signal outputted by the line by one line, the data delayed by the buffer, and the data of the next line output from the first-in first-out memory And a horizontal interpolation switch for selecting and outputting one of a video signal output from the first-in first-out memory and the first arithmetic mean calculating unit, wherein the vertical magnification interpolation unit is output in the horizontal direction from the horizontal magnification interpolation unit. First and second line memories for receiving a video signal, each line of which has been enlarged, and the first and second line memories A second arithmetic mean calculator configured to receive data and perform arithmetic mean, and a vertical interpolation switch for selecting and outputting one of video signals output from the first and second line memories and the second arithmetic mean calculator. LCD monitor display device. The method of claim 1, wherein the control signal generator is a first phase locked loop for inputting an input synchronizing signal, which is a clock required for sampling an input video signal, to the analog / digital converter, and an output video signal according to the control signal of the microcomputer. A second phase locked loop for determining and outputting an output synchronization signal which is a clock required for generation, an input controller for performing a division function of the first phase locked loop and controlling a write operation of an input signal, and the second phase locked loop And an output control unit for performing a loop division function and controlling a read operation of the interpolated output signal.

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