KR0174401B1 - Spatial Switching Device Using Asynchronous RAM and Multiplexer - Google Patents

Abstract

The present invention relates to a space switching device of TU12 unit using 3 port asynchronous RAM (RAM) and MUX, 19M, 72K, 18K, fixed pile position, Timing generating means (10) for outputting a timing signal such as a selection control signal; Write and read ports are connected to external CPU ports using 3-port asynchronous memory, which is a connection matrix memory, and the remaining read ports are connected to read addresses in 38M units by the timing generating means 10 to output TU12 data of a specific bus. CPU connection means 20 for outputting a selection signal; By receiving external 38M system clock and data and performing the functions such as BIP calculation, extraction, comparison test, accumulation, etc. for 2K frames for verifying transmission error at the front end by the control of the timing means 10, the output is performed. A plurality of shear switching means 30; A plurality of multiplexing means (40) for receiving data from the plurality of front end switching means (30) and performing a spatial switching function by a selection signal of the CPU connection means (20) to output data; And 2K retiming the data output from the memory output units of the multiplexing means 40 to 38M class to receive stable data and detect a transmission error in the next stage ASIC of the timing generating means 10. In the TU12 unit space switch using the L bus (38M) having a rear end switching means 50 for calculating, inserting, and outputting the BIP during the frame, transmission error detection and three ports in the L bus unit are performed. By using only memory and simple mux, it is possible to provide a space switch with a simple configuration, and by preparing a double structure of a connection matrix memory, it is possible not only to prevent the loss of switching data when switching is changed, but also to reduce the available network using the memory. There is an effect that can prevent problems that may occur during layout.

Description

Spatial Switching Device Using Asynchronous RAM and Multiplexer

1 is an overall configuration diagram of a space switch network to which the present invention is applied.

2 is a characteristic diagram of an input / output signal applied to the present invention.

3 is a block diagram of an embodiment of a spatial switching device using an asynchronous RAM and a multiplexer according to the present invention.

* Explanation of symbols for main parts of the drawings

10: timing signal generator 21 to 32: space switch

33: input switching unit 35: output switching unit

40: connection part 34, 43: multiplexer

41, 42: Asynchronous RAM

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a spatial switching device in a wideband digital cross-switch system of TU (Tributary Unit) 12 units based on synchronous digital hierarchy (SDH). In particular, the present invention relates to an asynchronous RAM having one input port and two output ports. The present invention relates to a spatial switching device using a random access memory (MUX) and a multiplexer (MUX).

In a network, switching is a widely used function in transmission devices as well as exchanges. In order to perform such a switching function, the use of an analog relay in the past has now been performed using a digital memory to perform the switching function.

Recently, due to the rapid development of integrated circuits, large-capacity switches are becoming ASICs, which are highly integrated circuits. A general switch is divided into a time switch that changes the position of data in time and a spatial switch that performs spatial position movement. In general, most of the switch networks have a three-stage structure of time / space / time for applying them together.

In the TU12 unit switch network to which the present invention is applied, it is designed based on the concept that there is no complete blocking that can be switched without rearranging the switching paths in service during line congestion.

In the conventional space switch having such characteristics, there are many problems in that it is designed to use a latch or a flip-flop, and thus it is difficult to make a large scale / integration. In particular, there are more than 1500 corresponding channels like the TU12 unit space switch to which the present invention is applied. If not, the current ASIC design / manufacturing level would not be possible, and even if the memory was used, it would not be easy to simultaneously implement an external CPU (center processor unit) and a multiplexer at the same time.

As a result, a large amount of nets are generated when designing with a certain logic, which places a lot of constraints on layout and layout, and because the connection matrix memory itself is difficult to be duplicated, many obstacles occur during switching. There was a problem.

Accordingly, the present invention has been made to solve the above problems, in the SDH-based TU12 wideband digital cross-switch system, by using a clock input from the outside to control the switching timing, switching control input from the outside It is an object of the present invention to provide a spatial switching device capable of preventing loss of data when switching paths are changed by temporarily storing and selectively using signals to adjust switching changes.

In order to achieve the above object, the present invention provides a spatial switching device for switching at least one input signal to a desired signal path. Timing signal generating means for providing a timing signal for adjustment; At least one spatial switching means for selecting a signal path to which the input signal is to be transmitted and switching to a selected path according to the timing signal and a switching control signal transmitted from the outside; And at least one connection means for transmitting the switching control signal to the spatial switching means in accordance with the timing signal, wherein each of the connection means receives the switching control signal from the outside through one input port and temporarily stores the switching control signal. First and second asynchronous RAMs (RAM: Random Access Memory) for outputting through the first and second output ports; And a multiplexer for selectively transferring the switching control signals transmitted through the first output ports of the first and second asynchronous RAMs to the spatial switching means.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 is an overall configuration diagram of a spatial switch network to which the present invention is applied and shows a switching network without a blocking probability of TU12 unit 5044 × 5044 using a time switch and a spatial switch.

The input time switch 1 inputs 252 channels of TU12 unit signals, spatially expands them so that there is no blocking probability, and maps them to 504 TU12 unit signals one-to-one. Therefore, in the space switch 2, the L bus BUS is collected for each output line from the input time switch 1 and switched. The output time switch 3 performs the reverse process of the input time switch 1. One output time switch 3 receives four L buses and performs a switch of TU12 unit 504 X 252.

2 is a block diagram of an input / output signal corresponding to L BUS which is a connection signal according to the present invention.

The L bus has a 38 Mbps signal with a simple four-division of 155 Mbps STM-1 signal and a 19 Mbps signal with eight caress. Based on the 38 Mbps class, it is synchronized with the clock generated by simply dividing the 155 Mbps class STM-1 signal, and there are 12 fixed dummy bytes in this L bus (ie, 38 Mbps class). (F) and six pseudo dummy bytes (D) exist. In combination with 126 TU12 channels, it appears that there are 12 fixed piles and 132 TU12 channels.

3 is a block diagram of an embodiment of a spatial switching device using an asynchronous RAM and a multiplexer according to the present invention.

As shown in FIG. 3, the spatial switching device of the present invention receives a system clock (38 Mbps CLOCK) and a frame clock (2K) input from the outside and adjusts a timing for adjusting switching timing of data input from the outside. A path selected by selecting a signal path to which data is to be transmitted according to a timing signal generator 10 for providing a signal, a timing signal transmitted from the timing signal generator 10, and a switching control signal transmitted from an external CPU And a plurality of space switches 21 to 32 for switching to the plurality of space switches, and a connection portion 40 for connecting the switching control signals input from the CPU to the plurality of space switches 21 to 32.

The plurality of space switches 21 to 32 each include an input switching unit 33 for branching and switching data input from the outside into twelve data according to the timing signal transmitted from the timing signal generator 10, and a connection unit. The multiplexer 34 selects and outputs one of the output data of the input switching unit 33 according to the switching control signal transmitted from the 40, and the timing signal transmitted from the timing signal generator 10. Accordingly, an output switching unit 35 for switching the output signal of the multiplexer 34 to the outside is provided.

The connection part 40 has one input port for receiving a switching control signal from the CPU, a first output port connected to the multiplexer 43 and a second output port connected to the outside, and the switching control input through the input port. The 132x4 asynchronous RAMs 41 and 42 that are temporarily stored and output through the first and second output ports and the switching control signals transmitted through the first output ports of the asynchronous RAMs 41 and 42 are stored in a plurality of spaces. A multiplexer 43 is provided for selectively delivering to the multiplexer 34 of the switches 21 to 32.

If you want to change the value of the connection matrix by designing the connection matrix memory as a 3-port memory and double-structuring it, select another memory, change the value, and then reflect the changed connection matrix value when you want to actually switch. Lowering has the function to change the value at the proper timing.

Therefore, except for the connection matrix memory, only the simple multiplexer 34 for performing the spatial movement of the input data needs to exist as many as the number of input buses. Since the output of the dual structured connection matrix memory is connected to the selection terminal of the multiplexer 34 and the L bus containing TU12 unit data moves in 38M units, the corresponding address value is counted every 38M units in the connection matrix memory. After extracting, we perform the spatial switching function.

Looking at the input signal processing process, input data corresponding to the 38M L bus (BUS) is connected to the space switch, and 132 (here, 126 are TU12) and 6 are connected in the connection signal L bus (for 38M). TU12 signal and 12 fixed pile signals. The input switching unit 33 of the switch ASIC performs a bit interleaved parity (BIP) extraction / checking function to ensure the integrity of the corresponding bus, and the input data after the BIP processing is processed in units of 132 TU12 channels including a fixed pile. It is passed to the multiplexer 34.

Multiplexer 34 of multiple spatial switches 21-32 spatially switches the TU12 channels of twelve input L buses. In addition, the output switching unit 35 of the plurality of space multiple space switches 21 to 32 performs a BIP generation / insertion process so that the ASIC input unit of the next stage can check the transmission path problem.

Regarding the connection matrix memory, 12 connection matrix memories are required per L bus, which is equal to the TU12 signal of the input signal, and are transmitted to the input of the 12: 1 multiplexer 34. Therefore, if the size of the memory is 4 bits and 132 words exist, do. This concatenation matrix memory has a double buffer structure so that it can be safely executed even when the concatenation matrix value is changed. In particular, this asynchronous memory has three ports and is divided into a port connected to the read process of the CPU, a port connected to the write process, and a port connected to the selection terminal of the multiplexer 34.

Referring to the operation of the spatial switching device of the present invention having the structure as described above in detail as follows.

The input switching unit 33 functions to calculate, extract, compare, and accumulate BIP for 2K frames in order to verify transmission failure at the front end. At this time, the byte used to store the BIP calculation result uses one byte of the fixed dummy. The 38M system clock is used as a single clock.

The multiplexer 34 receives data from the 12 input switching units 33 and performs a spatial switching function in units of L buses to TU12 except 12 fixed stacks for every 72K. Since the multiplexer 34 allocates a corresponding slot so that the input time switch does not have the same output port in the same time slot per 12 input buses, 12 12: 1 multiplexers may be present.

The output switching unit 35 receives the stable data by retiming the data output from the memory output of the multiplexer 34 to 38M class, and calculates the BIP for 2K frames to detect transmission failure in the next ASIC. To insert. Inserted bytes also use a fixed stack.

The timing signal generator 10 receives the 38M clock and the 2K frame clock and outputs timing signals for controlling the 19M, 72K, 18K fixed pile positions, and the data transfer timing of the multiplexer 34.

The connection unit 40 uses a three-port asynchronous memory that is a connection matrix memory. 3 port means 1 port of write port, 2 ports of read port, and 2 ports of write and read port are connected to external CPU port and the other read ports are connected to read address in 38M unit from timing signal generator 10 and multiplexer ( It is connected to the selection terminal of 34) and used to output TU12 data of a specific bus.

As described above, in the TU12 unit space switch using the L bus, the present invention can provide a spatial switch having a simple configuration using only the L bus unit transmission failure detection and a 3-port memory and a simple multiplexer. In addition to preventing the loss of switching data even when switching is changed by preparing a dual structure of memory, it basically includes many nets, which makes it difficult to arrange and lay out, but uses memory. By reducing the net as much as possible, it is possible to prevent many constraints that may occur during layout.

Although the technical idea of the present invention has been described in detail according to the above preferred embodiment, it should be noted that the above-described embodiment is for the purpose of description and not of limitation. In addition, those skilled in the art will understand that various embodiments are possible within the scope of the technical idea of the present invention.

Claims (2)

A spatial switching device for switching at least one input signal to a desired signal path, comprising: generating a timing signal for receiving a system clock and a frame clock input from an external device and providing a timing signal for adjusting switching timing of the input signal; Way; At least one spatial switching means for selecting a signal path to which the input signal is to be transmitted and switching to a selected path according to the timing signal and a switching control signal transmitted from the outside; And at least one connecting means for transmitting the switching control signal to the spatial switching means in accordance with the timing signal, wherein each of the at least one connecting means is external to the switching control signal through a first port for writing. The first and second asynchronous RAM (RAM: Random) to receive and temporarily store, output to the spatial switching means through the second port for reading, and outputs to the outside through the third port for reading Access Memory); And a multiplexer for selectively transmitting a switching control signal transmitted through each of the second ports provided in the first and second asynchronous RAMs to the spatial switching means. Space switching device used. The apparatus of claim 1, wherein each of the at least one spatial switching means comprises: input switching means for branching and switching the input signal into a plurality of signals according to the timing signal; Selecting means for selecting and outputting one of the output signals of the input switching means according to the switching control signal transmitted from the connecting means; And an output switching means for switching the output signal of the selecting means to the outside according to the timing signal.