KR0170634B1 - Circuit of automatically controlling clamp level - Google Patents

Abstract

In a receiving apparatus for receiving a mute signal, a level judgment unit generates a level adjustment control signal by judging the clamp level of the mute signal to a predetermined level, and a level adjustment control signal of the level decision unit in response to the clamp section of the mute signal. A clamp signal section window section for outputting and a level adjusting section for adjusting a clamp level received in response to the level adjustment control signal through the clamp signal section window section to a desired level are provided. By extracting the loaded clamp level, the specified level ( If not), it is possible to prevent the deterioration of image quality due to the stability of the system and the instability of the clamp level by controlling by using the counter.

Description

Clamp Level Automatic Control Circuit

1 is a block diagram of a general MUSE / NTSC conversion circuit.

2 is a block diagram showing an embodiment of a clamp level automatic adjustment circuit according to the present invention.

3 is a block diagram of the mute transmission signal.

4 is a state diagram according to the address signal level of a ROM.

5 is a state diagram during the clamp execution section.

* Explanation of symbols for main parts of the drawings

5: Clamp section window signal 10, 20: D flip flop

30: level determining unit 40, 50: NAND gate

60, 70: counter 80: D / A converter

90, 110, 130: Amplifier 100: A / D converter

120: low pass filter 140: level adjustment unit

150: clamp signal section window portion SW1: switch

C1 to C3: Capacitors R1 to R4: Resistance

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a clamp circuit among MUSE / NTSC converters in a video signal clamp circuit. In particular, a clamp level included in a MUSE signal input to the MUSE / NTSC converter is extracted and compared with a predetermined level. And a clamp level automatic control circuit for controlling the input video signal to be clamped at a predetermined level.

In general, the MUSE / NTSC converter converts the MUSE (Multiple Sub-Nyguist Sampling Encoding) signal, which is a transmission method of HDTV (High Definition Television), which has been introduced as the next generation TV in Japan, to the NTSC (National Television System Committee) signal, a conventional TV method. It is a means to switch over, or a means to watch Hi-Vision broadcasts on HDTV with the current TV receiver. The typical functions of the MUSE / NTSC converter are the conversion of the injection player (from 1125 to 525) and the aspect ratio (from 16: 9 to 4: 3).

Referring to FIG. 1, the configuration of the MUSE / NTSC converter is as follows. An input signal is input to a low pass filter, an output of the low pass filter is input to a clamp circuit, and an output of the clamp circuit is input to an analog / digital converter.

The output of the analog / digital converter is coupled to the scan line converter circuit and the audio signal processing circuit, respectively, and the output of the scan line converter circuit is coupled to three digital / analog converters. The three digital to analog converters are further coupled with three low pass filters and the outputs of the three low pass filters are input to the NTSC encoder and the luminance and chroma signal separation encoders, respectively. In addition, the voice signal processing circuit is coupled to two digital filters, the two digital filters are respectively coupled to two digital to analog converters, and the digital to analog converters are respectively coupled to two low pass filters.

According to the operation of the configuration, the Muse signal inputted through the input terminal is cut through the low pass filter of 8.1 MHZ band, and unnecessary high-pass components are blocked, and the DC frequency is reproduced by the clamp circuit. Is converted to digital. The digitally converted video signal is converted into 3 signals of Y, RY and BY of the scanning player 525 from 1125 muse signals through the scanning player conversion circuit, and the Y signals are 10.08 MHZ RY and BY signals from 2.5 MHZ to analog. After the conversion, each low pass filter is output as Y, RY, BY signals of analog signals. The three signals are encoded by an NTSC encoder and a luminance and chroma signal separation encoder to output a predetermined signal. The output signal is an NTSC signal. The functions of the MUSE / NTSC converter for the video signal are listed. The first intermediate clamp circuit generally reproduces and inserts a DC component at a predetermined value when receiving a video signal so that efficient internal signal processing can be performed inside the receiving system to reproduce correct colors and improve system stability. Use to do

Until now, in general clamping method, the potential is fixed by inserting the DC component forcibly regardless of the signal transmitted by using the transistor and diode.In the mute method, the clamp level is applied to 563 and 1125 lines of the muse transmission signal type at the transmitting side. When (a and b in Fig. 5) were inserted and transmitted, only the clamp level could be checked at the receiving side, but control of the clamp level was impossible.

In other words, in the Muse method up to now, even if the clamp level is not properly matched, the screen is unclear and the color is unclear, there is a problem that there is no way to control it.

Accordingly, an object of the present invention is to provide a clamp level automatic adjustment circuit for extracting a clamp level from a muse input signal and clamping an input image signal at a predetermined level when it is not a predetermined level, thereby ensuring correct color reproducibility and safety of the system.

A receiving device for receiving a mute signal for achieving the above object, comprising: a level determination unit for generating a level adjustment control signal by judging and comparing a clamp level of the mute signal with a predetermined level, and a level adjustment control signal of the level determination unit; And a clamp signal section window section for outputting the clamp section in response to the clamp section of the mute signal, and a level adjusting section for adjusting the received clamp level to a desired level in response to a level adjustment control signal through the clamp signal section window section. It is done.

Hereinafter, with reference to the accompanying drawings will be described in detail.

2 is a block diagram showing an embodiment of a clamp level automatic adjustment circuit according to the present invention.

The output of the Broadcasting Satellite (BS) tuner is input to the coupling capacitor, the output of the coupling capacitor C3 is input to the amplifier 130, and the output of the amplifier is input to the low pass filter 120.

The low pass filter 120 is coupled to the contact of the resistor R1 and the capacitor C2, the other end of the resistor is connected to the ground and the other end of the capacitor C2 is coupled to the amplifier 110.

The output of the amplifier 110 is input to the analog / digital converter 100, one end of the output of the analog / digital converter is input to the D flip flop 10 and the other end is input to the next stage of the system.

The output of the D flip flop 10 is input to the level determining unit 30, one of the outputs of the level determining unit (Q3) is input to the NAND gate 40 and the other (Q2) is another NAND gate. It is entered as (50).

The clock is also input to two NAND gates 40 and 50 and two D flip flops 10 and 20, respectively. The output of the NAND gate 40 is coupled to the DN terminal of the counter 60 and the output of the NAND gate 50 is coupled to the UP terminal of the counter 60. The DN and UP terminals of the counter 60 are counters. It is coupled to the DN and UP terminals of (70). The output of the counter 70 is input to a digital / analog converter and the output of the digital / analog converter is coupled to the + terminal of the amplifier 90 via a resistor R2. The variable resistor R4 is coupled between the contact between the resistor R2 and the amplifier terminal and ground, one end of the output of the amplifier is coupled to the negative terminal of the amplifier, and the other end is coupled to one end of the switch SW1. .

A capacitor C1 is coupled between one end of the switch SW1 and ground, and the other end of the switch SW1 is fed back between the capacitor C2 and the amplifier 110 via a resistor R3. Referring to the operation according to the configuration, the Muse signal (Carrier freqruency: 1.2GHZ) input through the BS antenna (Broadcasting Satellite Antenna) is demodulated and tuned to the base band of 8.15MHZ band in the BS tuner unit (Coupling Condenser) After passing through), DC component is removed and only AC component passes. The muse signal, in which only the AC component remains, is passed through the amplifier 130 and gain-adjusted to fit the operating area required for the analog / digital converter in the rear stage, and is input to the low pass filter 120. The low pass filter 120 is a mute signal gain-adjusted by the amplifier 130 (typically 0-2Vp-p) is passed through an analog low pass filter that acts as an analog / digital converter pre-filtering Limited to the required band.

The band-limited muse signal is inserted with a clamp level (DC regeneration) by R1 and C2 serving as integrators. The Muse signal inserted with the clamp level is input to the analog / digital converter 100 through the amplifier 110 acting as a buffer. The Muse signal is converted to digital through the analog-to-digital converter, and one end is output to the next stage of the system, and the other end is input to the D flip-flop, wherein the function of the D flip-flop 10 is a clock. In time, the signal is delayed to the next stage in accordance with the synchronization and serves to deliver the level decision, that is, the ROM (30). The level determiner uses a LUT (Look Up-Table) for controlling the value of the clamp level by setting the clamp level (direct current component) of the digitalized muse signal as the address of the level determiner. In the LUT method, the level of the input mute signal (ROM address signal) When the value is set to 0, the value of level decision (ROM) is stored so that a value of 0 is output to 1 Q2 terminal of the output data pin. When the value is 0, 0 is stored in the Q3 terminal so that the 1 value is always output in the Q2 terminal. When the value is 0, the contents for outputting the Q2 and Q3 0 values are stored, and the size of the input clamp level is determined by using the address of the level determining unit (ROM). The output of the level decision unit is input to the NAND gate, and in the NAND gate 40, signals output from the output terminal Q3, the clock terminal, and the output terminals of the D flip flop 20 are input. The other NAND gate 50 receives signals output from the output terminal Q2 of the level decision unit, the clock terminal, and the output terminal of the D flip flop 20. Here, the D flip flop 20 receives a clamp section window signal and delays time to input the two NNAD gates.

On the other hand, the two NAND gates (clamp signal section window portion) do not affect the NAND gate output since the output of the D flip flop 20 becomes 1 when the clamp section window signal is input. Therefore, the clamp signal section window unit 150 outputs a signal for raising or lowering the clamp level of the muse signal according to the output of the level determining unit 30, and when the clamp section window signal is not input, the D flip flop 20 ) Output becomes 0, so the NAND gate output (clamp signal section window portion) becomes 1 regardless of the output of the level determiner 30. This maintains the clamp level of the mute signal. That is, the two NAND gates output a signal capable of controlling the clamp level of the muse signal (C in FIG. 5) only during the clamp signal period. Assuming that the clock input is a clamp section window signal of 1, the operation of the counter according to the Q2 and Q3 of the level determining unit is shown in Table 1.

As shown in Table 1, the input level is a reference level. If it is smaller, the counter will go up and the input level will be If it is greater than the counter, the counter goes down and the input level In this case, the input level is maintained as it is. FIG. 4 shows the operation of the counter.

The reason is that one conventional counter using a counter (60,70) 2-2 is also in series 4bit i.e. ²⁴ = 16 because the number to only vary the level to be a 8bit the connection with two series ²⁸ = This is because as many as 256 levels can be changed. This changed clamp level is converted to analog via a digital / analog converter, and then charged to the clamp level charging capacitor C1 of the blocking through the variable resistor R4 and the amplifier 90 having a buffer function. The charged clamp level is input to the buffer amplifier 110 through an analog switch SW1 that is turned on / off by an HD signal representing an HD (horizontal sync signal) section generated and supplied by an internal control signal generator. In this case, as shown in FIG. 3, the switch SW1 is turned on every time the horizontal synchronous signal at the beginning of the line is input to perform the clamp control function, that is, to perform the clamp control function on a line-by-line basis. The period in which the switch SW1 is turned on is shown well in d of FIG.

As described above, the analog muse signal from which the DC component is removed is input to the capacitor C2 located in front of the buffer amplifier 110, and the input time of the H-clamp signal due to the high input impedance of the buffer amplifier 110. During this time the clamp level is charged from C2 to R1. When it is not the input time of the H-clamp signal, a discharge is made in the direction of the buffer amplifier 1100 at C2, and a clamp level which is changed in the mute signal is inserted (direct current component regeneration). The Muse signal with the inserted clamp level is converted into a digital signal by the analog / digital converter 100 and supplied to the signal processing unit inside the system and simultaneously supplied to the clamp level controller so that the clamp level control function can be automatically performed. do.

As described above, the clamp level is applied to the lines # 563 and # 1125 among the mute signals of the input signal 1125 lines. When the clamp level is extracted and controlled, it is possible to prevent the deterioration of image quality due to the stability of the system and the instability of the clamp level.

Claims (5)

A receiving apparatus for receiving a mute signal, comprising: a level determining section for generating a level adjustment control signal by comparing and determining a clamp level of the mute signal with a predetermined level; And a clamp signal period window portion for outputting in response to the level, and a level adjustment portion for adjusting the received clamp level to a desired level in response to the level adjustment control signal through the clamp signal period window portion. Circuit. 2. The level determining unit of claim 1, wherein the level of the input mute signal (the address signal of the ROM) is increased. When the value is 0, 0 value is always output at 1 Q2 terminal at Q3 terminal. If the value is 0, 0 is output at the Q3 terminal and 1 value is output at the Q2 terminal. Clamp level automatic control circuit, characterized in that the LUT (Look up Table) ROM is used to output 0 to Q2 and Q3 when the specified clamp level is input. The method of claim 1, wherein the clamp signal section window unit receives a signal output from the output terminal of the level determining unit, a clock signal, and a clamp section window signal, and uses a NAND gate to output one signal even if the input signal is in a zero state. Clamp level automatic control circuit. According to claim 1, wherein the level adjusting unit Counter for raising or lowering the clamp level according to the output of the clamp signal interval window unit, Digital / analog converter for converting the signal output from the counter to the analog, The digital / analog Clamp level automatic control circuit comprising a switch unit for controlling the output signal of the transducer to feed back or not feedback to the clamp level insertion stage in accordance with the horizontal synchronization signal. 5. The clamp level automatic adjustment circuit according to claim 4, wherein the switch unit is turned on when the clamp horizontal synchronization signal is input and turned off otherwise.