JPS647448U - - Google Patents

Description

[Brief explanation of the drawing]

Figure 1 is an external view of an embodiment of the present invention, Figure a is a front view, Figure b is a top view, Figure c is a side view, Figure 2 is an overall circuit configuration diagram of this embodiment, Figure 3 Figures (A-F
) is a data configuration diagram of the POCSAG method, Figure 4 is a detailed circuit diagram of the communication control circuit, and Figure 5 is the CP
FIG. 6 is an operation flowchart and timing chart of the communication control circuit, FIG. 7 is a diagram showing a part of the configuration of the RAM, FIG. 8 is a flowchart showing the overall processing, and FIG. FIG. 9 is a flowchart of reception interrupt processing. 10...Radio reception circuit, 11...Communication control circuit, 12...CPU, 46...RAM.

Claims (1)

[Claims for Utility Model Registration] (1) A paging receiver that compares the received calling number with its own preset calling number and when they match, measures the time in a paging receiver that captures the broadcast information following the said calling. a clock means; a storage means for storing a plurality of pieces of notification information and reception times of the information;
Paging reception characterized by comprising: erasing means for comparing the reception time with the current time measured by the clock means and erasing information with low importance and old reception time based on importance data included in the notification information. Machine. (2) The paging receiver according to claim 1, wherein the erasing means erases the notification information when the storage capacity of the storage means is exceeded.