JPS6459542A - Single chip microcomputer - Google Patents

Single chip microcomputer

Info

Publication number
JPS6459542A
JPS6459542A JP62218218A JP21821887A JPS6459542A JP S6459542 A JPS6459542 A JP S6459542A JP 62218218 A JP62218218 A JP 62218218A JP 21821887 A JP21821887 A JP 21821887A JP S6459542 A JPS6459542 A JP S6459542A
Authority
JP
Japan
Prior art keywords
instruction
runaway
program
bit
rom
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62218218A
Other languages
Japanese (ja)
Inventor
Wataru Okamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62218218A priority Critical patent/JPS6459542A/en
Publication of JPS6459542A publication Critical patent/JPS6459542A/en
Pending legal-status Critical Current

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  • Detection And Correction Of Errors (AREA)
  • Debugging And Monitoring (AREA)
  • Microcomputers (AREA)

Abstract

PURPOSE:To detect the runaway of a program at the time of fetching data other than an instruction code as the instruction code from a ROM to an instruction register due to a cause such as a noise, etc., and to perform an appropriate processing, by attaching a redundant bit on an incorporated ROM, and attaching a simple gate circuit on an execution control part. CONSTITUTION:On the 8th bit of each word in the incorporated ROM, '0' when data stored in 7th-10th bits are the instruction codes and '1' when other than that are stored in advance. When the 8th bit of an instruction register 4 goes to 101='1' in spite of an instruction fetch signal 9='1', the output of a two-input AND gate 102 goes to '1', and a runaway detecting signal 103 is outputted to an interruption control circuit 13. In other words, when the redundant bit is '1' at the time of fetching the instruction code in the instruction register 4, it is assumed as the runaway of the program, and the runaway detecting signal is outputted. Thus, it is possible to detect the runaway of the program and to make a CPU perform a post processing.
JP62218218A 1987-08-31 1987-08-31 Single chip microcomputer Pending JPS6459542A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62218218A JPS6459542A (en) 1987-08-31 1987-08-31 Single chip microcomputer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62218218A JPS6459542A (en) 1987-08-31 1987-08-31 Single chip microcomputer

Publications (1)

Publication Number Publication Date
JPS6459542A true JPS6459542A (en) 1989-03-07

Family

ID=16716463

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62218218A Pending JPS6459542A (en) 1987-08-31 1987-08-31 Single chip microcomputer

Country Status (1)

Country Link
JP (1) JPS6459542A (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58107972A (en) * 1981-12-22 1983-06-27 Fujitsu Ltd Runaway detection circuit for microprocessor
JPS58109957A (en) * 1981-12-23 1983-06-30 Nec Corp Single chip microcomputer system
JPS5847943B2 (en) * 1978-07-27 1983-10-25 新明和工業株式会社 Fillet weld line detection method

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5847943B2 (en) * 1978-07-27 1983-10-25 新明和工業株式会社 Fillet weld line detection method
JPS58107972A (en) * 1981-12-22 1983-06-27 Fujitsu Ltd Runaway detection circuit for microprocessor
JPS58109957A (en) * 1981-12-23 1983-06-30 Nec Corp Single chip microcomputer system

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