JPS6444194A - Sampling clock generator for video signal - Google Patents

Sampling clock generator for video signal

Info

Publication number
JPS6444194A
JPS6444194A JP62201223A JP20122387A JPS6444194A JP S6444194 A JPS6444194 A JP S6444194A JP 62201223 A JP62201223 A JP 62201223A JP 20122387 A JP20122387 A JP 20122387A JP S6444194 A JPS6444194 A JP S6444194A
Authority
JP
Japan
Prior art keywords
signal
video signal
input terminal
frequency
color burst
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP62201223A
Other languages
Japanese (ja)
Other versions
JP2529288B2 (en
Inventor
Masaru Fuse
Tsutomu Tanaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP62201223A priority Critical patent/JP2529288B2/en
Publication of JPS6444194A publication Critical patent/JPS6444194A/en
Application granted granted Critical
Publication of JP2529288B2 publication Critical patent/JP2529288B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Abstract

PURPOSE:To prevent the jitter of a chrominance signal by extracting a color burst signal from an input video signal, amplifying a compared phase output and generating a sampling clock non integer times as large as a chrominance signal sub-carrier. CONSTITUTION:Only the color burst signal is segmented from the input video signal of an NTSC system by a switch 10 and applied to the input terminal A of a color burst signal phase comparator 11. To an input terminal B, the sine wave of about 3.58MHz outputted from a ROM reading system oscillator 14 is inputted at the same timing as the input terminal A. A comparator 11 transforms a phase difference to a DC voltage PV1 and outputs, a direct current is amplified 12, applied to a voltage control crystal oscillator VCXO 13 to oscillate by the frequency of nX566fH(+ or - ) depending on an output voltage. fH indicates a horizontal synchronizing frequency. This is divided in frequency into n in a timing pulse generator 25 to generate the sampling clocks of about 566fH. Thereby, the horizontal synchronizing of a reproducing video signal or the jitter of the chrominance signal is prevented.
JP62201223A 1987-08-12 1987-08-12 Video signal sampling clock generator Expired - Lifetime JP2529288B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62201223A JP2529288B2 (en) 1987-08-12 1987-08-12 Video signal sampling clock generator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62201223A JP2529288B2 (en) 1987-08-12 1987-08-12 Video signal sampling clock generator

Publications (2)

Publication Number Publication Date
JPS6444194A true JPS6444194A (en) 1989-02-16
JP2529288B2 JP2529288B2 (en) 1996-08-28

Family

ID=16437376

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62201223A Expired - Lifetime JP2529288B2 (en) 1987-08-12 1987-08-12 Video signal sampling clock generator

Country Status (1)

Country Link
JP (1) JP2529288B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0379193A (en) * 1989-08-23 1991-04-04 Mitsubishi Electric Corp Time extending device for high vision receiver
JPH06334516A (en) * 1993-05-24 1994-12-02 Nec Corp Pll circuit
WO1996033557A1 (en) * 1995-04-21 1996-10-24 Sony Corporation Method and circuit for synchronizing phase

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0379193A (en) * 1989-08-23 1991-04-04 Mitsubishi Electric Corp Time extending device for high vision receiver
JPH06334516A (en) * 1993-05-24 1994-12-02 Nec Corp Pll circuit
WO1996033557A1 (en) * 1995-04-21 1996-10-24 Sony Corporation Method and circuit for synchronizing phase

Also Published As

Publication number Publication date
JP2529288B2 (en) 1996-08-28

Similar Documents

Publication Publication Date Title
KR890004576A (en) Clock signal generation system
DE3786938D1 (en) PLL STABILIZER CIRCUIT.
MY105383A (en) Display locked timing signals for video processing.
JPH0720249B2 (en) PLL circuit
JPS6444194A (en) Sampling clock generator for video signal
JPH09327030A (en) Clock generator
KR970703682A (en) VIDEO SIGNAL PHASE SYNC-HRONIZING METHOD, CIRCUIT AND SYNTHESIZING APPARATUS
JPS57115092A (en) Time base variation correcting method
JPS5535545A (en) Digital phase synchronous circuit
JPH0382291A (en) Phase synchornizing device
KR910007363A (en) TV system converter
JPS6451712A (en) Clock synchronizing circuit
JPS637078B2 (en)
KR100189052B1 (en) Palm form color ccd camera
KR900003544Y1 (en) Color burst signal extracting circuit
JPS645189A (en) Digital iq demodulating system
JPS54150917A (en) Pal synchronous signal generating system
KR950003023B1 (en) Apparatus for synchronizing subcarrier
JP2503619B2 (en) Phase lock loop device
SU758567A1 (en) Device for shaping colour synchronization signals of video tape recoder
KR970009271A (en) Superimpose device of image half-cycle
JPS63108875A (en) Video signal synchronizing device
JPS6446318A (en) Phase locked loop circuit
JPS62183292A (en) Subcarrier wave signal generating device
JPS61214667A (en) Pulse generating device

Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term
FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20080614

Year of fee payment: 12