JPS6430228A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS6430228A
JPS6430228A JP62185384A JP18538487A JPS6430228A JP S6430228 A JPS6430228 A JP S6430228A JP 62185384 A JP62185384 A JP 62185384A JP 18538487 A JP18538487 A JP 18538487A JP S6430228 A JPS6430228 A JP S6430228A
Authority
JP
Japan
Prior art keywords
holes
layer
taper
sidewalls
connecting holes
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP62185384A
Other languages
Japanese (ja)
Other versions
JP2563180B2 (en
Inventor
Chisato Hashimoto
Katsuyuki Machida
Hideo Oikawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP62185384A priority Critical patent/JP2563180B2/en
Priority to DE3851802T priority patent/DE3851802T2/en
Priority to EP88111550A priority patent/EP0300414B1/en
Priority to KR1019880008981A priority patent/KR920002863B1/en
Publication of JPS6430228A publication Critical patent/JPS6430228A/en
Priority to US08/101,780 priority patent/US5320979A/en
Application granted granted Critical
Publication of JP2563180B2 publication Critical patent/JP2563180B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Landscapes

  • Drying Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE:To eliminate the restriction of a taper angle in the formation of a taper and the conversion difference of pattern on the bottom surfaces of connecting holes and to obtain the connecting holes having a high aspect ratio by a method wherein the sidewalls of the connecting holes are etched with oxygen ions. CONSTITUTION:An Al wiring layer 2, which is used as a first conducting layer, is formed on a semiconductor substrate 1 having a step 1a on its surface and an SiO2 layer 3, which is used as an insulating layer having a flat surface, is formed thereon. Then, through holes 4 and 4', which are used as connecting holes, are opened in the layer 3. After this, a taper is formed on the sidewalls of the holes 4 and 4' through a selective sputter etching using oxygen ions. At this time, as the positions of the lower end parts of the holes 4 and 4' are not almost changed, there is no need to consider the conversion difference of pattern on the lower ends of the holes 4 and 4'. Then, a metal layer is adhered to form a wiring layer 6, which is used as a second conducting layer. In this case, as the sufficient taper is formed on the sidewalls of the holes 4 and 4', the layer 6 can obtain a sufficient film thickness in the holes 4 and 4' even though the aspect ratio of the holes is high.
JP62185384A 1987-07-20 1987-07-27 Method for manufacturing semiconductor device Expired - Fee Related JP2563180B2 (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP62185384A JP2563180B2 (en) 1987-07-27 1987-07-27 Method for manufacturing semiconductor device
DE3851802T DE3851802T2 (en) 1987-07-20 1988-07-18 Method of connecting lines through connection holes.
EP88111550A EP0300414B1 (en) 1987-07-20 1988-07-18 Method of connecting wirings through connection hole
KR1019880008981A KR920002863B1 (en) 1987-07-20 1988-07-19 Wire contecting method by using through-hole
US08/101,780 US5320979A (en) 1987-07-20 1993-08-03 Method of connecting wirings through connection hole

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62185384A JP2563180B2 (en) 1987-07-27 1987-07-27 Method for manufacturing semiconductor device

Publications (2)

Publication Number Publication Date
JPS6430228A true JPS6430228A (en) 1989-02-01
JP2563180B2 JP2563180B2 (en) 1996-12-11

Family

ID=16169865

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62185384A Expired - Fee Related JP2563180B2 (en) 1987-07-20 1987-07-27 Method for manufacturing semiconductor device

Country Status (1)

Country Link
JP (1) JP2563180B2 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59148153A (en) * 1983-02-14 1984-08-24 エヌ・ベ−・フイリツプス・フル−イランペンフアブリケン Optical information recording reader
JPH04132220A (en) * 1990-09-21 1992-05-06 Tokyo Ohka Kogyo Co Ltd Plasma taper etching method
JP2005159368A (en) * 2003-11-27 2005-06-16 Samsung Sdi Co Ltd Flat plate display device

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101033468B1 (en) * 2009-06-30 2011-05-09 주식회사 하이닉스반도체 Phase Change Memory Device Being Able to Improve Resistance of Word Line, Layout Structure of The Same, and Method of Manufacturing The Same

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6127636A (en) * 1984-07-17 1986-02-07 Nec Corp Dry etching process

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6127636A (en) * 1984-07-17 1986-02-07 Nec Corp Dry etching process

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59148153A (en) * 1983-02-14 1984-08-24 エヌ・ベ−・フイリツプス・フル−イランペンフアブリケン Optical information recording reader
JPH04132220A (en) * 1990-09-21 1992-05-06 Tokyo Ohka Kogyo Co Ltd Plasma taper etching method
JP2005159368A (en) * 2003-11-27 2005-06-16 Samsung Sdi Co Ltd Flat plate display device
US7936125B2 (en) 2003-11-27 2011-05-03 Samsung Mobile Display Co., Ltd. Flat panel display

Also Published As

Publication number Publication date
JP2563180B2 (en) 1996-12-11

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Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees