JPS55102235A - Formation of interlayer conductive layer - Google Patents

Formation of interlayer conductive layer

Info

Publication number
JPS55102235A
JPS55102235A JP952979A JP952979A JPS55102235A JP S55102235 A JPS55102235 A JP S55102235A JP 952979 A JP952979 A JP 952979A JP 952979 A JP952979 A JP 952979A JP S55102235 A JPS55102235 A JP S55102235A
Authority
JP
Japan
Prior art keywords
conductive layer
layer
mask
sio
hole
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP952979A
Other languages
Japanese (ja)
Inventor
Taichi Kon
Takaaki Osaki
Norio Matsui
Norio Nishi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP952979A priority Critical patent/JPS55102235A/en
Publication of JPS55102235A publication Critical patent/JPS55102235A/en
Pending legal-status Critical Current

Links

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Weting (AREA)

Abstract

PURPOSE: To obtain a good interlayer conductive layer by using Si3N4 film for the etching stopper and mask when etching SiO2 film.
CONSTITUTION: The conductive layer 2, etching stopper 21 and SiO2 layer 3 are laminated on the substrate 1, the Si3N4 mask 25 is provided on the uppermost face. Since Si3N4 and SiO2 are tightly sticked to each other, the mask 25 is not peeled off although the layer 3 is thick. Thus, when the hole 6 to be reached the stopper 21 is successively etched, the hole of the desired shape and size can be formed with a high precision. Also, since the Si3N4 stopper 21 has a good SiO2-etchant-resistance, the condutive layer 2 is not exposed. Next, when the mask 25 and film 21 of the hole bottm are removed and the conductive layer 7, 8 is evaporated onto the remained face and selectively removed, the upper conductive layer B2, hole H, connecting conductor G and lower conductive layer B1 are formed, the layer 3 becomes an interlayer insulating layer.
COPYRIGHT: (C)1980,JPO&Japio
JP952979A 1979-01-29 1979-01-29 Formation of interlayer conductive layer Pending JPS55102235A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP952979A JPS55102235A (en) 1979-01-29 1979-01-29 Formation of interlayer conductive layer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP952979A JPS55102235A (en) 1979-01-29 1979-01-29 Formation of interlayer conductive layer

Publications (1)

Publication Number Publication Date
JPS55102235A true JPS55102235A (en) 1980-08-05

Family

ID=11722790

Family Applications (1)

Application Number Title Priority Date Filing Date
JP952979A Pending JPS55102235A (en) 1979-01-29 1979-01-29 Formation of interlayer conductive layer

Country Status (1)

Country Link
JP (1) JPS55102235A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5745260A (en) * 1980-08-29 1982-03-15 Mitsubishi Electric Corp Manufacture of semiconductor device
JPS5893260A (en) * 1981-11-30 1983-06-02 Toshiba Corp Manufacture of semiconductor device
JPS5961049A (en) * 1982-09-29 1984-04-07 Fujitsu Ltd Manufacture of semiconductor device
JPH01120340U (en) * 1988-02-05 1989-08-15
JPH0212917A (en) * 1988-04-22 1990-01-17 Philips Gloeilampenfab:Nv Method of forming electrical internal connection of semiconductor device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5329673A (en) * 1976-08-31 1978-03-20 Toshiba Corp Production of semiconductor device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5329673A (en) * 1976-08-31 1978-03-20 Toshiba Corp Production of semiconductor device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5745260A (en) * 1980-08-29 1982-03-15 Mitsubishi Electric Corp Manufacture of semiconductor device
JPS5893260A (en) * 1981-11-30 1983-06-02 Toshiba Corp Manufacture of semiconductor device
JPS5961049A (en) * 1982-09-29 1984-04-07 Fujitsu Ltd Manufacture of semiconductor device
JPH01120340U (en) * 1988-02-05 1989-08-15
JPH0212917A (en) * 1988-04-22 1990-01-17 Philips Gloeilampenfab:Nv Method of forming electrical internal connection of semiconductor device

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