JPS63241636A - Data processor - Google Patents

Abstract

PURPOSE:To flexibly correspond to the alteration of the specification of a device and the change of used environment by providing a means for generating a branching condition set in a branching condition memory which holds the branching condition based on a microinstruction in a control memory and an instruction from the outside. CONSTITUTION:A branching condition generation circuit 4 generates the reference branching condition at the leading time of a data processor and writes it in a memory 3. And the above-mentioned generation circuit 4 dynamically alters and restores a part of the reference branching condition already written in the branching condition memory 3, etc., according to the instruction of the microinstruction read out from the control memory 1 as necessary. An address generation circuit 5 generates the address of the microinstruction which should be read out next from the control memory 1 by modifying the contents of the address field of the microinstruction held in a microinstruction register 2 based on the logical relation between said branching condition in the branching condition memory 3 and hardware information selected from the various kinds of registers group 6 in the device and supplies the address to the address input terminal of the control memory 1.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a microprogram-controlled data processing device used in various data processing systems.

In conventional technical data processing devices, a microprogram consisting of a group of microinstructions is stored in a control memory, and control is executed by reading the microinstructions one by one from the control memory (microprogram control type). is widely used.

In such a data processing device using a microprogram control method, various states of the hardware are selected and specified by microinstruction instructions, and a branch condition generation circuit realized only by hardware determines the storage address of the next microinstruction to be executed. has been decided.

Problems to be Solved by the Invention In the conventional microprogram control type data processing device described above, the branch condition generation circuit is realized only by hardware, so the scale becomes excessive in order to realize a wide variety of conditions. In addition to this, there is also the problem that it is difficult to make subsequent changes to the specifications.

In particular, since it is realized only by hardware, it is not possible to make dynamic changes during operation, and therefore it is necessary to provide separate hardware and microprogram routines even when conditions are slightly different. There is a problem that the amount and the number of microprogram steps increase.

Structure of the Invention Means for Solving the Problems The data processing device of the present invention includes a branch condition memory that holds branch conditions, and a branch condition that is set in the branch condition memory by a microinstruction in a control memory or an external instruction. A branch condition generation circuit generates a branch condition based on the branch condition memory, hardware information in the device, and the microinstruction to be read next from the control memory based on the contents of the address field of the microinstruction held in the microinstruction register. By supporting branch control with software, the hardware load on the branch condition generation circuit is reduced, and the number of program steps due to dynamic changes in conditions is reduced. It is configured to allow.

Hereinafter, the operation of the present invention will be explained in detail together with examples.

Embodiment FIG. 1 is a block diagram showing the configuration of a data processing device according to an embodiment of the present invention.
3 is a microinstruction register, 3 is a branch condition memory, 4 is a branch condition generation circuit, 5 is an address generation circuit, and 6 is a group of various registers within this data processing device.

A microprogram consisting of a group of microinstructions is stored in the control memory l, and the microinstructions read from the microprogram are held in the microinstruction register 2.

The branch condition generation circuit 3 generates a branch condition based on a microinstruction read out from the control memory 1 and executed, an instruction from outside the device, etc., and writes this into the branch condition memory 3. That is, the branch condition generation circuit 4 generates a standard branch condition and writes it into the branch condition memory 3 when the data processing device is started up. Further, the branch condition generation circuit 4 dynamically changes or restores some of the standard branch conditions written in the branch condition memory 3 according to instructions from microinstructions read out from the control memory 1. .

The address generation circuit 5 generates an address field of the microinstruction held in the microinstruction register 2 based on the logical relationship between the corresponding branch condition in the branch condition memory 3 and hardware information selected from the various register groups 6 in the device. By modifying the contents of , the address of the next microinstruction to be read from the control memory 1 is generated, and this is supplied to the address input terminal of the control memory 1.

Effects of the Invention As explained in detail above, the data processing device of the present invention has a branch condition memory that holds branch conditions, and a branch condition that is set in this branch condition memory by a microinstruction in the control memory or from an external source. Since the configuration includes a branch condition generation circuit that generates based on instructions and supports branch control using software, various effects such as those described below can be achieved.

Since branching conditions can be easily changed, it is possible to flexibly respond to changes in device specifications and changes in the usage environment.

By rewriting branch conditions, multiple functions can be realized with a single piece of hardware or microinstruction. This improves design efficiency and reduces development costs.

Since the contents of the branch condition memory can be changed by the microinstruction itself, dynamic branch control can be performed according to the movement of the microprogram, and the number of steps in the microprogram can be reduced.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the configuration of a data processing device according to an embodiment of the present invention. DESCRIPTION OF SYMBOLS 1... Control memory, 2... Micro instruction register, 3... Branch condition memory, 4... Branch condition generation circuit, 5... Address generation circuit, 6... Various register groups.

Claims (1)

[Claims] A control memory in which a microprogram is stored, a microinstruction register that holds microinstructions read from the control memory, a branch condition memory that holds branch conditions, and a control memory set in the branch condition memory. a branch condition generation circuit that generates a branch condition based on a microinstruction in the control memory or an instruction from the outside; hardware information that displays the contents of this branch condition memory and a hardware state within the device; and the microinstruction register. 1. An address generation circuit that generates an address of a microinstruction to be read next from the control memory based on the contents of an address field of a microinstruction held in the control memory.