JPS63174445A - Transmission/reception system for enciphered data - Google Patents

Transmission/reception system for enciphered data

Info

Publication number
JPS63174445A
JPS63174445A JP62006705A JP670587A JPS63174445A JP S63174445 A JPS63174445 A JP S63174445A JP 62006705 A JP62006705 A JP 62006705A JP 670587 A JP670587 A JP 670587A JP S63174445 A JPS63174445 A JP S63174445A
Authority
JP
Japan
Prior art keywords
circuit
transmission
output
random number
generation circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62006705A
Other languages
Japanese (ja)
Inventor
Mitsuharu Yano
矢野 光治
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62006705A priority Critical patent/JPS63174445A/en
Publication of JPS63174445A publication Critical patent/JPS63174445A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To prevent a bit error rate from being deteriorated, by eliminating the distortion of a transmission line by an automatic equalizer, and eliminating the random fluctuation of a transmission symbol position added on a transmission side by a random number group generation circuit. CONSTITUTION:The position of a transmission symbol from a transmission symbol generator 1 fluctuates at random by the random number group generation circuit 2 and an adder circuit 3, then, it is inputted to a modulation circuit 4. A transmission signal, after receiving the distortion on the transmission line 5, is demodulated at a demodulation circuit 6. The distortion on the transmission line 5 is eliminated at the automatic equalizer 7. Since an authorized receiver can generate one and the same identical random number as that of the transmission side by the random number group generation circuit 8, it is possible to eliminate the fluctuation of the symbol position added on the transmission side by using a subtractor 9. A decision circuit 10 decides the output of the subtraction circuit 9.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は暗号化データ送受信方式に関する。[Detailed description of the invention] [Industrial application field] The present invention relates to an encrypted data transmission/reception system.

〔従来の技術〕[Conventional technology]

従来、暗号化通信が可能なディジタルデータ伝送方法と
して送信側では情報源からの2値データ系列をある暗号
化アルゴリズムを用いて暗号化された2値データ系列に
変換し、変換後の系列を通常の非暗号化データ伝送装置
に入力し送信し、受信側では受信信号を通常の非暗号化
データ伝送装置に入力し暗号化された2値データ系列を
復元し、この系列に送信側で用いた暗号化アルゴリズム
の逆変換を施すことにより、情報源にて発生したのと同
一の2値データ系列が得られるという方法が知られてい
る。ここで、暗号化アルゴリズムとしては、例えばDB
Sアルゴリズムが用いられる。
Conventionally, as a digital data transmission method that allows encrypted communication, the sending side converts a binary data sequence from an information source into an encrypted binary data sequence using a certain encryption algorithm, and the converted sequence is normally On the receiving side, the received signal is input into a normal non-encrypted data transmission device to restore the encrypted binary data sequence, and this sequence is used on the transmitting side. A method is known in which a binary data sequence identical to that generated at the information source is obtained by performing inverse transformation of the encryption algorithm. Here, as an encryption algorithm, for example, DB
The S algorithm is used.

また、別の方法として、送信側では情報源からの2値デ
ータ系列を通常の非暗号化データ伝送装置に入力し、得
られたアナログ送信信号に対して、あるアルゴリズムに
よって得られる別のアナログランダム信号を加算したの
ち伝送路に送出し、受信側では受信信号から送信側と同
一のアナログランダム信号を減算した信号を通常の非暗
号化伝送装置に入力することにより、情報源にて発生し
たのと同一の2値データ系列を得るという方法も加えら
れている。加算及び減算すべきアナログランダム信号と
しては、例えば雑音発生器の出力をテープレコーダに録
音し、録音されたテープ及びその複製物を送信側及び受
信側にて用いることができる。
Alternatively, on the transmitting side, a binary data sequence from an information source is input to a normal non-encrypted data transmission device, and the resulting analog transmission signal is sent to another analog random number obtained by a certain algorithm. After adding the signals, it is sent to the transmission path, and on the receiving side, the analog random signal that is the same as that on the sending side is subtracted from the received signal, and the signal is input to a normal non-encrypted transmission device. A method has also been added to obtain the same binary data series as . As the analog random signal to be added and subtracted, for example, the output of a noise generator can be recorded on a tape recorder, and the recorded tape and its copy can be used on the transmitting side and the receiving side.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上述の第1の方法においては、通常の非暗号化伝送装置
を有する盗聴者は、少なくとも暗号化された2値データ
系列は入手することができるので、いったんこの2値デ
ータ系列を記録し、その後計算機を用いて、例えば暗号
化に用いた鍵をしらみつぶしにあたることにより、これ
を解読してしまうという危険性が存在する。
In the first method described above, an eavesdropper who has a normal non-encrypted transmission device can obtain at least the encrypted binary data sequence, so he records this binary data sequence once and then There is a risk that, for example, by using a computer to exhaustively destroy the key used for encryption, the key may be deciphered.

また、第2の方法においては、通常の非暗号化伝送装置
を有する盗聴者といえども、アナログランダム信号を減
算しない限り、伝送装置は正常に動作しないので2値デ
ータ系列自体これを入手することができず、従ってこの
方法は第1の方法と比較して解読される危険性が少ない
と言える。しかしながら、この方法においては、伝送路
において歪みが加わるときには、受信側では送信側で加
えたアナログランダム信号そのものではなく、それに歪
みが加わった後の信号を減算する必要があり、伝送路の
歪みはあらかじめこれを知ることはできないから、この
減算を正確に行う事は一般に困難である。従って、その
減算の正確さの程度によっては少なくともビット誤り率
の劣化、もしくはまったく受信不能といったことが起こ
りうる。
In addition, in the second method, even if an eavesdropper has a normal non-encrypted transmission device, the transmission device will not operate properly unless the analog random signal is subtracted, so he cannot obtain the binary data sequence itself. Therefore, it can be said that this method has less risk of being deciphered than the first method. However, in this method, when distortion is added to the transmission path, it is necessary on the receiving side to subtract the signal after distortion has been added, rather than the analog random signal itself added by the transmitting side, and the distortion in the transmission path is Since this cannot be known in advance, it is generally difficult to perform this subtraction accurately. Therefore, depending on the degree of accuracy of the subtraction, at least the bit error rate may deteriorate, or reception may not be possible at all.

〔問題点を解決するための手段〕[Means for solving problems]

この発明の暗号化データ送受信方式は送信データに応じ
て送信シンボルを発生する送信シンボル発生回路と、乱
数系列を発生する第1乱数系列発生回路と、前記送信シ
ンホル発生回路の出力と前記第1乱数系列発生回路の出
力とを加算する加算回路と、前記加算回路の出力を変調
し送信信号とする変調回路とを送信側に備え、伝送路を
介して受信した前記送信信号を復調する復調回路と、前
記復調回路の出力を等化する自動等化回路と、送信側と
同一の乱数系列を発生する第2乱数系列発生回路と、前
記自動等化回路の出力から前記第2乱数系列発生回路の
出力を減算する減算回路と、前記減算回路の出力を判定
する判定回路とを受信側に備える構成である。
The encrypted data transmission/reception method of the present invention includes a transmission symbol generation circuit that generates transmission symbols according to transmission data, a first random number sequence generation circuit that generates a random number sequence, an output of the transmission symbol generation circuit, and the first random number. a demodulation circuit that demodulates the transmission signal received via a transmission path, the transmission side comprising an addition circuit that adds the outputs of the sequence generation circuit and a modulation circuit that modulates the output of the addition circuit as a transmission signal; , an automatic equalization circuit that equalizes the output of the demodulation circuit, a second random number sequence generation circuit that generates the same random number sequence as that on the transmission side, and a second random number sequence generation circuit that generates the second random number sequence generation circuit from the output of the automatic equalization circuit. This configuration includes a subtraction circuit that subtracts the output, and a determination circuit that determines the output of the subtraction circuit on the receiving side.

〔実施例〕〔Example〕

以下、本発明を図面に基づいて説明する。 Hereinafter, the present invention will be explained based on the drawings.

第1図は本発明の基本概念を示す構成図である。FIG. 1 is a block diagram showing the basic concept of the present invention.

第1図において、]は送信側において送信データに応じ
て送信シンボルを発生する送信シンボル発生回路、2は
乱数系列発生回路、3は加算回路、4は変調回路、5は
伝送路、6は復調回路、7は自動等化器、8は乱数系列
発生回路、9は減算回路、10は判定回路である。
In FIG. 1,] is a transmission symbol generation circuit that generates transmission symbols according to transmission data on the transmission side, 2 is a random number sequence generation circuit, 3 is an addition circuit, 4 is a modulation circuit, 5 is a transmission path, and 6 is a demodulation circuit. 7 is an automatic equalizer, 8 is a random number sequence generation circuit, 9 is a subtraction circuit, and 10 is a determination circuit.

次に、第2図及び第3図を第1図と併用して説明する。Next, FIG. 2 and FIG. 3 will be explained using FIG. 1 together with FIG.

ここでは、例として4値AM変調方式が−べ、5− +l! 、 用いられたものとする。第2図は送信シンボル発生回路
1で発生される送信シンボルを示す。送信シンボルの値
を3.1.−1.−3とする。送信シンボルは+1から
−1の間の一様乱数を発生する乱数系列発生口f¥82
および加算回路3によって、その位置が第3図に示すよ
うにランダムに変動させられたのち、変調回路4に入力
される。送信信号は伝送路5で歪みを受けた後、受信さ
れ復調回路6で復調される。伝送路5での歪みは自動等
化器7で除去されるので、自動等化器7の出力は加算回
路3の出力と等しいものが得られる。正当な受信者は乱
数系列発生回路8により送信側と同一の一様乱数を発生
させることができるので、減算回路9を用いて送信側で
加えた送信シンボルの位置の変動を除去することができ
る。すなわち、減算回路9の出力として送信シンボル発
生回路1の出力と等しいものが得られる。判定回路1.
0はこの減算回路9の出力を判定するのであり、正当な
受信者は伝送路5の歪みの存在にもかかわらず、ビット
誤り率の劣化をきたすことなく送信データー〇− を復元することがてきる。一方、盗聴者は、第3図に示
すような自動等止器7の出力までは正当な受信者と同じ
ものが得られるが、送信側と同一の一様乱数を発生させ
ることは少なくともただちにはできないので、第2図に
示すような正しく送信シンボルの位置の変動を除去した
信号も少なくともなたちには得られない。いったん2値
テ一タ系列を記録し、その後計算機を用いて、例えば暗
号化に用いた鍵をしらみつぶしにあたることによりこれ
を解読しようと試みても、記録を行う時点では判定回路
10の出力は自動等化器7の出力から乱数の減算を行う
ことなく、もしくはでたらめな減算を行い、それを判定
したものとならざるを得ない。この判定結果か送信デー
タと異なるのはもちろんであるが、さらにこれは判定と
いう非線形操作により既に情報か失われているので、判
定回路10の出力を記録して用いる限り、以後これにい
かように操作を施そうとも、送信データを復元すること
は不可能である。盗聴者が自動等化器7の出力を記録す
ることにより、その後計算機を用いてこの解読を試みる
ことは一応可能なように思われるが、自動等化器7は一
般に判定回路1oの出力を用いてそのタップ係数の更新
動作を行うので、判定回路10の出力が送信データと異
なるときには正常な動作は期待できず、従ってこの場合
自動等止器7の出力としては加算回路3の出力と同じも
のすら得られないのでたとえ自動等化器7の出力を記録
したとしても、これを用いて送信データを復元すること
はやはり不可能である。
Here, as an example, the four-level AM modulation method is -be, 5- +l! , shall be deemed to have been used. FIG. 2 shows transmission symbols generated by the transmission symbol generation circuit 1. As shown in FIG. Set the value of the transmitted symbol to 3.1. -1. -3. The transmission symbol is a random number sequence generation port f ¥82 that generates uniform random numbers between +1 and -1.
After the adder circuit 3 changes the position randomly as shown in FIG. 3, the signal is input to the modulator circuit 4. The transmitted signal is subjected to distortion in the transmission path 5, and then received and demodulated in the demodulation circuit 6. Since the distortion in the transmission line 5 is removed by the automatic equalizer 7, the output of the automatic equalizer 7 is equal to the output of the adder circuit 3. Since the legitimate receiver can use the random number sequence generation circuit 8 to generate the same uniform random numbers as those on the transmitting side, the subtraction circuit 9 can be used to remove variations in the position of the transmitted symbols added on the transmitting side. . That is, the output of the subtraction circuit 9 is equal to the output of the transmission symbol generation circuit 1. Judgment circuit 1.
0 is determined by the output of this subtraction circuit 9, and a valid receiver can restore the transmitted data 〇- without deteriorating the bit error rate despite the presence of distortion in the transmission path 5. Ru. On the other hand, the eavesdropper can obtain the same output as the legitimate receiver up to the output of the automatic isolator 7 shown in Fig. 3, but he cannot generate the same uniform random numbers as the sender, at least immediately. Therefore, it is impossible to obtain a signal such as shown in FIG. 2 in which fluctuations in the positions of transmitted symbols have been correctly removed, at least not in any way. Even if you record a binary data sequence once and then try to decrypt it using a computer, for example by exhausting the key used for encryption, the output of the judgment circuit 10 at the time of recording is The determination must be made without subtracting random numbers from the output of the automatic equalizer 7, or by performing random subtraction. Of course, this judgment result is different from the transmitted data, but since this information has already been lost due to the nonlinear operation of judgment, as long as the output of the judgment circuit 10 is recorded and used, it will not be possible to use it from now on. No matter how you manipulate it, it is impossible to restore the transmitted data. Although it seems possible for an eavesdropper to record the output of the automatic equalizer 7 and then attempt to decrypt it using a computer, the automatic equalizer 7 generally uses the output of the determination circuit 1o. Therefore, normal operation cannot be expected when the output of the determination circuit 10 differs from the transmitted data. Therefore, in this case, the output of the automatic equalizer 7 is the same as the output of the adder circuit 3. Even if the output of the automatic equalizer 7 were recorded, it would still be impossible to use it to restore the transmitted data.

第4図はこの発明の具体的な構成例を示す。第4図にお
いて、11は2ビツトのシフトレジスタ、12は2ビツ
トかける8ビツトのROMである。。
FIG. 4 shows a specific example of the configuration of the present invention. In FIG. 4, numeral 11 is a 2-bit shift register, and 12 is a 2-bit multiplied by 8-bit ROM. .

ROM12の入出力関係は入力”OO” 、  ”01
 ”、  ”10” 、  ”11”に対して”010
00000” 、”00100000” 、”1 ] 
10000o”、’“11000000”″がそれぞれ
出力されるものとする。20はM系列発生回路、21は
5ビツトのシフトレジスタである。30は8ビツトの加
算器、40は8ビツトのD/A変換器、41はローパス
フィルタ(LPF)、42は正弦波発生器、43は乗算
器である。5oは伝送路、6゜は正弦波発生器、61は
乗算器、62はローパスフィルタ(LPF)、63は8
ビツトのA/D変換器、70は自動等化器、8oはM系
列発生回路、81は5ビツトのシフトレジスタ、9oは
8ビツトの減算器、100は判定器である。
The input/output relationship of ROM12 is input “OO”, “01”
"010", "10", "11"
00000", "00100000", "1]
It is assumed that ``10000o'' and ``11000000'' are output, respectively. 20 is an M-sequence generation circuit, and 21 is a 5-bit shift register. 30 is an 8-bit adder, 40 is an 8-bit D/A converter, 41 is a low pass filter (LPF), 42 is a sine wave generator, and 43 is a multiplier. 5o is a transmission line, 6° is a sine wave generator, 61 is a multiplier, 62 is a low pass filter (LPF), 63 is 8
70 is an automatic equalizer, 8o is an M-sequence generation circuit, 81 is a 5-bit shift register, 9o is an 8-bit subtracter, and 100 is a determiner.

この構成において、2値の送信データはシフトレジスタ
11に入力され、ROM12により4値すなわち64,
32.−32.−64のシンボルの何れかが選択される
。M系列発生回路2oの出力はシフトレジスタ21によ
り5ビツトずつまとめられ、+32がら−32の間の一
様乱数となる。
In this configuration, binary transmission data is input to the shift register 11, and 4-value data, that is, 64, 64,
32. -32. -64 symbols are selected. The output of the M-sequence generation circuit 2o is grouped into 5-bit units by the shift register 21, resulting in a uniform random number between +32 and -32.

加算器30により送信シンボルの位置はランダムに変動
されたのち、D/A変換器4oによりアナログ信号に変
換される。この信号はLPF41を通過したのち乗算器
43により変調を受け、伝送路50に送出される。受信
側において、受信信号は乗算器61により復調され、L
PF62を通過したのちA/D変換器63により8ビツ
トのディジタル信号に変換される。この信号は自動等化
器70により伝送路50の歪みが除去され、送信側と同
一のM系列発生回路80により、送信側で加えられた送
信シンボルの位置のランダムな変動が減算器90を用い
て除去されるので、判定器100の出力として送信デー
タが復元される。また、自動等化器70のタップ係数の
更新は判定器100の出力を用いて通常のタラディエン
ド法により行われる。
After the position of the transmission symbol is randomly varied by the adder 30, it is converted into an analog signal by the D/A converter 4o. After passing through the LPF 41, this signal is modulated by the multiplier 43 and sent to the transmission path 50. On the receiving side, the received signal is demodulated by a multiplier 61 and L
After passing through the PF 62, the signal is converted into an 8-bit digital signal by an A/D converter 63. Distortion in the transmission path 50 is removed from this signal by an automatic equalizer 70, and random fluctuations in the positions of transmission symbols added on the transmitting side are removed by an M-sequence generating circuit 80, which is the same as that on the transmitting side, using a subtracter 90. Since the transmission data is removed, the transmitted data is restored as the output of the determiner 100. Further, the tap coefficients of the automatic equalizer 70 are updated using the output of the determiner 100 using a normal taradiendo method.

〔発明の効果〕〔Effect of the invention〕

以上説明したように、この発明によれば、通常の非暗号
化伝送装置を有する盗聴者にも2値データ系列自体を入
手させず、かつ正当な受信者にはビット誤り率の劣化を
きたすことのない暗号化データを送受信できる。
As explained above, according to the present invention, an eavesdropper with a normal non-encrypted transmission device cannot obtain the binary data sequence itself, and a legitimate receiver can suffer a deterioration in the bit error rate. It is possible to send and receive encrypted data without

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の基本概念を示す構成図、第2図及び第
3図は本発明の原理を示すためのランダムな位置の変動
を受ける前後の送信シンボルを示す図、第4図は本発明
の具体的な構成例を示す図である。 1:送信シンボル発生回路、2,8:乱数系列発生回路
、3:加算回路、4−変調回路、5:伝送路、6:復調
回路、7:自動等止器、9:減算回路、10:判定回路
、11,21,81 :シフトレジスタ、12 :RO
M、20.80 :M系列発生回路、30・加算器、4
0:D/A変換器、43.62:LPF、42.60:
正弦波発生器、41.61:乗算器、63 : A/D
変換器、70:自動等化器、90:減算器、100:判
定器。 1:送信シ)ポ゛ル井生日躍る、2.と:色し数本ダ」
凭士−0足各、3:カロ算口了猷 牛:勇ごUハロ宇ろ
、5:仏tk路、ら:と夏鳥用回績稼、7:自動ηと器
、cl:ツ入耳セ止各、10 ニ フ尺ツレ−「巨]足
4ブチ、穿1 口 第2図    第3冴
Figure 1 is a block diagram showing the basic concept of the present invention, Figures 2 and 3 are diagrams showing transmitted symbols before and after receiving random position fluctuations to illustrate the principle of the present invention, and Figure 4 is a diagram showing the basic concept of the present invention. FIG. 3 is a diagram showing a specific configuration example of the invention. 1: Transmission symbol generation circuit, 2, 8: Random number sequence generation circuit, 3: Addition circuit, 4-modulation circuit, 5: Transmission line, 6: Demodulation circuit, 7: Automatic equalizer, 9: Subtraction circuit, 10: Judgment circuit, 11, 21, 81: Shift register, 12: RO
M, 20.80: M-sequence generation circuit, 30/adder, 4
0: D/A converter, 43.62: LPF, 42.60:
Sine wave generator, 41.61: Multiplier, 63: A/D
Converter, 70: Automatic equalizer, 90: Subtractor, 100: Determiner. 1: Transmission) Pole's birthday jumps, 2. and: Color and several books.”
Shoshi - 0 feet each, 3: Karo Sanguchi Ryoyu Cow: Yugo U Hallo Uro, 5: Buddha tk road, Ra: and Natsutori's number acquisition, 7: Automatic η and vessel, cl: Tsuirimi Each set, 10 nifu-shakutsure - "giant" 4 legs, 1 mouth, 2nd figure, 3rd figure

Claims (1)

【特許請求の範囲】[Claims] 送信データに応じて送信シンボルを発生する送信シンボ
ル発生回路と、乱数系列を発生する第1乱数系列発生回
路と、前記送信シンボル発生回路の出力と前記第1乱数
系列発生回路の出力とを加算する加算回路と、前記加算
回路の出力を変調し送信信号とする変調回路とを送信側
に備え、伝送路を介して受信した前記送信信号を復調す
る復調回路と、前記復調回路の出力を等化する自動等化
回路と、送信側と同一の乱数系列を発生する第2乱数系
列発生回路と、前記自動等化回路の出力から前記第2乱
数系列発生回路の出力を減算する減算回路と、前記減算
回路の出力を判定する判定回路とを受信側に備えること
を特徴とする暗号化データ送受信方式。
a transmission symbol generation circuit that generates transmission symbols according to transmission data; a first random number sequence generation circuit that generates a random number sequence; and an output of the transmission symbol generation circuit and an output of the first random number sequence generation circuit that are added together. A transmitting side includes an adder circuit and a modulation circuit that modulates the output of the adder circuit as a transmit signal, a demodulator circuit that demodulates the transmit signal received via a transmission path, and equalizes the output of the demodulator circuit. a second random number sequence generation circuit that generates the same random number sequence as that on the transmission side; a subtraction circuit that subtracts the output of the second random number sequence generation circuit from the output of the automatic equalization circuit; An encrypted data transmission/reception method comprising a determination circuit for determining the output of a subtraction circuit on a receiving side.
JP62006705A 1987-01-13 1987-01-13 Transmission/reception system for enciphered data Pending JPS63174445A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62006705A JPS63174445A (en) 1987-01-13 1987-01-13 Transmission/reception system for enciphered data

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62006705A JPS63174445A (en) 1987-01-13 1987-01-13 Transmission/reception system for enciphered data

Publications (1)

Publication Number Publication Date
JPS63174445A true JPS63174445A (en) 1988-07-18

Family

ID=11645722

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62006705A Pending JPS63174445A (en) 1987-01-13 1987-01-13 Transmission/reception system for enciphered data

Country Status (1)

Country Link
JP (1) JPS63174445A (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03196732A (en) * 1989-12-26 1991-08-28 Matsushita Electric Ind Co Ltd Data receiver
JP2006101381A (en) * 2004-09-30 2006-04-13 Kenwood Corp Scrambler, baseband signal generating apparatus, scramble processing method, and baseband signal generating method and program
JP2010178390A (en) * 2010-05-17 2010-08-12 Kenwood Corp Scrambler, scramble processing method and program
US8023585B2 (en) 2003-12-26 2011-09-20 Kabushiki Kaisha Kenwood Apparatus and method for transmitting or receiving data
US8494071B2 (en) 2003-12-08 2013-07-23 Kabushiki Kaisha Kenwood Device and method for correcting a data error in communication path
US8498355B2 (en) 2003-12-08 2013-07-30 Kabushiki Kaisha Kenwood Device and method for correcting a data error in communication path

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03196732A (en) * 1989-12-26 1991-08-28 Matsushita Electric Ind Co Ltd Data receiver
US8494071B2 (en) 2003-12-08 2013-07-23 Kabushiki Kaisha Kenwood Device and method for correcting a data error in communication path
US8498355B2 (en) 2003-12-08 2013-07-30 Kabushiki Kaisha Kenwood Device and method for correcting a data error in communication path
US8023585B2 (en) 2003-12-26 2011-09-20 Kabushiki Kaisha Kenwood Apparatus and method for transmitting or receiving data
JP2006101381A (en) * 2004-09-30 2006-04-13 Kenwood Corp Scrambler, baseband signal generating apparatus, scramble processing method, and baseband signal generating method and program
JP4542405B2 (en) * 2004-09-30 2010-09-15 株式会社ケンウッド Baseband signal generation apparatus, baseband signal generation method, and program
US8363826B2 (en) 2004-09-30 2013-01-29 Kabushiki Kaisha Kenwood Scrambler, scramble processing method, and program
US8396219B2 (en) 2004-09-30 2013-03-12 Kabushiki Kaisha Kenwood Scrambler, scramble processing method, and program
JP2010178390A (en) * 2010-05-17 2010-08-12 Kenwood Corp Scrambler, scramble processing method and program
JP4542623B2 (en) * 2010-05-17 2010-09-15 株式会社ケンウッド Scrambler, scramble processing method and program

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