JPS6316316A - Resetting device - Google Patents

Abstract

PURPOSE:To set an optimum action for each resetting factor and to secure a proper operation with a resetting device, by keeping the information showing a specific one of plural types of reset signal sources that produces a reset signal. CONSTITUTION:The reset signal outputted from a power supply resetting circuit 1 or a manual resetting circuit 2 is sent to a microprocessor 4 through an OR gate 3. If the reset signal is outputted from the circuit 1, a flip-flop FF5 is set. While the FF5 is reset if the reset signal is outputted from the circuit 2. The microprocessor reads the Q output of the FF5 to decide a logic after the reset signal received from the gate 3 is erased. If the Q output is equal to '1', it is highly possible that a program of the contents RAM of the microprocessor 4. Thus a normal operation is carried out after the program is read again to the RAM from an external ROM.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a reset device that provides a reset signal for initial state setting to a circuit device such as a microprocessor.

BACKGROUND OF THE INVENTION Many circuit devices such as microprocessors have a sector input terminal, and when a predetermined reset signal is applied thereto, the state of the circuit device is forced to return to a predetermined initial state. ing.

Devices of this type typically include multiple types of sector signal sources. Typical examples are power supply reset circuits and manual reset circuits. The power supply reset signal constantly monitors the power supply voltage of the controlled object (circuit device), and generates a reset signal when the voltage falls outside of a normal voltage range. The manual reset circuit generates a reset signal in response to operation of a predetermined reset switch. In addition, there are devices that output a reset signal when some abnormality occurs in the input/output system or when an abnormality occurs in program execution.

Conventionally, the connections between multiple reset signal sources and the controlled object were as shown in Figure 3. In this example, the power supply reset circuit 1 and the manual reset circuit 2 are reset signal sources, and the outputs of both circuits are shared by OR/7'-G3 into one system, and the output of the microprocessor 4, which is the controlled object, is reset. connected to the input terminal. When a reset signal is output from either the power supply reset circuit 1 or the manual reset circuit 29, the reset signal is applied to the microprocessor 4.

Problems to be Solved by the Invention In the conventional configuration shown in FIG. 3, the microprocessor 4 is
Only one type of reset operation can be set.

Since the microprocessor 4 is not configured to know whether the reset signal was output from the power supply reset circuit 1 or the manual reset circuit 2, it cannot determine the cause of the reset (which signal source generated the sector signal). ) cannot change the contents of the reset operation.

For example, if a reset is applied due to an abnormal drop in the power supply voltage, the program in the RAM in the processor will be lost, so the program must be reloaded from an external ROM to return to the initial state when the reset is released. It won't happen. This is not necessary for manual reset. but,
Conventionally, the cause of a reset was unknown, so even in the case of a manual reset, it took a long time to reload the program. As in this example, there were problems such as poor operational efficiency and failure to perform optimal operations.

This invention was made in view of the above-mentioned conventional problems, and its purpose is to provide a reset device that can change the content of the reset operation depending on the cause of reset, and can change other operational operations. be.

Means for Solving the Problems Therefore, in the present invention, the outputs of multiple types of reset signal sources are unified into one system by a gate circuit and supplied to the controlled object (circuit device), and the outputs of multiple types of reset signal sources are unified into one system and supplied to the controlled object (circuit device). The configuration is such that the reset cause memory circuit stores and holds information as to whether a reset signal has been output.

Even after the reset signal disappears (after the reset is released), it is possible to know what the cause of the reset was by checking the output of the above memory circuit, so it is possible to perform actions and operations according to the cause of the reset. can.

Embodiment FIG. 1 shows an embodiment of the present invention. Similar to the conventional example described above, there are two reset signal sources, a power supply reset circuit 1 and a manual reset circuit 2, and the outputs of both circuits are combined into one system by an OR gate 3 to reset the microprocessor 4 as the controlled object. connected to the input terminal.

In this embodiment, a flip-flop 5 is provided as a reset cause storage circuit. The S input of the flip-flop 5 is connected to the output of the power supply reset circuit 1, and the R input is connected to the output of the manual reset circuit 2. Further, the Q output of the flip-flop 5 is connected to a predetermined input port of the microprocessor 4.

In the above configuration, when a sector signal is output from either the power reset circuit 1 or the manual reset circuit 2, a reset signal is applied to the microprocessor 4 through the OR gate 3.

In addition, if the power supply reset circuit 1 outputs a reset signal, the flip-flop 5 is set, and if the manual reset circuit 2 outputs a reset signal, the flip-flop 5 is reset.

Therefore, when the reset signal from the OR gate 3 disappears (reset release), the microprocessor 4 first reads the Q output of the flip-flop 5 and determines the logic, as shown in FIG. If the Q output is "1", the previous reset signal was generated from the power supply reset circuit 1. In this case, there is a high possibility that the program in the internal RAM of the processor 4 has been lost, so the external RO
After reloading the program from M to RAM, proceed to normal operation. If the Q output is "0", the reset signal was generated from manual reset circuit 2. In this case, 1
There is no need to consider the loss of programs in iRAM, and normal operation can proceed immediately.

In addition, in the above embodiment, two reset signal sources were used, but
If there are three or more reset signal sources, a register with the required number of bits may be used as the reset cause storage circuit.

Of course, the control target is not limited to microprocessors, but various circuit devices can be controlled. Furthermore, there is also an operation method in which the object to which the reset signal is supplied differs from the method in which the output of the reset cause storage circuit is used.

Effects of the Invention As explained in detail above, according to the reset device according to the present invention, information indicating which of a plurality of types of reset signal sources has generated a reset signal remains, and based on this information, the cause of the reset can be determined. You can set the optimal operation separately and measure appropriate operation.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a reset device according to an embodiment of the present invention, FIG. 2 is a block diagram showing an example of operation according to reset cause in the same embodiment, and FIG. 3 is a block diagram of a conventional reset device. 1... Power supply reset circuit, 2... Manual reset circuit, 3... OR gate, 4... Microprocessor (
Controlled object), 5...Flip-flop (reset cause memory circuit).

Claims (1)

[Claims] (1) Multiple types of reset signal sources that generate reset signals for circuit devices to be controlled, a gate circuit that unifies the output of these reset signal sources into one system and supplies it to the circuit device, and each reset A reset device comprising a reset cause storage circuit that stores which signal source outputs a reset signal.