JPS6276612A - Manufacture of semiconductor thin film - Google Patents

Manufacture of semiconductor thin film

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Publication number
JPS6276612A
JPS6276612A JP21517385A JP21517385A JPS6276612A JP S6276612 A JPS6276612 A JP S6276612A JP 21517385 A JP21517385 A JP 21517385A JP 21517385 A JP21517385 A JP 21517385A JP S6276612 A JPS6276612 A JP S6276612A
Authority
JP
Japan
Prior art keywords
thin film
substrate
fluorosilane
semiconductor thin
silane
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP21517385A
Other languages
Japanese (ja)
Other versions
JPH0650730B2 (en
Inventor
Makoto Konagai
誠 小長井
Yorihisa Kitagawa
北川 順久
Nobuhiro Fukuda
福田 信弘
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsui Toatsu Chemicals Inc
Original Assignee
Mitsui Toatsu Chemicals Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsui Toatsu Chemicals Inc filed Critical Mitsui Toatsu Chemicals Inc
Priority to JP21517385A priority Critical patent/JPH0650730B2/en
Publication of JPS6276612A publication Critical patent/JPS6276612A/en
Publication of JPH0650730B2 publication Critical patent/JPH0650730B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

PURPOSE:To form a semiconductor thin film with superior orientation on a single crystalline or amorphous single crystalline substrate by photo- discomposing a mixture gas consisting of fluorosilane, silane or, desirably, hydrogen. CONSTITUTION:A single crystallineor amorphous single crystalline substrate whose surface is cleaned with washing or etching is placed in a thin film forming device 7 which has at least a light permiating window 1, a substrate holding means 3, a substrate heating means 4, a gas introduction means 5 and a vaccum discharge means 6, and the substrate is heated to 100-400 deg.C under vaccum discharge. The material gas is supplied to the said device, with the flowing ratio of silane to fluorosilane being 0.5-50 and the flowing ratio of hydrogen to the fluorosilane being more than twice he former. As the fluorosilane, SiH4-nFn(integer of n=1-3) or Si2F6 is usable. As the silane, monosilane, disilane, trisilane expressed with SimH2m+2 (integer of m=1-3) are usable. As the III group compounds to be added to the mixture gas, dibolane (B2H6) is usable. As V group compounds, phosphine (PH3) or arsine (AsH3) is usable.

Description

【発明の詳細な説明】 〔技術分野〕 本発明は半導体薄膜の製造方法に関し、特に配向性にす
ぐれた半導体薄膜の製造方法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a method for manufacturing a semiconductor thin film, and particularly to a method for manufacturing a semiconductor thin film with excellent orientation.

〔背景技術〕[Background technology]

半導体装置には結晶質や非晶質の半導体薄膜が利用され
ている。結晶質の半導体薄膜において、多結晶や微結晶
(たとえば微結晶シリコン)の薄膜が多数検討されてい
る。これらは、通常、基板上に形成されるが、基板が単
結晶でない場合には、その形成される薄膜は無配向とな
りゃすい。
Semiconductor devices utilize crystalline or amorphous semiconductor thin films. Among crystalline semiconductor thin films, many polycrystalline and microcrystalline (eg, microcrystalline silicon) thin films have been studied. These are usually formed on a substrate, but if the substrate is not a single crystal, the formed thin film is likely to be non-oriented.

しかして、もし、これらの薄膜に自由に配向性を付与す
ることができれば、電気的な性質や光学的性質忙異方性
を与えることが可能となるから、新たな機能の発現を導
きうろことになる。特に、従来ガラスや高分子フィルム
のような非単結晶の基板上に配向性を有する半導体薄膜
を形成する技術が要求されていた。
However, if orientation can be freely imparted to these thin films, it would be possible to impart anisotropy in electrical and optical properties, which would lead to the development of new functions. become. In particular, there has been a demand for a technique for forming an oriented semiconductor thin film on a non-single crystal substrate such as glass or polymer film.

本発明者らはフルオロシランの光分解(光CVD法)に
より低抵抗の非晶質(水素及び又は弗素を含有する微結
晶化シリコン)薄膜を得ることを先に提案(特願昭60
−49231号、特願昭60−49232号)した。 
さらに、検討を進めた結果、驚くべきことに上記技術に
おいてシランを共存させることにより、ガラス基板上に
配向性のすぐれた半導体薄膜が形成されることを見出し
本発明を完成した。
The present inventors previously proposed (Patent Application No. 1983) the production of a low-resistance amorphous (microcrystalline silicon containing hydrogen and/or fluorine) thin film by photodecomposition (photoCVD method) of fluorosilane.
-49231, Japanese Patent Application No. 60-49232).
Furthermore, as a result of further investigation, it was surprisingly discovered that a semiconductor thin film with excellent orientation can be formed on a glass substrate by coexisting silane in the above technique, and the present invention was completed.

〔発明の開示〕[Disclosure of the invention]

本発明はフルオロシラン、シラン及び好ましくは水素か
らなる混合ガスを光分解(光CVD ) L、て単結晶
又は非単結晶基板上に配向性にすぐれた半導体薄膜を形
成するものである。
In the present invention, a semiconductor thin film with excellent orientation is formed on a single crystal or non-single crystal substrate by photodecomposing (photoCVD) a mixed gas consisting of fluorosilane, silane, and preferably hydrogen.

本発明において使用するフルオロシランとしてはSiH
4−nFn(n=1〜3の整数)又はSi2F6が有用
である。シランとしてはSiH(m=l〜3m  2m
+2 の整数)で表わされるモノシラン、ジシラン、トリシラ
ンが有効に用いられる。さらに、■族化合物としてはジ
ポラン(B2Ha)、V族化合物としてはホスフィン(
PHs)やアルシン(AsH3)が有用である。
The fluorosilane used in the present invention is SiH
4-nFn (n=an integer from 1 to 3) or Si2F6 are useful. As the silane, SiH (m=l~3m 2m
Monosilane, disilane, and trisilane represented by +2 (an integer of +2) are effectively used. Furthermore, diporane (B2Ha) is a group II compound, and phosphine (B2Ha) is a group V compound.
PHs) and arsine (AsH3) are useful.

本発明において基板としては、単結晶又は非単結晶、い
ずれの材料も用いることができる。本発明の薄膜形成条
件のうち基板温度は約200℃と低いので、この温度条
件に耐える多数の各種材料が有効に用いられる。単結晶
材料、特に表面を清浄にしたシリコン基板を用いると半
導体薄膜は該清セ 浄衣面からエピタキシ大ル成長したものとなる。
In the present invention, any material, single crystal or non-single crystal, can be used as the substrate. Among the thin film forming conditions of the present invention, the substrate temperature is as low as about 200° C., so a large number of various materials that can withstand this temperature condition can be effectively used. When a single-crystal material, particularly a silicon substrate whose surface has been cleaned, is used, a semiconductor thin film is epitaxially grown from the cleaned surface.

一方非単結晶材料を用いる場合には、本発明の原料ガス
構成において(110)方向に配向した半導体薄膜を得
ることができる。
On the other hand, when a non-single crystal material is used, a semiconductor thin film oriented in the (110) direction can be obtained with the raw material gas composition of the present invention.

本発明において光分解は紫外線によるものが好ましく、
光分解の増減反応を利用することもできる。
In the present invention, photolysis is preferably carried out by ultraviolet rays,
It is also possible to utilize the increase/decrease reaction of photolysis.

即ち本発明は、フルオロシラン、シラン及び好ましくは
水素からなる混合ガスを好ましくは紫外線の照射により
光分解し、低温に加熱された単結晶又は非単結晶基板上
に高配向性の半導体薄膜を形成する方法である。
That is, the present invention photolyzes a mixed gas consisting of fluorosilane, silane, and preferably hydrogen, preferably by irradiation with ultraviolet rays, to form a highly oriented semiconductor thin film on a single crystal or non-single crystal substrate heated to a low temperature. This is the way to do it.

本発明においては、フルオロシランとシランが共存した
状態で光CVDすることが不可欠であり、さらに好まし
くは、水素を混合したガスに紫外線を照射するものであ
る。該混合ガスに■族化合物又はV族化合物を添加して
薄膜形成を行うことにより得られる薄膜はそれぞれp型
およびn型半導体の特性が与えられる。混合ガス比につ
いては半導体薄膜を形成する薄膜形成装置への原料ガス
供給流量(容量)比で表わすことができる。好ましい範
囲はつぎの通りである。フルオロシラン/シラン比;0
.5〜50、特に好ましくは1〜20であり、さらに、
非単結晶基板上に高配向性の薄膜を形成するためにはこ
の比の範囲は1〜15である。水素/フルオロシランは
2倍以上、特に好ましくは5倍以上である。水素添加量
を多くしすぎると、単結晶の成長速度が低下するので好
ましい水素/フルオロシラン混合比は2〜20倍であり
、特に好ましくは5〜15倍である。■族化合物又はV
族化合物/シランの比は半導体薄膜の抵抗率により適宜
決定される。この比はlXl0””〜5×10−2の範
囲で充分であり、エピタキシャル成長の場合にはこの値
は小さくなる。
In the present invention, it is essential to perform photoCVD in a state where fluorosilane and silane coexist, and more preferably, a gas mixed with hydrogen is irradiated with ultraviolet rays. Thin films obtained by forming thin films by adding a Group Ⅰ compound or a Group V compound to the mixed gas are given the characteristics of p-type and n-type semiconductors, respectively. The mixed gas ratio can be expressed as the raw material gas supply flow rate (capacity) ratio to the thin film forming apparatus that forms the semiconductor thin film. The preferred ranges are as follows. Fluorosilane/silane ratio; 0
.. 5 to 50, particularly preferably 1 to 20, and further,
In order to form a highly oriented thin film on a non-single crystal substrate, this ratio ranges from 1 to 15. The ratio of hydrogen/fluorosilane is 2 times or more, particularly preferably 5 times or more. If the amount of hydrogen added is too large, the growth rate of the single crystal will decrease, so the preferred hydrogen/fluorosilane mixing ratio is 2 to 20 times, particularly preferably 5 to 15 times. Group ■ compound or V
The ratio of group compound/silane is appropriately determined depending on the resistivity of the semiconductor thin film. A range of 1X10"" to 5.times.10@-2 is sufficient for this ratio, and this value becomes smaller in the case of epitaxial growth.

混合ガスの形成方法は、特に限定されるものではない。The method of forming the mixed gas is not particularly limited.

たとえば、該形成装置外であらかじめ混合したガスを導
入することや、該形成装置内で、上記の希釈度合を満足
すべく水素を混合することのいずれも有用である。■族
化合物やV族化合物は分解しやすいとか極めて有毒であ
る等の理由により通常希釈された状態で使用される。水
素で希釈した■族又は■族化合物、フルオロシラン、シ
ラン等を使用することは取扱い上便利である。
For example, it is useful to introduce a premixed gas outside the forming apparatus, or to mix hydrogen within the forming apparatus so as to satisfy the above dilution degree. Group (1) compounds and Group V compounds are usually used in a diluted state because they are easily decomposed or extremely toxic. It is convenient for handling to use a compound of Group 1 or Group 2, fluorosilane, silane, etc. diluted with hydrogen.

本発明において光分解に用いる紫外線を発生する光源と
しては、臨界的な条件でなく特に限定されるものではな
い。具体的示例としては、水銀灯、希ガスランプ、水銀
−希ガスランプ、水素放電管等が用いられる。これらの
光源において、水銀灯の一種である低圧水銀灯を用いる
ことが実用上便利である。光分解は直接的に、または所
望により増感剤を介して間接的に行うことができる。実
用的な観点から水銀を増感剤とする水銀増感法が効果的
に用いられる。シランとして一般式においてm=1のモ
ノシランを用いる時には、水銀増感法のみが有効である
。m=2及びm = 3のジシラン及びトリシランは直
接及び間接のいずれの方法も有用である。トリシランは
沸点が53℃と高く、室温では液体で存在するため何ら
かの手段でガス化せねばならない。それ故、混合ガスの
光分解反応の観点からはシランとしてはジシラン(m=
2)が好ましい原料である。
In the present invention, the light source that generates the ultraviolet light used for photolysis is not subject to any critical conditions and is not particularly limited. Specific examples include a mercury lamp, a rare gas lamp, a mercury-rare gas lamp, and a hydrogen discharge tube. In these light sources, it is practically convenient to use a low-pressure mercury lamp, which is a type of mercury lamp. Photolysis can be carried out directly or indirectly via a sensitizer, if desired. From a practical standpoint, a mercury sensitization method using mercury as a sensitizer is effectively used. When using monosilane with m=1 in the general formula as the silane, only the mercury sensitization method is effective. Disilanes and trisilanes with m=2 and m=3 are useful both directly and indirectly. Trisilane has a high boiling point of 53° C. and exists as a liquid at room temperature, so it must be gasified by some means. Therefore, from the viewpoint of photodecomposition reaction of mixed gas, disilane (m=
2) is a preferred raw material.

さらに本発明のすぐれた特徴の一つとして半導体薄膜を
形成する温度は300℃以下の低温でよいことである。
Furthermore, one of the excellent features of the present invention is that the semiconductor thin film can be formed at a low temperature of 300° C. or lower.

単結晶基板を用いた場合には200℃の基板温度でエピ
タキシ書ル成長ができる。成長温度はさらに低下させる
ことができるがこの場合には、それに応じて成長速度を
低下させる必要がある。成長速度が約0.1A/sec
 以上の実用的な値の場合には基板温度は約100℃以
上であればよ(ゝO 光分解時の混合ガス圧力や照射光強度は特に限定される
条件はない。また水銀を増感剤として用いる場合には水
銀溜の温度や水銀蒸気を薄膜形成装置に移送するキャリ
ヤーガスの流量等も特に限定されるものではない。これ
らの条件は薄膜の成長速度に影響を与えるものであり、
前述の如く成長速度に応じて基板温度を適宜変更するこ
とで効果的に半導体薄膜を生゛長させることができる。
When a single crystal substrate is used, epitaxial growth can be performed at a substrate temperature of 200°C. The growth temperature can be further reduced, but in this case the growth rate must be reduced accordingly. Growth rate is approximately 0.1A/sec
In the case of the above practical values, the substrate temperature should be approximately 100°C or higher (O) There are no particular limitations on the mixed gas pressure or irradiation light intensity during photolysis. When used as a mercury reservoir, there are no particular limitations on the temperature of the mercury reservoir, the flow rate of the carrier gas for transferring mercury vapor to the thin film forming apparatus, etc. These conditions affect the growth rate of the thin film,
As described above, the semiconductor thin film can be grown effectively by appropriately changing the substrate temperature depending on the growth rate.

〔発明を実施するための好ましい形態〕つぎに本発明の
実施の態様についてしるす。光透過窓、基板導入手段、
基板保持手段、基板加熱手段、ガス導入手段、真空排気
手段を少なくとも有する薄膜形成装置内に洗浄及び又は
エツチングにより表面を清浄にした単結晶又は非単結晶
の基板を設置し、真空排気下、該基板をioo〜400
℃に加熱する。原料ガスの導入にあたり、必要に応じて
その一部を水銀溜を経由させて該装置に導入する。原料
ガスは、シランに対するフルオロシランの流量比を0.
5〜50とし、かつフルオロシランに対する水素の流量
比を2倍以上として該装置に供給される。さらにp型お
よびn型のドーピングを行う場合には、それぞれ■族お
よびV族化合物をシランに対してI X 10−’〜5
×1σ2循合で該装置に導入すればよい。
[Preferred Modes for Carrying Out the Invention] Next, embodiments of the present invention will be described. light transmission window, substrate introduction means,
A single-crystal or non-single-crystal substrate whose surface has been cleaned by cleaning and/or etching is placed in a thin film forming apparatus having at least a substrate holding means, a substrate heating means, a gas introduction means, and a vacuum evacuation means, and the substrate is heated under vacuum evacuation. board ioo~400
Heat to ℃. When introducing the raw material gas, a part of it is introduced into the apparatus via a mercury reservoir as necessary. The raw material gas has a flow rate ratio of fluorosilane to silane of 0.
5 to 50, and the flow rate ratio of hydrogen to fluorosilane is at least twice that of the fluorosilane. Furthermore, when p-type and n-type doping is performed, group II and group V compounds are added to the silane at IX 10-' to 5
It is sufficient to introduce it into the device in ×1σ2 circulation.

真空排気手段で該装置内の圧力を10Torr以下とし
て、低圧水銀ランプを点灯し成膜を開始する。
The pressure inside the apparatus is set to 10 Torr or less using a vacuum evacuation means, and a low-pressure mercury lamp is turned on to start film formation.

同ランプ点灯と共に薄膜の形成がはじまるので成膜速度
を考慮にいれて必要膜厚になる時間において同ランプを
消灯する。また、膜厚モニターによって膜厚を計測しつ
つ成膜時間を決めることもできる。該装置の光透過窓と
しては合成石英が適しているが、この窓に高沸点油を塗
布しておくことにより、光透過窓への膜形成を抑えるこ
とができる。
Formation of a thin film begins when the lamp is turned on, so the lamp is turned off when the required film thickness is reached, taking into consideration the film formation rate. Further, the film forming time can be determined while measuring the film thickness using a film thickness monitor. Synthetic quartz is suitable for the light transmitting window of the device, but by applying high boiling point oil to this window, film formation on the light transmitting window can be suppressed.

〔発明の効果〕〔Effect of the invention〕

本発明は、単結晶薄膜を含む高配向性の半導体薄膜を基
板の温度が300℃以下さらには200℃以下の低温に
おいて与えるものである。それ故、高集積化のために、
半導体薄膜や半導体装置の低温形成技術が熱望されてい
る半導体装置の製造分野に対して、本発明は極めて有用
な技術を提供するものである。
The present invention provides a highly oriented semiconductor thin film including a single crystal thin film at a substrate temperature of 300° C. or lower, or even 200° C. or lower. Therefore, for high integration,
The present invention provides an extremely useful technology for the field of manufacturing semiconductor devices, where low-temperature formation technology for semiconductor thin films and semiconductor devices is eagerly awaited.

〔実施例〕〔Example〕

以下実施例を、示し本発明をさらに具体的に説明する。 The present invention will be explained in more detail below by way of Examples.

実施例1 第1図に示すところの紫外光透過窓1、基板導入手段2
、基板保持手段3、基板加熱手段4、ガス導入手段5、
真空排気手段6を有す薄膜形成装置7を用いる。基板導
入手段2を用いて膜付のための基板8であるところのp
型シリコンウエノ\−を基板保持手段に設置する。真空
排気手段で真空排気しつつ基板加熱手段により洗浄済の
基板を200℃に加熱した。なお、6I、9Iは基板導
入取出室15の排気手段である。ついでジシラン/ジフ
ルオロシラン/水素を1/10/150の流量比で導入
し、真空排気手段に設備されている調節弁9で2 To
rrの圧力に保持する。導管10より導入されるジフロ
ロシランの内の一部を約40℃に加熱された水銀溜11
の上を通過させて導入する。
Example 1 Ultraviolet light transmitting window 1 and substrate introduction means 2 as shown in FIG.
, substrate holding means 3, substrate heating means 4, gas introduction means 5,
A thin film forming apparatus 7 having a vacuum evacuation means 6 is used. p of the substrate 8 for film attachment using the substrate introduction means 2.
Place the mold silicon ueno\- on the substrate holding means. The cleaned substrate was heated to 200° C. by the substrate heating device while being evacuated by the vacuum pumping device. Note that 6I and 9I are exhaust means for the substrate introduction/takeout chamber 15. Next, disilane/difluorosilane/hydrogen was introduced at a flow rate ratio of 1/10/150, and a control valve 9 installed in the evacuation means was used to introduce 2 To
Hold at a pressure of rr. A part of the difluorosilane introduced through the conduit 10 is placed in a mercury reservoir 11 heated to about 40°C.
Introduce it by passing it over it.

なお、13,14.16  はジシラン、水素、ジボラ
ン、ホスフィン等の導入管である。基体の温度および薄
膜形成装置内の圧力が一定となった時低圧水銀ランプ1
2を点灯し、膜厚が約6000Aになった時に消灯する
。平均の成膜速度は0.8A/Sであった。
Note that 13, 14, and 16 are introduction pipes for disilane, hydrogen, diborane, phosphine, etc. When the temperature of the substrate and the pressure inside the thin film forming apparatus are constant, the low pressure mercury lamp 1
2 is turned on and turned off when the film thickness reaches approximately 6000A. The average film deposition rate was 0.8 A/S.

冷却後基板を取りだして観察したところ、基体面は曇り
の全くない鏡面であった0表面を反射電子線回折装置で
観察して、基板と同一のラウェ斑点を得て、該基板面か
ら単結晶薄膜がエピタキシャル成長していることを確認
した。本単結晶薄膜は極めて弱いn型であり、その比抵
抗は50=70Ω・儂であった。
After cooling, the substrate was taken out and observed. The surface of the substrate was a mirror surface with no clouding. Observation of the surface using a reflection electron beam diffraction device revealed Laue spots identical to those of the substrate, and single crystals were detected from the substrate surface. It was confirmed that the thin film was grown epitaxially. This single crystal thin film was of extremely weak n-type, and its specific resistance was 50=70Ω·me.

実施例2 基板として、ガラス板(コーニング7059) を用い
、かつPH3をジシランに対し4000ppm(容量比
)添加したことを除いて、実施例1に準じて行った。成
膜速度は0.95A/S  であり、反射電子線回折の
観察結果は(110)方向に配向していることが確認さ
れた。導電率は1.33/CrIL  であり、充分低
抵抗化できた。
Example 2 Example 1 was carried out, except that a glass plate (Corning 7059) was used as the substrate and 4000 ppm (volume ratio) of PH3 was added to disilane. The film formation rate was 0.95 A/S, and reflection electron diffraction results confirmed that the film was oriented in the (110) direction. The electrical conductivity was 1.33/CrIL, and the resistance was sufficiently low.

実施例3〜10、比較例1.2 フルオロシランの種類と量を変更した他は実施例1に準
じて実施した。条件及び結果を第1表に記した。第1表
には比較のための例もあわせて示した。
Examples 3 to 10, Comparative Example 1.2 The procedure of Example 1 was repeated except that the type and amount of fluorosilane were changed. The conditions and results are shown in Table 1. Table 1 also shows examples for comparison.

実施例11〜17 実施例3〜5.7〜10において基板をシリコンウェハ
ーの代りに、ガラス板(コーニング7059)を用いた
。比較のための例として、フルオロシランの流量比を変
更して薄膜を形成した。結果を第2表に示した。
Examples 11 to 17 In Examples 3 to 5 and 7 to 10, a glass plate (Corning 7059) was used as the substrate instead of a silicon wafer. As an example for comparison, thin films were formed by changing the flow rate ratio of fluorosilane. The results are shown in Table 2.

ジフルオロシラン/シランの流量比を太き(し、20と
したところ、得られた薄膜の電子線回折像はリング状で
あり、無配向状態であることがわかった。
When the difluorosilane/silane flow rate ratio was set to 20, the electron beam diffraction image of the obtained thin film was ring-shaped, indicating that it was in a non-oriented state.

実施例18 実施例1においてジシランのかわりにモノシラン(Si
l−14)を用いて行った。成膜速度は0.15A/s
と低下したが電子線回折からエピタキシャル成長を確認
した。抵抗率は90〜120Ω・備であった。
Example 18 In Example 1, monosilane (Si
1-14). Film deposition rate is 0.15A/s
However, epitaxial growth was confirmed by electron diffraction. The resistivity was 90 to 120Ω.

実施例19 基板としてガラス板を用いた他は実施例18に準じて行
った。成膜速度は0 、18A/Sであり、電子線回折
からは(110)方向への配向を確認した。
Example 19 The procedure of Example 18 was followed except that a glass plate was used as the substrate. The film formation rate was 0.18 A/S, and electron beam diffraction confirmed orientation in the (110) direction.

以上のどと(たとえば実施例にも示されたように200
℃と低い基板温度で単結晶又は高配向性薄膜を成長させ
ることのできる本発明は半導体装置ら製造の低温化に極
めで有効な発明である。
or above (for example, as shown in the examples, 200
The present invention, which is capable of growing a single crystal or highly oriented thin film at a substrate temperature as low as .degree. C., is an extremely effective invention for lowering the temperature of manufacturing semiconductor devices.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明を実施するために有用な薄膜形成装置の
縦断面を示す模式図である。
FIG. 1 is a schematic diagram showing a longitudinal section of a thin film forming apparatus useful for carrying out the present invention.

Claims (7)

【特許請求の範囲】[Claims] (1)フルオロシラン、及びシランからなる混合ガスを
光分解して基板上に形成することを特徴とする半導体薄
膜の製造方法。
(1) A method for producing a semiconductor thin film, which comprises forming a semiconductor thin film on a substrate by photolyzing a mixed gas consisting of fluorosilane and silane.
(2)フルオロシランがSiH_4_−_nF_n(n
=1〜3)又はSi_2F_6である特許請求の範囲第
(1)項記載の半導体薄膜の製造方法。
(2) Fluorosilane is SiH_4_−_nF_n(n
= 1 to 3) or Si_2F_6, the method for manufacturing a semiconductor thin film according to claim (1).
(3)シランはSi_mH_2_m_+_2(m=1〜
3)である特許請求の範囲第(1)項記載の半導体薄膜
の製造方法。
(3) Silane is Si_mH_2_m_+_2 (m=1~
3) A method for manufacturing a semiconductor thin film according to claim (1).
(4)III族化合物又はV族化合物を添加された混合ガ
スを用いる特許請求の範囲第(1)項記載の半導体薄膜
の製造方法。
(4) The method for manufacturing a semiconductor thin film according to claim (1), using a mixed gas to which a Group III compound or a Group V compound is added.
(5)基板が単結晶又は非単結晶材料である特許請求の
範囲第(1)項記載の半導体薄膜の製造方法。
(5) The method for manufacturing a semiconductor thin film according to claim (1), wherein the substrate is a single crystal or non-single crystal material.
(6)光分解が紫外線の照射により行われる特許請求の
範囲第(1)項記載の半導体薄膜の製造方法。
(6) The method for producing a semiconductor thin film according to claim (1), wherein the photodecomposition is performed by irradiation with ultraviolet rays.
(7)フルオロシラン、シラン及び水素からなる混合ガ
スを紫外線の照射により光分解し、低温に加熱された単
結晶又は非単結晶基板上に形成する特許請求の範囲第(
1)項記載の半導体薄膜の製造方法。
(7) A mixed gas consisting of fluorosilane, silane, and hydrogen is photodecomposed by irradiation with ultraviolet rays and formed on a single crystal or non-single crystal substrate heated to a low temperature.
1) The method for manufacturing a semiconductor thin film as described in item 1).
JP21517385A 1985-09-30 1985-09-30 Method for manufacturing semiconductor thin film Expired - Fee Related JPH0650730B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21517385A JPH0650730B2 (en) 1985-09-30 1985-09-30 Method for manufacturing semiconductor thin film

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21517385A JPH0650730B2 (en) 1985-09-30 1985-09-30 Method for manufacturing semiconductor thin film

Publications (2)

Publication Number Publication Date
JPS6276612A true JPS6276612A (en) 1987-04-08
JPH0650730B2 JPH0650730B2 (en) 1994-06-29

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Cited By (17)

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JPS62221109A (en) * 1986-03-24 1987-09-29 Semiconductor Energy Lab Co Ltd Film forming method
US6716751B2 (en) 2001-02-12 2004-04-06 Asm America, Inc. Dopant precursors and processes
US6815007B1 (en) 2002-03-04 2004-11-09 Taiwan Semiconductor Manufacturing Company Method to solve IMD-FSG particle and increase Cp yield by using a new tougher UFUN season film
US7026219B2 (en) 2001-02-12 2006-04-11 Asm America, Inc. Integration of high k gate dielectric
US7092287B2 (en) 2002-12-18 2006-08-15 Asm International N.V. Method of fabricating silicon nitride nanodots
US7186630B2 (en) 2002-08-14 2007-03-06 Asm America, Inc. Deposition of amorphous silicon-containing films
US7294582B2 (en) 2002-07-19 2007-11-13 Asm International, N.V. Low temperature silicon compound deposition
US7297641B2 (en) 2002-07-19 2007-11-20 Asm America, Inc. Method to form ultra high quality silicon-containing compound layers
US7427571B2 (en) 2004-10-15 2008-09-23 Asm International, N.V. Reactor design for reduced particulate generation
US7553516B2 (en) 2005-12-16 2009-06-30 Asm International N.V. System and method of reducing particle contamination of semiconductor substrates
US7629270B2 (en) 2004-08-27 2009-12-08 Asm America, Inc. Remote plasma activated nitridation
US7674726B2 (en) 2004-10-15 2010-03-09 Asm International N.V. Parts for deposition reactors
US7674728B2 (en) 2004-09-03 2010-03-09 Asm America, Inc. Deposition from liquid sources
US7691757B2 (en) 2006-06-22 2010-04-06 Asm International N.V. Deposition of complex nitride films
US7732350B2 (en) 2004-09-22 2010-06-08 Asm International N.V. Chemical vapor deposition of TiN films in a batch reactor
US7833906B2 (en) 2008-12-11 2010-11-16 Asm International N.V. Titanium silicon nitride deposition
US7851307B2 (en) 2007-08-17 2010-12-14 Micron Technology, Inc. Method of forming complex oxide nanodots for a charge trap

Cited By (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62221109A (en) * 1986-03-24 1987-09-29 Semiconductor Energy Lab Co Ltd Film forming method
US6958253B2 (en) 2001-02-12 2005-10-25 Asm America, Inc. Process for deposition of semiconductor films
US6716713B2 (en) 2001-02-12 2004-04-06 Asm America, Inc. Dopant precursors and ion implantation processes
US6743738B2 (en) 2001-02-12 2004-06-01 Asm America, Inc. Dopant precursors and processes
US6900115B2 (en) 2001-02-12 2005-05-31 Asm America, Inc. Deposition over mixed substrates
US6716751B2 (en) 2001-02-12 2004-04-06 Asm America, Inc. Dopant precursors and processes
US6962859B2 (en) 2001-02-12 2005-11-08 Asm America, Inc. Thin films and method of making them
US7026219B2 (en) 2001-02-12 2006-04-11 Asm America, Inc. Integration of high k gate dielectric
US7790556B2 (en) 2001-02-12 2010-09-07 Asm America, Inc. Integration of high k gate dielectric
US7585752B2 (en) 2001-02-12 2009-09-08 Asm America, Inc. Process for deposition of semiconductor films
US7273799B2 (en) 2001-02-12 2007-09-25 Asm America, Inc. Deposition over mixed substrates
US7285500B2 (en) 2001-02-12 2007-10-23 Asm America, Inc. Thin films and methods of making them
US6815007B1 (en) 2002-03-04 2004-11-09 Taiwan Semiconductor Manufacturing Company Method to solve IMD-FSG particle and increase Cp yield by using a new tougher UFUN season film
US7297641B2 (en) 2002-07-19 2007-11-20 Asm America, Inc. Method to form ultra high quality silicon-containing compound layers
US7294582B2 (en) 2002-07-19 2007-11-13 Asm International, N.V. Low temperature silicon compound deposition
US7186630B2 (en) 2002-08-14 2007-03-06 Asm America, Inc. Deposition of amorphous silicon-containing films
US8921205B2 (en) 2002-08-14 2014-12-30 Asm America, Inc. Deposition of amorphous silicon-containing films
US7092287B2 (en) 2002-12-18 2006-08-15 Asm International N.V. Method of fabricating silicon nitride nanodots
US7629270B2 (en) 2004-08-27 2009-12-08 Asm America, Inc. Remote plasma activated nitridation
US7674728B2 (en) 2004-09-03 2010-03-09 Asm America, Inc. Deposition from liquid sources
US7732350B2 (en) 2004-09-22 2010-06-08 Asm International N.V. Chemical vapor deposition of TiN films in a batch reactor
US7966969B2 (en) 2004-09-22 2011-06-28 Asm International N.V. Deposition of TiN films in a batch reactor
US7674726B2 (en) 2004-10-15 2010-03-09 Asm International N.V. Parts for deposition reactors
US7427571B2 (en) 2004-10-15 2008-09-23 Asm International, N.V. Reactor design for reduced particulate generation
US7553516B2 (en) 2005-12-16 2009-06-30 Asm International N.V. System and method of reducing particle contamination of semiconductor substrates
US7691757B2 (en) 2006-06-22 2010-04-06 Asm International N.V. Deposition of complex nitride films
US7851307B2 (en) 2007-08-17 2010-12-14 Micron Technology, Inc. Method of forming complex oxide nanodots for a charge trap
US8203179B2 (en) 2007-08-17 2012-06-19 Micron Technology, Inc. Device having complex oxide nanodots
US7833906B2 (en) 2008-12-11 2010-11-16 Asm International N.V. Titanium silicon nitride deposition

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