JPS6253036A - Radio equipment for pll synthesizer system - Google Patents

Abstract

PURPOSE:To attain filter adjustment of a reception high frequency section by switching an output supply destination of a PLL synthesizer to a high frequency input stage of the reception side so as to change periodically the oscillated frequency of the PLL synthesizer in a prescribed range. CONSTITUTION:Filters BPF1, BPF2, have adjusting capacitors C1-C4. The PLL synthesizer 10 gives an output f0 to a mixer MIX or an antenna input ANT through a switch 30 for switching the supply destination. An MPU (microprocessor) varies the frequency f0 and its ROM stores an adjusting program varying periodically the frequency f0 in a prescribed range.Thus, the passing characteristic of the BPF1-BPFn is observed by inputting the output (point B) of the filter BPF2 to a spectrum analyzer.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a PLL synthesizer type wireless device having a frequency sweep test function.

[Conventional technology]

When adjusting the filter used in the high frequency amplification section of a wireless device, conventionally, as shown in Fig. 4, a high frequency signal whose frequency changes periodically is input from the frequency sweeper 1 to the wireless device 2, and the high frequency amplification section filter It is necessary to set up a measurement system that displays the output level of the spectrum analyzer 3.

[Problem that the invention seeks to solve]

Incidentally, recently, the number of wireless devices that use a PLL (phase-locked loop) synthesizer in the receiving station oscillator is increasing, and in this case, if the built-in PLL synthesizer can be used as a sweeper during testing, a separate sweeper is not required. The present invention attempts to achieve this.

[Means for solving problems]

The present invention provides a wireless device that uses a PLL synthesizer to generate a reception station oscillation frequency or a transmission frequency, and changes the oscillation frequency by varying the division ratio of its variable frequency divider.
The present invention is characterized by comprising a circuit that switches the output supply destination of the synthesizer to a high-frequency input stage on the receiving side during testing, and a circuit that periodically changes the oscillation frequency of the PLL synthesizer within a predetermined range during testing. .

[Effect]

FIG. 1 is a block diagram of the principle of the present invention, where ta+ is a PLL synthesizer, (b) is a front end in normal operation, and (C1
is the front end during adjustment. The PLL synthesizer shown in (a) is a general one, and uses a VCO (voltage controlled oscillator)
The output fO of 11 is divided by N by a programmable counter (variable frequency divider) 12, and the divided output f o /N is compared with the reference frequency fr from the crystal oscillator, and the phase difference between the two is calculated using an LPF (low-pass filter). ) VCOI through 14
It is a return to I. Therefore, on a steady basis, fo=N
-fr, and by varying N, the total frequency fo can be changed.

Figure (b) shows the front end of a radio device that uses such a PLL synthesizer as a receiving station oscillator, where 21 is a high-frequency stage BPF (band pass filter) that receives the antenna input ANT, and 22 is a high-frequency amplifier that amplifies its output. , 23
24 is a BPF that limits the band of the amplified output again, and 24 is a frequency mixer.

During normal operation, the intermediate frequency signal IF is obtained by supplying the receive station output fa from the PLL synthesizer to the mixer 24.

On the other hand, as shown in the same figure (C) during adjustment, the PLL
The output fo of the synthesizer is input not to the mixer but to the BPF 21 instead of the antenna input ANT. Then, this frequency fo is changed periodically within a predetermined range and is used in place of a sweeper.

(Example〕 FIG. 2 shows an embodiment of the present invention, with a filter BPF +.

BPF 2 has adjustment capacitors 01 to C4.

The PLL synthesizer 10 is configured as shown in FIG. An adjustment program that periodically changes fo within a certain range is stored in the ROM.In this way, by inputting the output of filter BPF2 (point B) to the spectrum analyzer, the pass characteristics of BPF + to BPF 2 can be determined. can be observed.

In Figure 3, an ordinary oscilloscope 50 is used instead of a spectrum analyzer, and its X input is connected to the synthesizer's point A (
B
It is possible to display the passage characteristics of PF + to BPF 2. Point A (VCO input) of the synthesizer corresponds to the oscillation frequency fo, and point B of the front end
The points indicate the output level of the high frequency stage, so these can be expressed as
If the Y axis is used, the capacitors CI to C4 may be adjusted so that the two-dimensional display becomes a symmetrical mountain shape with the center frequency as the peak.

〔Effect of the invention〕

As described above, according to the present invention, there is an advantage that the filter of the reception high frequency section can be adjusted without a frequency sweeper as a measuring device.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of the principle of the present invention, Fig. 2 is a block diagram showing an embodiment of the present invention, Fig. 3 is an explanatory diagram at the time of adjustment, and Fig. 4 is a block diagram showing a conventional adjustment method. . In the figure, 10 is a PLL synthesizer, 21.23 is a band pass filter, 22 is a high frequency amplifier, 24 is a mixer, 3
0 is a supply destination selector switch, 40 is a microprocessor with a built-in sweeper program, and 50 is a display. Applicant Fujitsu Ten Ltd. Representative Patent Attorney Minoru Aoyagi 1+
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Claims (1)

[Claims] In a wireless device that uses a PLL synthesizer to generate a receiving station or transmit frequency, and changes the oscillation frequency by varying the division ratio of its variable frequency divider, the output of the PLL synthesizer is determined on the receiving side during testing. 1. A PLL synthesizer wireless device, comprising: a circuit for switching to a high frequency input stage; and a circuit for periodically changing the oscillation frequency of the PLL synthesizer within a predetermined range during testing.