JPS62256521A - Phase comparison circuit - Google Patents

Abstract

PURPOSE:To attain the effective operation even to a missing or disturbed reference signal during a specific period by replacing a voltage subject to sample and hold into an output voltage of a phase comaparator circuit for a specific period. CONSTITUTION:When the open/close state of switches SW1-SW4 is as shown in figure, the operating state is that a horizontal synchronizing signal exists normally. The output voltage of a filter 11 is a normal voltage in such a state and the output voltage of the filter 11 is outputted to an output terminal 13 via the switch SW 2 and subjected to sample and hold to the sample and holding circuit 12 via the switch SW 3. In a period v of the vertical synchronizing signal, since each switch is thrown oppositely to the position to that shown in figure, the phase comparison function in the phase comaparator circuit is stopped. On the other hand, when the switch SW 4 is closed, the voltage stored in the sample and holding circuit 12 is outputted to an output terminal 13, a continuous output voltage shown in figure (e) is outputted to the output terminal 13.

Description

[Detailed Description of the Invention] (Industrial Application Field) A signal in the form of a signal in which the signal used as a reference for synchronization is missing for a certain period of time, or a signal that is used as a reference for synchronization However, synchronization is provided in various devices such as television receivers, computer display devices, and other devices in which synchronization is performed by signals in the form of signals whose cycles change over a certain period of time. This invention relates to phase comparison circuits used in circuits, etc.

(Prior Art) Automatic control of equipment by an automatic circuit equipped with a comparison means to which a reference signal and a comparison signal are supplied is as follows.
It is well known that it has been widely used in various devices in many technical fields, and automatic control circuits can perform correct control operations as long as a reference signal is normally supplied to them. can.

However, in some types of equipment, the signals contained in the signals supplied to the equipment and used as standards for automatic control of the equipment seem to be missing during a certain period of time. In some cases, a signal in a signal format or a signal used as a reference is a signal in a signal format whose cycle changes over a certain specific period.

As mentioned above, the signal used as a reference for automatic control is a signal in the form of a signal that is missing during a certain specific period, or the signal used as a reference.

Examples of devices to which a signal whose period changes over a certain period of time are supplied include, for example, television receivers, display devices for some personal computers, and other devices.

FIG. 4 is a block diagram of a horizontal automatic frequency phase control circuit (horizontal AFC circuit) used in television receivers, display equipment, etc. In FIG. 4, 1 is an input terminal for a synchronizing signal.

2 is a phase comparison circuit, 3 is a filter circuit (low-pass filter), 4 is a voltage controlled oscillator, 5 is a horizontal deflection output circuit,
6 is a sawtooth wave signal generation circuit, and 7 is an output terminal.

In the horizontal AFC circuit shown in FIG. 4 described above, a horizontal synchronizing signal is supplied as a reference signal via the synchronizing signal input terminal 1.

The phase comparator circuit 2, which is supplied with the sawtooth wave signal generated by the sawtooth wave signal generation circuit 6 as a comparison signal by the output signal from the output terminal 7, compares the phases of the two signals described above and generates an error signal. Output.

The output signal from the phase comparison circuit 2 described above is supplied to the voltage controlled oscillation circuit 4 via the filter circuit 3, thereby controlling the oscillation frequency of the voltage controlled oscillation circuit 4.

Therefore, the horizontal AFC circuit shown in the fourth diagram is a closed-loop automatic frequency phase control circuit consisting of phase comparator circuit 2→filter circuit 3→voltage controlled oscillator 4→horizontal deflection power circuit 5→sawtooth signal generation circuit 6→ The frequency and phase of the output signal outputted to the output terminal 7 can be synchronized with the repetition frequency and phase of the horizontal synchronization signal applied to the input terminal 1 of the synchronization signal.

Now, the standard television signal is a composite video signal having a signal form in which a video signal and a composite synchronization signal are combined, and the input terminal 1 of the synchronization signal in the horizontal AFC circuit shown in FIG. It is well known that a horizontal synchronization signal separated by a separation circuit is supplied.

By the way, 1. For example, in Japan's standard television signal, an equalization pulse is inserted in the 9H period (9 horizontal opening periods) of the vertical blanking period, and a cutting pulse is inserted in the vertical synchronization signal period. A signal format in which a horizontal sync signal and an equalization pulse are inserted as a signal format, i.e., a signal format in which a horizontal sync signal is inserted in a part of the vertical blanking period in a state different from that in other signal parts. It is well known that the operation of the phase comparison circuit shown in FIG. 4 is disturbed by the equalization pulse and the vertical synchronization signal.

However, in a television signal, no video signal is inserted except for a special signal during the approximately 10H period after the equalization pulse insertion period, and by appropriately setting the constant of the filter circuit 3, the video period can be By the time the start
It is possible to maintain a stable state to a necessary and sufficient degree, and in fact, there is no major problem when handling ordinary images even in current television receivers.

(Problems to be Solved by the Invention) However, when considering a display monitor used for, for example, a personal computer terminal.

The reality is that signals output from personal computers do not necessarily comply with broadcast standards such as television signals, and signals in various signal formats are output from personal computers depending on the circumstances of each manufacturer. In reality, the signal format is as shown in FIG. 5, and a waveform diagram of one example of the signal format is shown in FIG.

In FIG. 5, which shows signal waveforms at various parts near the vertical synchronization signal, (,) in FIG. 5 indicates a data period.

5(b) is a synchronizing signal applied to the phase comparator circuit 2 in FIG. 4, and FIG. 5(c) is a sawtooth wave supplied as a reference signal to the phase comparator circuit 2 in FIG. 4. Signal, Fig. 5 (
d) and (e) show high-power waveforms of the filter circuit 3 in FIG. 4, respectively.

Now, in the case of a certain type of personal computer, its composite synchronization signal has no incision in the horizontal synchronization signal during the vertical synchronization signal period, as shown in the waveform shown in FIG. The signal format is such that the horizontal synchronization signal is completely missing, or even if there is a cut in the horizontal synchronization signal during the vertical synchronization signal period, the timing is inconsistent. In many cases, the signals are miscellaneous in the form of signals that contain information for horizontal synchronization during the vertical synchronization signal period. The periods of signals lacking information vary widely, and in extreme cases, there are even cases in which signals lack information for horizontal synchronization over a period of more than 10 H. In addition, the period from the end of the vertical synchronization signal to the start of data is extremely short, such as 2H from the end of the single-ply vertical synchronization signal, as shown in Figure 5(a). In some cases.

If signals of various signal types as described above are supplied to the phase comparator circuit 2', the phase comparator circuit 2 will malfunction during the period of the vertical synchronization signal.

The output voltage via the filter circuit 3 is as shown in (d) in Figure 5.
, an abnormal voltage is generated during the period of the vertical synchronization signal, as shown in (e). Since the abnormal voltage generated as described above is used as a control voltage for the voltage controlled oscillator 4 in FIG. 4, when the abnormal voltage as described above is supplied as the control voltage, In this case, the oscillation frequency of the voltage controlled oscillator 4 is disturbed.

Since it is impossible in normal AFC operation to immediately return the disturbance in the oscillation frequency of the voltage controlled oscillator 4 to the normal state at the start of the horizontal synchronization signal after the end of the vertical synchronization signal, the horizontal AFC circuit is in a steady state. It usually takes several hours or more to settle down.

Therefore, in one double-sided display, the vertical line curves to the right or left at the top of the screen, as shown in FIGS. 6(a) and (b). In the explanation so far, horizontal AF of television receivers, etc.
The explanation was given using the C circuit as an example.

Color synchronization circuits that are based on burst signals such as color signals also have the same problem because the burst signal is lost during the period of the single direct synchronization signal. A signal in which a special signal is superimposed on the vertical blanking period may cause problems that cannot be ignored even if the signal complies with broadcasting standards such as NTSC signals.

(Means for Solving the Problems) The present invention provides a phase comparison circuit that compares the phases between two signals, and includes means for stopping the function of the phase comparison circuit during a specific period, and a phase comparator comprising means for sampling and holding the voltage value of the phase comparator circuit during a period other than the specified period; and means for replacing the sampled and held voltage value with the output voltage of the phase comparator circuit during the specified period. The present invention provides a comparison circuit, that is, a phase comparison circuit that can perform an effective operation even for a signal whose reference signal is missing or disturbed during a certain period.

(Example) Hereinafter, specific contents of the phase comparator circuit of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 is a block diagram showing the basic configuration of the phase comparison circuit of the present invention, FIG. 2 is a waveform diagram for explaining the operation of the phase comparison circuit shown in FIG. A specific configuration example diagram is shown in which the phase comparison circuit is applied to a phase comparison circuit in a horizontal frequency phase automatic control circuit of a television receiver or the like.

In FIG. 1, reference numeral 10 denotes a phase comparison circuit, to which a synchronizing signal as shown in FIG. 2(b) is supplied from an input terminal 8, and a second A sawtooth wave signal as shown in FIG. The resulting output voltage - is sent out.

In FIG. 1, 12 indicates a sample and hold circuit, and SWI to SW4 are shown in FIG. 5(c), which are synchronously separated from the composite synchronizing signal shown in FIG. 5(b). This is a switch that is driven to open and close at the same time by a vertical synchronization signal.

Since the open/close states of the switches SWI to SW4 shown in FIG. 1 indicate the open/close states of each switch during periods other than the vertical synchronizing signal period, SW1 to SW4 during the vertical synchronizing signal period τV The open/close state is opposite to the open/close state shown in FIG.

In the phase comparison circuit of the present invention having the configuration shown in FIG. 1, if the switches SWI to SW4 are opened and closed as shown in FIG. 1, the horizontal synchronization signal is normally present. In this state, the output voltage of the filter 11 is a steady voltage, and the output voltage value of the filter ]-1 is output to the output terminal 13 via the switch SW2, and the output voltage of the filter 11 is a steady voltage. S
Since it is supplied to the sample and hold circuit 12 via W3, the output voltage value of the filter 11 described above is sampled and held by the sample and hold operation in the sample and hold circuit 12.

Now, during the period τV of the vertical synchronization signal, the opening/closing states of the switches SWI to SW4 described above have a relationship opposite to that shown in FIG. Among the switches SW1 to SW4, the switches SWI to SW3 are opened, and the phase comparison function in the phase comparison circuit is stopped.

On the other hand, when the voltage value stored in the sample hold circuit 12 is outputted to the output terminal 13 by closing the switch SW4 described above.

A continuous output voltage as shown in FIG. 2(e) is outputted to the output terminal 13. That is, in the phase comparator circuit of the present invention, as explained with reference to (d) and (e) of FIG. It can be easily understood that when applied to a horizontal AF'C circuit in a television receiver, a display device, etc., image distortion at the top of the display screen as shown in FIG. 6 described in the conventional example will not occur.

FIG. 3 is a block circuit diagram showing a specific embodiment of the phase comparator circuit of the present invention. In FIG. 3, transistors 1 to Q5. Diode D, resistors R1 to R3
The circuit constituted by is a well-known current output type phase comparator circuit that is often used in recent ICs and the like.

In FIG. 3, a reference synchronizing signal, for example (b) in FIG. 2, is applied to the input terminal 8. However, this voltage value is the same as that of transistor Q2. Since the current value of the resistor R1 is determined, it goes without saying that it should be processed to an appropriate value in advance. On the other hand, from the input terminal 9, a sawtooth wave signal, for example (d
) is added.

In the current output type phase comparator circuit described above, the input terminals 8 and 9
It is well known that the phase difference between the two signals supplied to the circuit is detected, and a current flows into and out of the resistor R3 by a current mirror circuit consisting of a diode D and a transistor Q5, and is converted into a voltage value. It is as follows.

Further, capacitors C2 and C3 and resistor R4 form a filter, and the output of the two-phase comparator circuit is output to terminal 13. In the phase comparator circuit having the above configuration, the capacitor CI, the reference voltage W Bl, ! 32 is functionally necessary. Furthermore, the transistor Q1 is connected to its base because the current in the phase comparator circuit is cut off when a vertical synchronizing signal as shown in FIG. 2(c) is applied to the input terminal 14. When a vertical synchronizing signal such as that shown in FIG. 2(c) is inputted for a pace of 1, the above-mentioned function in the phase comparator circuit stops. That is, the operation of the transistor Q1 described above corresponds to the operation of the switches SWI to SW2 in FIG.

On the other hand, the sample and hold circuit 1 shown in FIG.
2 is the calculation Jl! as shown in the dotted line frame 12 in FIG. It can be configured using a width gauge. The sample-and-hold circuit 12 shown in FIG. 3 transfers the voltage output from the filter 11 to the switch SW3 during a period other than the period τV of the vertical synchronizing signal shown in FIG. Resistance R5
The voltage value is stored in the capacitor C4 via the vertical synchronizing signal period τV, when the switch SW3 is opened and the switch SW
4 is closed, the signal is sent to the output terminal 13, as in the case of the phase comparison circuit shown in FIG. Note that the resistors R5 and R6 in the sample and hold circuit m12 are set at the time of design due to the time constant of the filter 11, and the phase comparator circuit configured as shown in Figure 3 is used in television receivers and display devices. In the case of using a horizontal AFC circuit such as the above, it is determined based on the stability of the system.

In the explanation so far, the embodiment of the present invention has been described using the horizontal AFC circuit of a television receiver as an example. It goes without saying that when this happens, great effects can be expected in the same manner as described above.

(Effects) As is clear from the detailed explanation above, the phase comparison circuit of the present invention is a phase comparison circuit that compares the phases between two signals, and the phase comparison circuit stops its function during a specific period. and the means to make it so.

It comprises means for sampling and holding the voltage value of the phase comparison circuit during a period other than the above-described specific period, and means for replacing the sample-and-held voltage value with the output voltage of the phase comparison circuit during the above-mentioned specific period. Therefore, in the phase comparator circuit of the present invention, the signal used as the reference for synchronization is in a state where it is missing during a certain period (a No. 8 type signal, or a signal used as the reference for synchronization). Even if the phase comparison circuit is supplied with a signal in the form of a signal whose period changes over a certain period, the phase comparison circuit will not malfunction; The phase comparator circuit does not generate any abnormal voltage, and this voltage does not cause any disturbance in the oscillation frequency of the voltage-controlled oscillator that is used as the control voltage, so that a distortion-free reproduced image is always displayed on the display screen. According to the phase comparator circuit of the present invention, the problems of the conventional phase comparator circuit described above can be satisfactorily solved, and characteristics such as color synchronization and horizontal synchronization are improved, for example. To make it possible to easily provide various equipment such as television receivers and display monitors.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the basic configuration of the phase comparison circuit of the present invention, FIG. 2 is a waveform diagram for explaining the operation of the phase comparison circuit shown in FIG. 1, and FIG. 3 is the phase comparison circuit of the present invention. 4 is a side view of a specific configuration when applied to a phase comparator circuit in an automatic horizontal frequency phase control circuit of a television receiver, etc. Figure 4 shows a horizontal automatic frequency phase control circuit used in a television receiver, display equipment, etc. (Horizontal AFC circuit) - Figure 5 is a waveform diagram for explaining the operation of the horizontal AFC circuit shown in Figure 4. Figure 6 is for explaining the playback screen where the problem is occurring. This is a diagram. 1.8... Synchronization signal input terminal, 2.10... Phase comparison circuit, 3... Filter circuit (low pass filter)
. 4... Voltage controlled oscillator, 5... Horizontal deflection output circuit, 6... Sawtooth signal generation circuit, 7, 13... Output terminal. 9.14...Input terminal, 11...Filter, 12.
... Sample hold circuit, 14... Vertical synchronization signal input child, SWI to SW4... Switch.

Claims (1)

[Claims] A phase comparison circuit that compares the phase between two signals, comprising means for stopping the function of the phase comparison circuit during a specific period, and sampling a voltage value of the phase comparison circuit during a period other than the above-mentioned specific period. A phase comparison circuit comprising means for holding, and means for replacing the sampled and held voltage value with the output voltage of the phase comparison circuit during the specific period.