JPS62172453A - Program loading system - Google Patents

Abstract

PURPOSE:To shorten a transfer time, and to prevent the processing capacity of a center station from being lowered by requesting the transmission of only a program or a data stored at a storing area judged as wrong from the result of a verification by an arithmetic means to an equipment at a transmission side. CONSTITUTION:A remote station 10 is provided with a DMA control circuit 102, a memory control circuit 103, a memory 104, a logical operation circuit 105, and an interface circuit 106 at a CPU 101 through an address bus/data bus 107. When the abnormal traveling of the program due to a factor, such as a partial damage in the program or the data is generated in a normal program traveling, the remote station 10 performs the logical operation of each block at a program area corresponding to a reset instruction, or an initial startup instruction from a center station 20, and decides normality, and transmits the program loading request of only an NG, that is, an erroneous block to the center station 20. Thereby,the number of times and the time of loading can be reduced, simultaneously, a load on the center station 20 can be reduced.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a program loading method, particularly when it is necessary to load a large amount of programs or data between devices connected via a communication line with a high line speed. Regarding effective program loading methods.

[Conventional technology]

FIG. 2 is a block diagram showing an example of a connection between a center station and remote stations in a general network, and FIG. 5 is a diagram showing an example of a procedure for a conventional program loading method between a center station and remote stations.

As shown in FIG. 2, a center station 20 and a plurality of remote stations 1
0 accommodates a plurality of data terminals 4°, and the center station 2o and each remote station 1o each have a modulator/demodulator dJi,
connected via a communication line.

In this program loading method, the program or data to be transferred is transferred to a plurality of blocks 0, 1, . . . as shown in FIG. ~ N, and in accordance with the program loading request from the remote station 10, the transmitting device of the center station 20 determines the storage start address of the area in which the program for l programs (block 0) is to be stored in the memory of the remote station 1o. 80 and the block byte length information Bo, and further apply the @ calculation algorithm (here, cyclic redundancy check algorithm) for verifying the validity of the data to be transferred to this information, and add the operation result data (here Then, FCS data) Fe2. is added and transferred to the remote station IO.

Next, the completion of transfer of one block of programs is notified to remote station 10 by a termination instruction signal from center station 20, and the transfer of one block of programs is completed. Sequential block 1. By repeating the transfer every .about.N, the program is transferred from the center station 2° to the remote station 10.

[Problem that the invention seeks to solve]

The conventional program loading method described above not only loads a program when the memory contents of the remote station are not guaranteed at all, such as when the remote station is powered on, but also prevents the program from running abnormally (runaway) due to partial destruction of the program. ), the entire program is loaded, so when transferring a large amount of program information using a low-speed communication circuit, there is a drawback that the transfer takes a long time and reduces the processing capacity of the center station.

[Means for solving problems]

The program loading method of the present invention, in a receiving device that receives a program or data divided into a plurality of areas, stores the received program or data and at the same time displays designation information of the storage area of the program or data and the transferred program or data. A storage means for storing logical operation result data based on a logical operation algorithm for verifying the validity of the data, and a storage means for storing the data of the logical operation result by a logical operation algorithm for verifying the validity of the data, and a storage means for storing the contents of the storage area corresponding to the information of the storage start address and the number of transferred bytes in the specified information. and calculation means for sequentially reading data and performing calculations based on the calculation algorithm.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of a remote station in an embodiment of the program loading method of the present invention, and FIGS. etc.) is a diagram showing a program loading procedure when a failure occurs at a remote station.

First, in FIG. 1, the remote station 1o has a central processing unit (
The address bus data p/(S1
Direct memory access control circuit (hereinafter referred to as DMA control circuit) 102. Memory control and control circuit 103. Memory 104. Logic operation circuit 1o5゜ Center station 20 and change @
An interface circuit 1o connected via a device 30
6t-[t, CPUtot and L) MA control circuit 1
Memo! Connected to J104.

Next, the operation of this embodiment will be explained based on FIGS. 1, 3, and 4.

First, when loading a program when the memory contents are not guaranteed at the time of power-on, etc. on the remote station 1o,
Remote station 1 responds to the initial startup instruction from center station 2o.
All blocks 0, 1 . ~N) The primary program loading request is sent to the center station 2.
Send to 0. In response to this program loading request, the remote station 10 stores the programs sequentially sent from the center station 20 to the remote station 10 at the storage start address Ao.
.

A! ,~A logical operation for storing the number of bytes indicated by B1 to BN from the memory address indicated by AN, and at the same time verifying the validity of the transmission data sent from the center station 20. The result data is stored in memory 104.

Next, if the program runs abnormally (runaway) due to a factor such as partial destruction of the program or data during normal program running, the remote station 10 will respond to the reset instruction or initial startup instruction from the center station 20 in the program area. Perform logical operations on each block to determine its validity,
A program loading request is sent to the center station 20 only for blocks that are NG, that is, incorrect (programs are destroyed). This procedure is as follows.

First, when the remote station 10 receives a reset signal and an initial start signal from the center station 20 via the interface unit 106, it stores the storage start address A5, AH, ~AN transfer byte number information B of each block O1l, ~N of the program.
These pieces of information are sequentially read out from the memory area where o, B, .

The DMA control circuit 102 sequentially reads the memory contents one byte at a time from the memory 104 according to the set address and transfers it to the logic operation circuit 105.

The logic operation circuit 105 sequentially performs logic operations on the transferred data. L) The operation of the MA control circuit 102 is such that the memory contents of the set byte length are the logic operation circuit 1.
05 until all the data has been transferred, and when the data transfer is complete, an interrupt is generated to CPU10IK and DMA is executed.
Notify when transfer is complete.

In this embodiment, since the logical operation for verifying the validity of the program is a cyclic redundancy check (C), the above logical operation is performed first at storage start addresses A, , A1 . ~A
N and transfer byte number information BO, Bl.

~After transferring BN to the logic operation circuit 105 and calculating it 1)
MA transfer is started, logical operations are performed on the program of each block, and finally FCS data FC80, Fe2 . , ~FC8N as logic operation circuit 10
5 and performs calculations, and based on the calculation results, it is determined whether the program contents of each block are correct or not.

In FIG. 4, the remote station 10 applies logical operations sequentially from block 0 of the program area to the reset and initial startup from the center station 20, and determines whether the program contents of each block are correct. A program loading request is sent to the center station 20 only for the block 1 program that is not available.

〔Effect of the invention〕

As explained above, in the present invention, when loading a program, the contents in the memory are checked by a logical operation circuit in the remote station, and only areas where the memory contents are different from the program to be loaded are sent to the center station. By making a program loading request, there is an effect of reducing the number of times and time of loading and at the same time reducing the load on the center station.

In general communication networks, it is not necessary to load all programs every time, and in many cases it is sufficient to load only the abnormal area of memory when a failure occurs. The present invention satisfies this need.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing the configuration of a remote station in an embodiment of the program loading method of the present invention, FIG. 2 is a block diagram showing an example of connection between a center station and remote stations in a general network, and FIG. 3 , Figure 4 shows the program loading procedure at the initial stage and when a failure occurs at the remote station in Figures 1 and 2, respectively. Figure 5 shows one of the conventional program loading methods between the center station and the remote station. It is a figure which shows the example of a procedure. 10...Remote station, 20...Center station, 30...Modulator/demodulator, 40...Data terminal, 101...Central processing unit (CPU)
, 1o 2...DMA control circuit, 103...
...Memory control circuit, 104...Memory, 1
05...Logic operation circuit, 106...Interface circuit, 107...Address bus.
data bus. ,\. Agent Patent Attorney Uchihara -) - Figure 7 Figure 3 Figure 4 Figure 4

Claims (1)

[Claims] In a receiving device that receives a program or data divided into multiple areas, at the same time as storing the received program or data, verifying the designation information of the storage area of the program or data and the validity of the transferred program or data. a storage means for storing logical operation result data based on the logical operation algorithm, and sequentially reads the contents of the storage area corresponding to the information of the storage start address and the number of transfer bytes in the specified information, and performs the operation according to the operation algorithm. 1. A program loading method, comprising: a calculation means, and requests a transmitting device to transmit only programs or data in a storage area that are incorrect as a result of verification by the calculation means.