JPS62145798A - Multilayer substrate - Google Patents

Multilayer substrate

Info

Publication number
JPS62145798A
JPS62145798A JP28664885A JP28664885A JPS62145798A JP S62145798 A JPS62145798 A JP S62145798A JP 28664885 A JP28664885 A JP 28664885A JP 28664885 A JP28664885 A JP 28664885A JP S62145798 A JPS62145798 A JP S62145798A
Authority
JP
Japan
Prior art keywords
wiring pattern
dielectric sheet
wiring patterns
multilayer substrate
wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP28664885A
Other languages
Japanese (ja)
Other versions
JP2534983B2 (en
Inventor
昭一 村本
秋葉 一男
眞義 飯田
昭人 佐塚
伝田 実
深井 徹也
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Soshin Electric Co Ltd
Sony Corp
Original Assignee
Soshin Electric Co Ltd
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Soshin Electric Co Ltd, Sony Corp filed Critical Soshin Electric Co Ltd
Priority to JP28664885A priority Critical patent/JP2534983B2/en
Publication of JPS62145798A publication Critical patent/JPS62145798A/en
Application granted granted Critical
Publication of JP2534983B2 publication Critical patent/JP2534983B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、電気回路用多層基板に関する。[Detailed description of the invention] [Industrial application field] The present invention relates to a multilayer board for electric circuits.

〔発明の概要〕[Summary of the invention]

本発明は、多層基板において、 誘電体シートの両面に印刷を行い、誘電体シートの対向
する面にスルホールを含む各配線パターンをスルホール
を除いて相等しく形成し、配線パターン間に絶縁層を形
成してから配線パターンどうし、及び絶縁層どうしを圧
着一体化することにより、 各層間の接続の信頼性及び接着強度を増大させた多層基
板を提供できるようにしたものである。
In a multilayer board, the present invention prints on both sides of a dielectric sheet, forms each wiring pattern including through holes equally on opposite sides of the dielectric sheet except for the through holes, and forms an insulating layer between the wiring patterns. After that, the wiring patterns and the insulating layers are integrated by pressure bonding, thereby making it possible to provide a multilayer board with increased connection reliability and adhesive strength between each layer.

〔従来の技術〕[Conventional technology]

従来、有機樹脂基板から多層基板を製造する場合、基板
の表面に電気回路を印刷形成し、電気回路量絶縁シート
用接着剤を印刷してから、この基板を複数枚合わせて熱
圧着することにより、接着剤と導電体とを直接接着させ
て多層基板を形成する方法が行われている。
Conventionally, when manufacturing a multilayer board from an organic resin board, an electrical circuit is printed on the surface of the board, an adhesive for an electrical circuit insulating sheet is printed, and then multiple boards are bonded together under heat. A method of forming a multilayer substrate by directly bonding an adhesive and a conductor has been used.

しかし、この方法による多層基板は基板間の接着強度あ
るいは剥離強度がやや弱い欠点があり、接着剤の印刷時
に接着剤がスルホールから回り込み、この結果、導通を
不良にする恐れがあるという欠点があった。
However, multilayer boards produced using this method have the disadvantage that the adhesive strength or peel strength between the substrates is somewhat weak, and that the adhesive may wrap around the through holes during printing, resulting in poor conductivity. Ta.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

本発明は、」1記欠点を解決すべく、多層基板を構成す
る各基板間の接続の信頼性を増大させ、各基板間の接着
強度を増大させるようにした多層基板を提供するもので
ある。
The present invention provides a multilayer board that increases the reliability of the connections between the boards constituting the multilayer board and increases the adhesive strength between the boards, in order to solve the problem described in item 1. .

〔問題点を解決するための手段〕[Means for solving problems]

本発明は、誘電体シートの両面に印刷を行い、前記誘電
体シートの対向する面にスルホールを含む各配線パター
ンをスルホールを除いて相等しく形成し、前記配線パタ
ーン間に前記配線パターンの厚さと同じ厚さのガラス絶
縁層を形成してから前記配線パターンどうし、及び前記
ガラス絶縁層どうしを熱融着により一体化した多層基板
に係る。
In the present invention, printing is performed on both sides of a dielectric sheet, and each wiring pattern including through holes is formed equally on the opposite side of the dielectric sheet except for the through hole, and the thickness of the wiring pattern is equal to the thickness of the wiring pattern between the wiring patterns. The present invention relates to a multilayer substrate in which glass insulating layers of the same thickness are formed and then the wiring patterns and the glass insulating layers are integrated by heat fusion.

〔実施例〕〔Example〕

次に、本発明の一実施例を図面を参照して説明する。 Next, one embodiment of the present invention will be described with reference to the drawings.

本実施例では、誘電体シート例えばマイカからなる基板
2の両面に銀ペーストをスクリーン印刷してスルホール
1を含む配線パターン3をスルボール1を除いて概略相
等しく形成し、次に、この配線パターン3間に絶縁剤及
び接着剤としてのガラスペーストを配線パターンの厚さ
と同じ厚さで印刷した。次に、400〜700°Cで1
〜6 kg / cJの圧力により圧着して、配線パタ
ーン3及びガラス絶縁層4を熱融着し、一体化して多層
基板が得られた。
In this embodiment, silver paste is screen printed on both sides of a substrate 2 made of a dielectric sheet, for example, mica, to form wiring patterns 3 including through holes 1 that are approximately equal to each other except for through balls 1, and then the wiring patterns 3 In between, glass paste was printed as an insulating agent and an adhesive to the same thickness as the wiring pattern. Next, 1 at 400-700°C
The wiring pattern 3 and the glass insulating layer 4 were thermally fused and integrated by pressure bonding at a pressure of ~6 kg/cJ to obtain a multilayer board.

この多層基板は、A、B及びC,D両面から印刷された
ことによりスルホール1の内面が二重に印刷され、接続
の信頼性が向」−シた。そして、同一材料どうしの圧着
を行ったので均一な圧着が可能となった。また、配線パ
ターンの厚さが2倍となったことによりその導体抵抗値
が1/2となり高速応答性及び高周波特性が改善された
。そして、基板間の接着強度が向上し、基板面に対し9
0゜方向の剥離強度として2〜3 kg / ctAの
値が得られ、従ってこの多層基板は充分強固な多層基板
であった。
This multilayer board was printed from both sides A, B and C, D, so that the inner surface of the through hole 1 was printed twice, and the reliability of the connection was improved. Since the same materials were crimped together, uniform crimping became possible. Furthermore, since the thickness of the wiring pattern was doubled, the conductor resistance value was halved, resulting in improved high-speed response and high-frequency characteristics. The adhesive strength between the substrates is improved, and the bonding strength between the substrates is increased by 9
A value of 2 to 3 kg/ctA was obtained as the peel strength in the 0° direction, and therefore, this multilayer substrate was a sufficiently strong multilayer substrate.

〔発明の効果〕〔Effect of the invention〕

本発明は、誘電体シートの両面に印刷を行い、前記誘電
体シートの対向する面にスルホールを含む各配線パター
ンをスルホールを除いて相等しく形成し、前記配線パタ
ーン間に前記配線パターンの厚さと同し厚さのガラス絶
縁層パターンを形成してから前記配線パターンどうし、
及び前記ガラス絶縁層どうしを熱融着により一体化して
多4基板を得るようにしている。
In the present invention, printing is performed on both sides of a dielectric sheet, and each wiring pattern including through holes is formed equally on the opposite side of the dielectric sheet except for the through hole, and the thickness of the wiring pattern is equal to the thickness of the wiring pattern between the wiring patterns. After forming glass insulating layer patterns of the same thickness, the wiring patterns are connected to each other,
The glass insulating layers are then integrated by heat fusion to obtain a multi-layer substrate.

このため、スルホール接続部が両面から印刷され、その
結果、スルホール内面が二重に印刷され、スルホールが
基板の裏表及び基板間で確実に接続されるため、スルホ
ール接続が完全になる。従って、接続の信頼性が向」ニ
する。また、接着強度あるいは剥離強度が増大し、外力
による剥離の恐れが少なくなる。そしてまた、配線パタ
ーンの厚さが2倍となり、抵抗が1/2となって高周波
特性が改善される。そしてまた、電極間の絶縁性が向上
し、電極間のショートがなくなり、熱圧着時の電極の変
形拡大すなわちマイグレーションによる絶縁不良が防止
でき、耐電圧的に高安定となるため、高密度実装が可能
である。
Therefore, the through-hole connection part is printed from both sides, and as a result, the inner surface of the through-hole is printed twice, and the through-hole is reliably connected between the front and back of the substrate and between the substrates, so that the through-hole connection is perfect. Therefore, the reliability of the connection is improved. Furthermore, the adhesive strength or peel strength is increased, and the possibility of peeling due to external force is reduced. Furthermore, the thickness of the wiring pattern is doubled, the resistance is halved, and the high frequency characteristics are improved. Furthermore, the insulation between the electrodes is improved, short circuits between the electrodes are eliminated, and insulation defects due to expansion of deformation of the electrodes during thermocompression bonding, that is, migration, are prevented, and the voltage resistance is highly stable, allowing high-density mounting. It is possible.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、本発明の多層基板の一例を示す断面図、第2
図は、従来の多層基板の一例を示す断面図である。 なお図面に用いた符号において、 1−−−−−−−−−−−−−−スルホール2−・−−
−−−−一−−−−−−−−・一基板3−−一−−−−
−−−−−−−−・−配線パターン4−−−−−−−一
−−−−−−・−ガラス絶縁層である。
FIG. 1 is a sectional view showing an example of a multilayer substrate of the present invention, and FIG.
The figure is a sectional view showing an example of a conventional multilayer board. In addition, in the symbols used in the drawings: 1--
−−−−1−−−−−−−・1 board 3−−1−−−
----------- Wiring pattern 4 ---------- Glass insulating layer.

Claims (1)

【特許請求の範囲】[Claims]  誘電体シートの両面に印刷を行い、前記誘電体シート
の対向する面にスルホールを含む各配線パターンをスル
ホールを除いて相等しく形成し、前記配線パターン間に
前記配線パターンの厚さと同じ厚さのガラス絶縁層を形
成してから前記配線パターンどうし、及び前記ガラス絶
縁層どうしを熱融着により一体化した多層基板。
Printing is performed on both sides of the dielectric sheet, and each wiring pattern including through holes is formed equally on the opposite side of the dielectric sheet except for the through hole, and a layer of the same thickness as the wiring pattern is formed between the wiring patterns. A multilayer board in which a glass insulating layer is formed and then the wiring patterns and the glass insulating layers are integrated by heat fusion.
JP28664885A 1985-12-19 1985-12-19 Laminated board Expired - Fee Related JP2534983B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP28664885A JP2534983B2 (en) 1985-12-19 1985-12-19 Laminated board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP28664885A JP2534983B2 (en) 1985-12-19 1985-12-19 Laminated board

Publications (2)

Publication Number Publication Date
JPS62145798A true JPS62145798A (en) 1987-06-29
JP2534983B2 JP2534983B2 (en) 1996-09-18

Family

ID=17707143

Family Applications (1)

Application Number Title Priority Date Filing Date
JP28664885A Expired - Fee Related JP2534983B2 (en) 1985-12-19 1985-12-19 Laminated board

Country Status (1)

Country Link
JP (1) JP2534983B2 (en)

Also Published As

Publication number Publication date
JP2534983B2 (en) 1996-09-18

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