JPS61281781A - Video signal detecting circuit - Google Patents

Abstract

PURPOSE:To detect whether a normal video signal is inputted or not by generating a pulse signal in accordance with a rise of a composite synchronous signal of the video signal and detecting a direct current voltage value integrating this pulse signal. CONSTITUTION:A composite synchronous signal 11 of a video signal is inputted to a monostable multivibrator MW and in accordance with its rise, is generated a pulse signal having a prescribed pulse duration. When a frequency signal except for the composite synchronous signal is inputted, the operation of the monostable multivibrator MW is stopped, the pulse signal outputted from the monostable multivibrator MV is integrated by RC integrating circuits R15, C14 and converted into a direct current voltage VDC1. Levels are compared between this direct current voltage VDC1 and a reference voltage VB1 corresponding to the time when inputting a vision limit video signal and based on the level comparing result, whether a correct video signal is inputted or not is discriminated.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a video signal detection circuit that is used in, for example, a video tape recorder and detects whether or not a normal video signal is being input.

[Technical background of the invention] As is well known, for example, a video tape recorder (hereinafter referred to as VT)
(abbreviated as R) takes out the vertical synchronizing signal of the input video signal as a reference signal, applies servo to the rotary head based on this reference signal, and thereby forms a tape pattern defined by the standard.

The input video signal is recorded on this pattern field by field. However, if this continues, the servo of the rotary head will become disconnected if a normal video signal is not input, and a normal tape pattern will not be obtained. In particular, with systems that multiplex record video and audio signals on the same pattern, for example, when there is no video signal and only the audio signal is recorded, the correct pattern cannot be obtained and the data may be recorded on the wrong pattern. The audio signal will be recorded, making it impossible to obtain normal audio output during playback. Therefore, it is necessary to detect the presence or absence of a video signal during recording and, if a normal video signal is not input, not to use the video signal as a reference signal.

As a means to solve the above problem, a video signal detection circuit as shown in FIG. 2 has been used conventionally.

That is, the input terminal 11 of this video signal detection circuit is supplied with a composite synchronization signal separated from the video signal, and the signal input via this input terminal 11 has a waveform formed by a capacitor C1 and a diode D1. The signal is supplied via a shaping circuit 12 to an amplifier circuit 13 made up of resistors R1 to R3 and a transistor Q1. A parallel resonant circuit 14 having a capacitance C and an inductance L and having a resonant frequency of 15.734 kHz (in the case of the NTSC system) corresponding to the frequency of the composite synchronization signal is connected to the output terminal of the amplifier circuit 13. That is, if the input signal has a specified frequency, the parallel resonant circuit 14 outputs a control signal according to the period. This control signal is the capacitor C
2, is supplied to a switching circuit 15 consisting of a resistor R4 and a transistor Q2.

This switching circuit 15 includes a resistor R5 and a capacitor C.
By switching the transistor Q2 in response to the control signal, the capacitor C3 charged during the off period is discharged. In other words, if the input signal has a specified frequency, a sawtooth voltage signal synchronized with the input signal is output from the output terminal 17.
If the frequency is not the specified frequency, the saturation voltage of capacitor C3 is output.

In other words, this video signal detection circuit can detect that a video signal is being input by checking that the frequency of the composite synchronization signal separated from the input video signal is around a specified value. be.

[Problems in the Background Art] However, in the conventional video signal detection circuit as described above, although the capacitor C3 can prevent the chattering phenomenon when a composite synchronization signal that fluctuates around the detection level is input in a weak electric field, , since the output potential of the circuit is half-baked, the circuit format of the subsequent stage is limited. Furthermore, in the above circuit, the presence or absence of a video signal is checked based on the magnitude of the horizontal synchronization frequency component H included in the composite synchronization signal separated from the input video signal. However, when inputting video and audio signals using a tuner or a television receiver's empty channels (channels that are not broadcasting, which vary by region), when they are reflected on a television screen, they do not appear as a screen to the naked eye. Although the signal is generally inverted, its frequency is the same as that of a composite sync signal, so when this signal is passed through the above circuit, it is judged to be a video signal, resulting in false detection. I often end up.

[Purpose of the invention] This invention was made to improve the above-mentioned problem, and false detection occurs even when audio and video signals are obtained in weak electric fields or in empty channels of tuners and television receivers. It is an object of the present invention to provide a video signal detection circuit that can detect that a normal video signal is being input without causing problems.

[Summary of the Invention] That is, the video signal detection circuit according to the present invention inputs a composite synchronization signal of a video signal to a monostable multivibrator, generates a pulse signal having a predetermined pulse width in accordance with the rising edge of the composite synchronization signal, and When a frequency signal other than the composite synchronization signal is input, the operation of the monostable multivibrator is stopped, and the pulse signal output from the monostable multivibrator is integrated by an integrating circuit and converted into a DC voltage. The present invention is characterized in that the levels of the video signal and the reference voltage corresponding to the input of the visual limit video signal are compared, and it is determined whether the correct video signal has been input based on the result of the level comparison.

[Embodiment 1 of the Invention Hereinafter, an embodiment of the present invention will be described in detail with reference to FIG. 1. However, in FIG. 1, the same parts as in FIG. 2 are designated by the same reference numerals, and only the different parts will be described here.

FIG. 1 shows its configuration. The input terminal 11 is connected to the input terminal A of the monostable multivibrator MV, and is also connected to the base of the transistor Q11 via a filter circuit 18 consisting of a resistor R11 and a capacitor C11. be done. The collector of this transistor Qll is a resistor R
It is connected to bias power supply B via 12, and its emitter is grounded. Roughly speaking, the collector is connected to the other input terminal of the vibrator MV via an integrating circuit 19 consisting of a resistor R13 and a capacitor 012.

A capacitor C13 is connected to the T1 and T22 terminals for setting the operating time of the monostable multivibrator MV, and the T2 terminal is further connected to the bias voltage 81B via a resistor R14. And operating voltage input terminal CD
is directly connected to bias power supply B. The output terminal Q is connected to the (-
) input terminal and the (+) input terminal of the comparator CMP2.

The (+) input terminal of the above comparator CMPI is resistor R16
and connected to the connection point of R17. The other end of the resistor R16 is connected to the bias power supply B, and the other end of the resistor R17 is grounded. Also, the (+
) The input terminal is connected to the connection point of resistors R18 and R19. The other end of the resistor R18 is connected to the bias power supply B, and the other end of the resistor R19 is grounded. A resistor R20 is connected between the output terminal and the (+) input terminal of the comparator CMP1, forming a so-called Schmitt amplifier.

Further, each output terminal of the comparators CMPI and CMP2 is connected to a bias voltage II! through a resistor R21. B and is also connected to the output terminal 17, forming a so-called wired AND output.

The operation of the above configuration will be described below.

First, when the aforementioned composite synchronization signal is supplied to the input terminal A of the monostable multivibrator MV via the input terminal 11, a positive pulse synchronized with the rise of the signal is outputted from the output terminal Q. The pulse width of the positive pulse is determined by the time constant of capacitor C13 and resistor R14. and,
Considering the dynamic range, it is best to set this pulse width to about 1/2 of the period of the horizontal sync signal, but in the composite sync signal, the pulse width of the vertical sync signal part is set to about 40% of the period of the horizontal sync signal. It is preferable to do so. This is because when a video signal is input in a weak electric field, the part where noise is likely to be superimposed is the vertical synchronization signal, so if the pulse width is set to 1/2 or less of the period of the horizontal synchronization signal, when noise is superimposed, This is because changes in the smoothed voltage appear conspicuously in the vertical synchronization signal portion.

The positive pulse obtained here is connected to the resistor R15 and the capacitor C.
14 and converted into a DC voltage Voc1. This DC voltage Voc1 is supplied to the (-) input terminal of the oven collector type comparator CMP1 and the (+) input terminal of CMP2. The (+) input terminal of the comparator CMPI is supplied with a divided voltage V1 obtained by dividing the bias voltage B by resistors R16 and R17, and the added voltage Vs1 of the feedback voltage 2 fed back by the resistor R20, and the (-) input terminal of the comparator CMP2 The bias voltage B is connected to the resistor R at the end.
A divided voltage Ve2 divided by R18 and R19 is supplied.

Here, the output of the comparator CMPI becomes an oven level when Vocl is higher than Vsl, and becomes an L (low) level when it is lower than Val. Now, if the (+) input voltage when the output of comparator CMP1 is at L level is Vnl, and the +) input voltage when it is at oven level is VH2, comparator CMPI
When the output of is at L level, Vocl is VHI
If it is higher, the output remains at L level, and if it is lower, the output becomes oven level and the state is reversed. Also, when the output of comparator CMP1 is at oven level, if Vocl is lower than VB2, the output will remain at oven level, but if it is ^, the output will be at L level and the state will change. Invert. On the other hand, the output of the comparator CMP2 becomes a high level when Vocl is higher than VB2, and VB2
When it is lower, it is at oven level.

And, both comparators CMPI are connected to the output terminal 17.

A value resulting from the logical product of CMP2 appears.

Note that the divided voltage Ve1 is set lower than Vocl when a normal video signal is input. Also, V
H2 is set to be the same level as Vocl when a visual limit video signal due to a weak electric field etc. is input, and V
Hl is set somewhat lower than that.

On the other hand, input terminal B of the monostable multivibrator MV
A signal obtained by inverting the composite synchronization signal by transistor Qll is integrated by resistor R13 and capacitor C12,
It is converted into a DC voltage Vo c 2 and supplied. usually,
Since this DC voltage Voc2 is at the H (high) level, the vibrator MV is in an operable state; however, if a composite synchronization signal with reversed polarity, such as an empty channel of a tuner or television receiver, is input. In this case, the DC voltage Vo c 2 is at a low level, so that the transistor Q11 does not operate.

Next, the actual operation of the video signal detection circuit set as described above will be explained.

Assuming that a normal video signal is being input now, the free current voltage VDC2 is at H level, so the monostable multivibrator MV is in an operating state. Therefore, the output terminal Q of this vibrator MV is connected to the input terminal A.
A constant shaped pulse is output in synchronization with the rise of the composite synchronization signal supplied to the synchronous signal. At this time, VDcl has a value between Vol and Vel, and the output terminal 17 has an H
A level signal appears. This detects that a normal video signal is being input.

Further, when a video signal in a weak electric field is input, since noise is superimposed on the composite synchronization signal, the number of pulses from the output terminal Q of the vibrator MV increases, and as a result, Vocl becomes high. This tendency becomes stronger as the electric field strength decreases, and Vocl approaches VH2 in proportion to it.

Here, if a signal exceeding the visual limit is input, Vo
Since cl is lower than VH2, the circuit output remains at H level, but if it becomes below the visual limit, ■ Dc1 becomes V
Since it becomes higher than H2, the circuit output becomes L level. This detects that a normal video signal is not being input. Once it is determined that the video signal is not being input correctly, Vocl is set to Vol.
The circuit output will not return to the H level unless a near-normal video signal that is as follows is input. This makes it possible to perform reliable determination operations.

Next, when no video signal is input, the DC voltage Voc2 supplied to the input terminal B of the vibrator MV is at H level, so the vibrator MV is in an operating state. However, since the composite synchronization signal is not supplied to the input terminal A, no pulse is output from the output terminal Q. Therefore, VDCI becomes O■, which is lower than VBL, and the circuit output becomes L level. This detects that no video signal is being input. At this time, some noise may be generated at the input terminal A of the vibrator MV.
Although it is possible that it is input to VDcl, V
Since it will never be higher than BI, there will be no false positives.

In addition, when an audio signal or a video signal on an empty channel of the tuner and television receiver @R is input, the DC voltage Voc2 supplied to the input terminal B of the vibrator MV becomes L level as described above, so the vibrator MV doesn't work. Therefore, vibrator MV
No pulse is output from output terminal Q of. For this reason,
Vo c 2 becomes 0■, lower than VBl, and the circuit output becomes L level. This detects that a normal video signal is not being input.

Therefore, the video signal detection circuit configured as described above can accurately detect that a normal video signal is being input, and can especially detect weak electric fields, churners, and audio in empty channels of television reception. It is also possible to correctly detect signals and video signals without malfunction. This enables recording and playback without servo disturbance when used in a video tape recorder, and also allows the TV screen to be automatically muted if a normal video signal is not being input or output. becomes.

[Effects of the Invention] As detailed above, according to the present invention, even when audio and video signals are obtained in a weak electric field or in an empty channel of a tuner or television receiver, there is no erroneous detection and normal operation is possible. It is possible to provide a video signal detection circuit that can detect that a video signal is being input.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing an embodiment of a video signal detection circuit according to the present invention, and FIG. 2 is a circuit diagram showing the configuration of a conventional video signal detection circuit. 11... Input terminal, 12... Waveform shaping circuit, 13.
...Amplification circuit, 14...Parallel resonant circuit, 15...Switching circuit, 16...Integrator circuit, 17...Output terminal, 18...Filter circuit, 19, 20...Integrator circuit, 21... Level comparison circuit, MV... Monostable multivibrator, CMPL, CMP2... Comparator.

Claims (1)

[Claims] A monostable multivibrator which generates a pulse signal having a predetermined pulse width in response to the rising edge of a composite synchronization signal of a video signal; A means for stopping the operation, an integrating circuit that integrates the pulse signal output from the monostable multivibrator and converts it into a DC voltage, and a level comparison between the output of the integrating circuit and a reference voltage corresponding to the input of the visual limit video signal. 1. A video signal detection circuit, comprising means for determining whether or not a correct video signal is input based on the comparison result of the level comparison means.