JPS61221939A - Instruction function system for digital signal processor - Google Patents

Abstract

PURPOSE:To increase the processing speed by converting the next instruction into a NOP based on the deciding result of conditions obtained from the status of the processing result and therefore skipping simply any instruction. CONSTITUTION:When the instruction decoded by a decoder 3 is equal to a SKIP instruction, a condition deciding part 4 decides the conditions designated by the SKIP instruction. If the conditions are satisfied to the next instruction with indication for conversion into a NOP, this indication is set to a register 5 for conversion into NOP. The register 5 produces an output and performs control to switch a selector 2. The selector 2 reads a NOP code and supplies it to the decoder 3. The decoder 3 decodes the NOP code and changes the next instruction into a NOP instruction.

Description

[Detailed Description of the Invention] [Summary] In a digital signal processing processor i, conditions are judged based on the status of processing results, etc., and the results are reviewed:
By performing the process of converting the next instruction into a NOP based on C2, any instruction can be simply skipped, speeding up the processing.

[Industrial application field]

The present invention relates to an instruction function system in a digital signal processor (NSP) and the like, and particularly relates to an instruction function system that skips the next instruction based on condition determination based on status 62 of processing results, etc.

A digital signal processing processor executes various processes at high speed based on a single instruction description, and the present invention makes processing more efficient by using Cl so that any instruction can be easily skipped. This paper proposes an instruction system that enables high-speed processing.

[Conventional technology]

Digital signal processing processor f A method is used in which the processing within the system is not performed.

[Problem that the invention seeks to solve]

The method that uses the conditional jump function requires jump processing (secondarily, there is a problem that the number of processing cycles increases. Also, the method that uses Condition I: Therefore, the method that does not perform processing within the same instruction is There is a problem that only 12 instructions that can be written together in addition to the condition definition of one instruction field can be made unprocessed.

[Means for solving problems]

The method of the present invention makes a conditional judgment based on the status of the processing result, etc., and if the condition is satisfied or not as a result of the conditional judgment, the next instruction is changed to the NOP instruction. It is designed to perform processing.

[For production]

In the method of the present invention, processing is performed to convert the next instruction into a NOP based on the condition judgment result (-: Therefore, an instruction skip function is realized that executes or does not execute one instruction depending on the condition. can do.

〔Example〕

Figure 2 shows the flow of the program in the method (2) of the present invention. 5
This will be called a KIF command.

For example, if the condition is satisfied by determining the condition, processing A is performed.
, Process B, . . . are executed sequentially. If the conditions are not met, processing A is effectively skipped by NOP (invalidation), and the next processing B is sequentially executed.

FIG. 1 shows the configuration of an embodiment of the present invention, in which 1 is an instruction latch circuit, 2 is a selector, 5 is a decoder,
4 is a condition determination section, 5 is a NOP register, and 6 is a read-only memory (Rod).

Instructions from the ROM 6 are latched in the instruction latch circuit 1. Instruction codes are sequentially read out from the instruction code, inputted to the decoder 3 via the selector 2, the contents of the instruction are decoded, and the contents of the instruction C are sent from the decoder 5. : The corresponding control signal is output.

The instruction decoded by the decoder 5 and 2 now is 5KI.
If it is a P command, the condition determination unit 4 performs the condition determination specified by the 5xzp command. If the condition for NOP instruction for the next instruction 02 is satisfied as a result of the judgment, this -17
(Set in NOP register 5.
The OP register 5 generates an output to switch the selector 2. As a result, selector 2 becomes N
The OP code is read and input to the decoder 5, which decodes it and changes the next instruction to an MOP instruction.

As a result, the program read from the instruction output circuit 1 includes 5KIP instructions, process A, process B, and
Although it is processing C1..., the actual feeling is Nideko NZ-F
sd-v v JP h-x-AAta
, qyrp AA bn, xmB, processing C9
...and processing A is skipped.

Furthermore, according to the method of the present invention, there is a signal indicating whether or not to process the skip statement and execute the next instruction.If it indicates that the next instruction should not be executed, the next instruction is N
Since the instruction is changed to OP, an instruction is essentially skipped.

Since the NOP code is usually composed of a simple code such as all "1's" or all "0#", the selector 2 can be realized with a simple configuration.

〔Effect of the invention〕

As explained above (2) According to the method-2 of the present invention, the status (2) of the processing result etc. is determined based on the condition, and the process of converting the next instruction to NOP based on the result (2) is performed (; Therefore, according to the method of the present invention (2), it is easy to realize the function of an IF statement.
By using the IP instruction≦2, it is possible to effectively implement processes such as adding a debug function based on external terminal conditions.

[Brief explanation of drawings]

FIG. 1 shows an embodiment of the present invention. The second factor is a diagram showing the flow of the program. 1...Instruction latch circuit. 2...Selector, 6...decoder, 4...Condition judgment section/ 5... NOP register,

Claims (1)

[Claims] In a digital signal processing processor, a condition determination unit (4) performs a condition determination based on the status of a processing result, etc., and as a result of the condition determination, either when the condition is satisfied or when the condition is not satisfied. 1. An instruction function system in a digital signal processing processor, characterized in that an instruction is skipped by performing a process of changing the next instruction to a NOP instruction in a case where the next instruction is changed to a NOP instruction.