JPS61151689A - Memory writing control system - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a memory write control method, and particularly to a memory write control system configured to write RGB information, etc. for color display into a bitmap memory at high speed with a small number of accesses. This concerns the control method.

[Problems to be solved by conventional technology and invention] Conventionally,
A color CRT display device is equipped with a plurality of image data memories (hereinafter referred to as bitmap memories) each having bits corresponding to the dot positions displayed on the display, and these are stored in synchronization with the raster scan for CRT display. By reading out multiple focus map memories and converting them into parallel to serial, a signal with multiple bits per dot (in the simplest case, RGB signals per dot)
A desired color display is performed by outputting 3 bits of 3 bits) and displaying the intensity of the three primary colors R (red), G (green) and B (blue) on the display. Generally displayed RGB are each stored in one or more bitmap memories, and color display is performed on the display by developing image information such as desired figures and characters in the area in the bitmap memory. be able to. To quickly perform the color display, it is necessary to quickly write the desired color information into the bitmap memory.

As the writing method, for example, 1 as shown in the configuration shown in FIG.
A word consists of 16 bits, and three bitmap memories l-1, 1-2, 1-3 corresponding to RSG and B are prepared, and the color to be written (R, G or B) is prepared.
Select the focus map memory 1-1, 1-2 or 1-3 corresponding to the data bus (
There is one that writes image data existing on the DB).

A control register 3-1t as shown in FIG. Pig control register 3
-1, for example, by storing a predetermined value, such as a value consisting of "10", "01", and "00", in the 2-bit area (PSLO and PSL・1) from the LSB shown using the symbol . Bitmap memories 1-1.1-2.1-3 corresponding to R, G, and B are selected individually. Then, when writing from the CPU, the address (Address), R
The focus map memory 1-1.1-2.1 corresponding to the desired color is supplied by supplying AS, CAS, and image data to be written to the memory, and by supplying the WE multiplied signal only to the aforementioned selected bit map memory. Image data was being written to -3. As described above, in the configuration shown in FIG. 8, it is necessary to separately access each of the bitmap memories 1-1.1-2.1-3 corresponding to RGB and write desired image data, for example. The same image data is stored in each bitmap memory 1-1.1-
Even when writing to 2.1-3, there is a problem that writing must be done independently for each, making it difficult to write at high speed.

In another conventional example, three bitmap memories 1-1, 1-2 respectively corresponding to RGB are used as shown in FIG.
．． 1-3, and select the bitmap memory to be written depending on whether or not, for example, "1" is set in the control registers 3-2 (RE, GE, and BE) shown in FIG. 12(a). 1-1.1-2.1-3, and the selected bitmap memory 1-1.1
The same image data was written to -2 and l-3 at the same time. Specifically, the signals (RE, GE, and BE) set as shown in FIG.
Select one, two or three of the bitmap memories 1-1.1-2.1-3, and set "1" in the illustrated mask register 5 in Figure 12 (b). Image data corresponding to the bits was designated and written by the mask circuit 6 in FIG. FIG. 13 shows waveform diagrams when image data existing on the data bus (DB) is written into the bitmap memories 1-1.1-2.1-3 in FIG. 11, respectively. In the figure, CAS indicates bitmap memory 1-1.1-2.1-3 to which data is written.
It is supplied from the switching circuit 4 only to. Also, W
E (write signal) is supplied from the mask circuit 6 only to the bits existing on the data bus corresponding to the bits to which image data is to be written. In addition, when reading data from the bit map memory 1-1.1-2.1-3, the illustrated write cycle signal is notified to the switching circuit 4, and the bit map memory 1-1.1-2.1-3 is read out regardless of the contents of the control register 3-2. The image data in the map memory 1-1.1-2.1-3 are read out at the same time. CPU from the image data
The readout is shown in Figure 12 (a) using the diagram 2.
The value stored in bits (PSLO and PSLI) is 11.
This is done by selecting one of R, G, and B corresponding to 0'', 01, and 00''. As explained above, according to the configuration shown in FIG. 1, in the case of writing, the bit specified by the mask register 5 and the bit map memory 1-
Image data existing on the data bus can be written to one to three of 1.1-2.1-3 in one access. However, if you want to write data that is displayed in a different foreground color within a certain background color, for example, the focus map memories 1-1, 1-2, and
Since the data to be written to bitmap memories 1-1, 1-2, and 1-3 is different, it is necessary to write to each bitmap memory 1-1, l-2, and 1-3 separately, and it is necessary to repeat a large number of accesses. The problem was that it was difficult.

[Means for solving problems]

In the present invention, the cause of the above problem is that the data on the data bus is used as write data, and when expressing various colors, the write data for each bitmap memory is different, so the write data is different for each bitmap memory. In order to solve the above problem, we focused on the fact that it was necessary to transfer the written data, and in order to solve the above problem, we developed a bitmap memory for writing image data when writing image data to the bitmap memory for color display. In addition to the control register that specifies the image data, a color register that specifies the background color and foreground color to be written is provided, so that image data can be written to a desired bitmap memory at high speed with a small number of accesses. Therefore, in the memory write control method of the present invention, in a memory write control method configured to write color image data into a memory, read out the written data, and display it on a display, N sets of memories into which the color image data is written are provided. And that N! a control register for setting at least whether or not a background color is to be written into any of the memories of the J.ffl; a background color specifying means for specifying a background color to be written to the memory set by the J control register; a foreground color specifying means for specifying a foreground color to be written to the memory, and when the control register is set to write a background color, the background color specified by the background color specifying means is written to the set memory. Later, when the foreground color specified by the foreground color specifying means is written in the N sets of memories in a form that corresponds to the display data, and the background color is set not to be written to the control register, the foreground color specified by the foreground color specifying means is The present invention is characterized in that the foreground color is written in the N sets of memories in a form that corresponds to the display data.

〔Example〕

Embodiments of the present invention will be described in detail below with reference to the drawings.

Fig. 1 is a configuration diagram of one embodiment of the present invention, Fig. 2 is an explanatory diagram explaining the operation of the configuration shown in Fig. 1 in which a foreground pattern is drawn on a background color, and Fig. 3 is an explanatory diagram explaining the operation of the configuration shown in Fig. 1. An explanatory diagram for explaining the operation of the configuration shown in FIG. 1 when a display pattern is written on the background, FIG. 4 is a specific example of the configuration of one embodiment of the present invention shown in FIG. 1, and FIG. Specific examples of control registers and color registers in one embodiment of the present invention, No. 6
7 and 7 show waveform diagrams for explaining the operation of the specific example shown in FIG. 4.

In the figure, l is bitmap memory, 1-1.1-2, ■-
3 is a bi-notomasop memory corresponding to RGB, 4 is a switching circuit, 6.6-1.6-2 is a control register, 7.7-1.7-2 is a color register, 8-1.
8-2 is data on the data bus, 9 is a control unit, 10-1
to lo-4, 11 represent selectors.

In FIG. 1, the bitmap memory 1 in the figure is, for example, R
Each bitmap memory corresponding to GB 1-1.1-
2.1-3, each word is composed of, for example, 16 bits, and by parallel-serial conversion,
Each pixel is expanded into 3 bits of RGB and displayed. One of the bitmap memories 1-1, 1-2, l-3,
Whether to write the background color for two or three,
As will be described later, it is determined by whether or not "1" is set in the area indicated by the symbol (■) in the control register 6, and which bitmap memory 1-1.1-2.1-3
The choice of whether or not to write to is determined by whether or not 11" is set in the area shown using
Whether or not RGB) is written is determined by the value set in the area indicated by the symbol ``■'' in the color register graph. Also, the foreground color to be written is shown in the color register 7.
It is determined by the value set in the area shown using . The control unit 9 writes to the bitmap memory 1-1.1-2.1-3 based on the control register 6, the color register database, and the signals on the data bus, or reads and displays the data to the CPU based on the readout selection of the control register 6. This is to perform read control for. A detailed explanation will be given below.

First, the roles of the control register 6 and color register 7 in FIG. 1 will be explained using FIG. 5.

FIG. 5(a) shows control bits stored in the control register 6. In the figure, RE, GE and BE are used to designate bitmap memories 1-1, 1-2 and 1-3 to be written. ■ BACKE in the figure is the bitma specified by ■ in the figure.

This is the focus for determining whether or not to write the background color to the screen memory. In addition, ■PSLO and PSLI in the diagram are CPU
One bitma to read image data from.

Bits for specifying memory 1-1.1-2.1-3, such as "10", "01" and "100"
are bitmap memory 1 corresponding to RSG and B, respectively.
-1.1-2.1-3.

FIG. 5(b) shows the control bits stored in the color register. ■BGR, BGG, and BGB in the figure are bits that specify the background color to write, and ■FGR5FGG in the figure
and FGB are bits that specify the foreground color to be written.

By using the illustrated control bits in FIGS. 5(a) and 5(b) explained above, a single access from the CPU allows, for example, red (R) on a background color of green (G) as shown in FIG. ) can be used to write the foreground pattern. Similarly, a yellow display pattern can be written on an already displayed display pattern as shown in FIG. 3 by one access. The details will be explained below.

Set "l" in the areas indicated by ■ and ■ in the control register 6-1 in FIG.
-3), and the area indicated by [Phase] in the color register 7-1 is set to "010" (green is set as the background color), and the area indicated by 0 is set to "100" (red is the foreground color). ). As a result, when the bitmap memory is written while outputting the display pattern to be written to the data bus 8-1, the G (green) bitmap is written according to the contents of [phase], as shown in the second round country step l. "I" is written to all bits of one word indicated by the address in memory 1-2, and the same address in R (red) and B (blue) vias is written to the bits of the same address in map memories 1-1 and 1-3. ''' for all bits of one word
0” is written.

Next, as shown in step 2 in FIG. 2, the foreground color ("100", red) stored in the color register 7-1 (■) is masked by the data bus 8-1, so to speak, and is stored in the bitmap memory. 1-1.1-2.1-3 respectively, the writing is performed in step 2, for example, corresponding to the 11° bit indicated by @ in the data bus 8-1.
It is written in the form of "1" in the area indicated using @ in the bitmap memory 1-1 corresponding to R in the figure, and corresponds to other colors (G and B) indicated using ■ and @ in the figure. The bitmap memory 1-2.1-3 is written in the form of 0". As a result, a red display pattern is written in a green background. Steps l and Step 2 is to map the same addresses to bitmap memories l-1, 1-2, l
After writing the green background color, a predetermined write signal is supplied to the bitmap memories 1-1, 1-2 and l-3 to write the red foreground color. Therefore, the background color and foreground color can be written with fewer accesses. In particular, as described later, bitmap memory 1-1.1-
2. In the case of configuring 1-3, by using the so-called page mode, it becomes possible to write the background color and foreground color with one access from the CPU, and it is possible to write extremely quickly and efficiently. Become.

Next, to describe the case where a yellow display pattern is to be overwritten on the already displayed pattern, "0" is set in the area indicated by @ in the control register 6-2 in FIG. "111" in the bitmap memory 1-1.1 (without writing the background color and only the foreground color)
-2.Write to 1-3) and color register 7-
By setting "110" in the figure 2 (by setting yellow, which is a combination of red and green, as the foreground color and performing a write cycle while giving a display pattern to the data bus 8-2, In step 1, the background color is not written, and the previously written display color remains as is.Next, as shown in step 2 in Fig. 3, according to the illustration ① in the color register 4 taboo 2, the data bus 8-2 is The foreground pattern is changed to R (red) and G (
To be more specific, "0" is written in the bitmap memory 1-1.1-2 corresponding to the B (blue) bitmap memory 1-1.1-2 corresponding to the B (blue) bitmap memory 1-2 corresponding to the written area , R so that the foreground color specified by the [phase] in the color register 7-2 becomes "11O" (yellow), corresponding to "1" indicated by the symbol ■ in the data bus 8-2. and bitmap memory 1- corresponding to G
1. In the area indicated using @ and @ in 1-2, “1”
” and write “0” in the area shown using [phase] in the bitmap memory 1-3 corresponding to the other color (B). As a result, yellow (R and G are added) According to the conventional configuration shown in FIG. 8, the image data corresponding to R and G are read out from the bitmap memory 1-11-2, respectively, and the display pattern is After performing the OR operation, it is necessary to write each bit again, and the bitmap memory 1-
After performing an AND operation on the image data read from No. 3 and the inverted display pattern, it was necessary to write it again, so a total of six memory accesses were required. The present invention does not require such operations and multiple accesses.

FIG. 4 shows a specific example of the configuration shown in FIG. 1.

In the figure, bitmap memory l stores image data corresponding to R%G and B, i-i, 1-
It consists of 2.1-3.

In the figure, @RE, GE, and BH are shown in FIG. 5 (a). RE, G [! and BE, respectively. This is a signal for selecting the bitmap memories 1-1, 1-2 and -3 (corresponding to RGB, respectively) for writing.

In the figure, [phase] DBO to DB15 are each connected to a data bus, and are used to determine which bit is to be written with the foreground color, etc.

In the figure, ■BGSEL is a signal for switching between the background color and the foreground color.

In the figure, @BACKE is supplied with a signal from ①BACKE in the control register 6 shown in FIG. 5(A). This is a signal for selecting whether or not to write the background color.

0BGR, FGR, BGG, FGG, BG in the diagram
For B and FGB, the color register 7 shown in FIG.
Signals are respectively supplied from corresponding ones inside. This is for specifying the background color and foreground color to be written to bitmap memory 1-1.1-2.1-3.
GR, BGG, BGB are the background colors (RGB),
FGR, FGG 5FGB is the foreground color (RG B)
corresponds to

Selector 1 selects the signals such as [phase] or 0 in the diagram explained above.
0-1 to 10-4.11, etc., and a predetermined write signal to the bitmap memories 1-1.1-2.1-3, for example, as shown in FIGS. 2 and 3. Writing is performed.

At this time, when @BACKF shown in FIG. 4 is "1" (when writing the background color and foreground color), the waveform shown in FIG. 6 is used, for example, as explained using FIG.
The background color (BG in the figure) of the word specified by the address in the bitmap memory 1-1.1-2.1-3 specified by the symbol ■ in the graphical control register 6 in FIG. The WE multiplied signal is output for all bits, and the value specified by the symbol (■) in the color register 7 shown in FIG. The data is written to the focus map memories 1-1.1-2.1-3 (ie, RGB memories), respectively. Next, the data DB on the data bus
= 1 bit only for the memory corresponding to the second W
The foreground color (FG in the figure) that is output as an E signal is the data shown using the symbol ■ in the color register shown in Figure 5 (b) in the same word of the bitmap memory 1-1.1-2.1-3. 47) Written only to the memory that received the WE double signal. , : Writing of a series of background colors and foreground colors is performed during one access from the CPU in page mode.

In addition, when @BACKE shown in FIG. 4 is "0" (when only the foreground color is written), the waveform shown in FIG. By outputting only the second WE multiplication signal to the memory corresponding to the DB=1 bit on the bus, the previously written background color (in the figure) is Only the foreground color (FC in the figure) is written on the BG).

〔Effect of the invention〕

As explained above, according to the present invention, when writing image data for color display to a bitmap memory, in addition to the control register for selecting the bitmap memory to which the image data is written, the bitmap memory Since a color register and the like for specifying the foreground and background colors to be written are provided, image data can be written to a desired bitmap memory with a small number of accesses. Also, a control bit (for example, BAC in control register 6) that enables/disables writing of the foreground color is used.
KE), the previously written display can be used as the background color, and any display pattern can be quickly overwritten on the foreground color.

[Brief explanation of the drawing]

Figure 1 is a configuration diagram of one embodiment of the present invention, Figure 2 is an explanatory diagram illustrating the operation of the configuration shown in Figure 1 when a foreground pattern is drawn on a background color, and Figure 3 is a background drawn in advance. An explanatory diagram for explaining the operation of the configuration shown in FIG. 1 when a display pattern is written on the screen, FIG. 4 is a specific example of the configuration of one embodiment of the present invention shown in FIG. 1, and FIG. Specific examples of control registers and color registers in the configuration of one embodiment of the invention, No. 6
7 and 7 are waveform diagrams explaining the operation of the specific example shown in FIG. 4, FIGS. 8 and 11 are configuration diagrams of a conventional memory write control system, and FIGS. 9 and 10 are waveform diagrams that are shown in FIG. FIGS. 12 and 13 are explanatory diagrams for explaining the operation of the configuration shown in FIG. 1. FIGS. In the figure, 1 is bitmap memory, ■-1, 1-2, 1-
3 is a bitmap memory corresponding to RGB, 4 is a switching circuit, 6.6-1.6-2 is a control register, 7.7-1.7-2 is a color register, 8.8-L
8-2 represents the contents of the data bus, 9 represents a control section, and 10-1 to 10-4.11 represent selectors. Patent applicant: Usatsuk Electronic Industry Co., Ltd. Representative Patent Attorney Hiroshi Mori (2 others) 1'-1 Shi

Claims (1)

[Claims] In a memory write control method configured to write color image data in a memory, read out the written data, and display it on a display, there are N sets of memories into which the color image data is written, and any one of the N sets of memories. a control register for at least setting whether or not to write a background color to an object, a background color specifying means for specifying a background color to be written to the memory set by the control register, and a foreground color to be written to the memory. foreground color designation means, when the background color is set to be written in the control register, the background color designated by the background color designation means is written to the set memory and then designated by the foreground color designation means. The foreground color specified by the foreground color specifying means is written in the N sets of memories in a form that corresponds to the display data, and when the control register is set not to write the background color, the foreground color specified by the foreground color specifying means corresponds to the display data. A memory write control method characterized in that the memory write control method is configured to write to the N sets of memories in a manner that