JPS6113310U - Recording bias switching circuit - Google Patents
Recording bias switching circuitInfo
- Publication number
- JPS6113310U JPS6113310U JP9215184U JP9215184U JPS6113310U JP S6113310 U JPS6113310 U JP S6113310U JP 9215184 U JP9215184 U JP 9215184U JP 9215184 U JP9215184 U JP 9215184U JP S6113310 U JPS6113310 U JP S6113310U
- Authority
- JP
- Japan
- Prior art keywords
- zener diode
- voltage
- transistor
- switching circuit
- recording bias
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Inductance-Capacitance Distribution Constants And Capacitance-Resistance Oscillators (AREA)
- Logic Circuits (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
− 第１図および第２図は従来および本考案実施例を示
す回路図である。
１・・・バイアス発振回路、４・・・電圧制御用トラン
ジスタ ５， １＠＠ツエナーダイオード、９・・・
スイツチングトランジ、スタ。- FIG. 1 and FIG. 2 are circuit diagrams showing a conventional circuit and an embodiment of the present invention. 1... Bias oscillation circuit, 4... Voltage control transistor 5, 1 @ @ Zener diode, 9...
Switching transition, star.
Claims (1)
圧制御用トランジスタと、この電圧制御用トランジスタ
の制御電極に接続された第１および第２のツエナーダイ
オードと、第２のツエナーダイオードに接続されたスイ
ッチングトランジスタとを含み、上記スイッチングトラ
ンジスタの制御電極にハイレベル信号が加えられた時こ
のスイッチングトランジスタと共に第２のツエナーダイ
オードを動作させて、上記電圧制御用トランジスタに第
２のツエナーダイオード−により決定される電圧を出力
させ、上記スイッチングトランジスタの制御電極にロー
レベル信，号が加えられた時は上記第１のツエナーダイ
オードを動作させて上記電圧制御用トランジスタに第１
のツエナーダイオードにより決定される電圧を出力させ
るように構成したことを特徴とする録音バイアス切換回
路。 ２ 上記第１のツエナーダイオードのツエナー電圧を第
２のツエナーダイオードのそれよりも大に選んだことを
特徴とする実用新案登録請求の範囲第１項記載の録音バ
イアス切換回路。[Claims for Utility Model Registration] 1. A voltage control transistor connected to the power supply voltage supply side of the bias oscillation circuit, first and second Zener diodes connected to the control electrode of the voltage control transistor, and a a switching transistor connected to the second Zener diode, and when a high level signal is applied to the control electrode of the switching transistor, the second Zener diode is operated together with the switching transistor, and the second Zener diode is connected to the voltage control transistor. When a low level signal is applied to the control electrode of the switching transistor, the first Zener diode is operated to output the voltage determined by the voltage control transistor.
A recording bias switching circuit characterized in that it is configured to output a voltage determined by a Zener diode. 2. The recording bias switching circuit according to claim 1, wherein the Zener voltage of the first Zener diode is selected to be higher than that of the second Zener diode.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9215184U JPS6113310U (en) | 1984-06-20 | 1984-06-20 | Recording bias switching circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9215184U JPS6113310U (en) | 1984-06-20 | 1984-06-20 | Recording bias switching circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6113310U true JPS6113310U (en) | 1986-01-25 |
Family
ID=30648687
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9215184U Pending JPS6113310U (en) | 1984-06-20 | 1984-06-20 | Recording bias switching circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6113310U (en) |
-
1984
- 1984-06-20 JP JP9215184U patent/JPS6113310U/en active Pending
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