JPS6087408A - Video tape recorder - Google Patents

Abstract

PURPOSE:To obtain a miniature VTR which can record NTSC signals as well and is also provided with a function for reproduction by recording the standard video signal after converting it into a prescribed record signal and then compressing it to a prescribed ratio and expanding the signal sent from a head to convert it into the standard video signal after expanding it to the original signal. CONSTITUTION:The preceding 1st rotary head 2a is selected by the 1st changeover switch 24 during a high level period of a head switching signal (d). Thus a recording mode is set for a compression signal. In this case, the 1st clock signal f1 is supplied to a write control terminal 18a of the 1st memory element 18 from a 1/6-divider 15c during a high level period of a head switching signal (f). Then video signals (e) equivalent to the 1-field component I are written. In the next field period, the 2nd clock signal f2 given from a 1/6-divider 15b is applied to a read control terminal 18b of the element 18 by the 2nd gate signal (g) which has a rise with a delay of time t1 by an amount equivalent to time t2. Then the record signal of the preceding field I is compressed to a prescribed ratio and read out of the element 18.

Description

[Detailed description of the invention] b) Industrial application field The present invention relates to a video tape recorder (VTR).

Conventional technology VTRs, especially (jubotaple vTRc), miniaturization has become an important issue, and various proposals have been made. Among them, one that has recently been put into practical use is Japanese Patent Application Laid-Open No. 52-39687. There is a ζ2 tangent technique as shown in the publication No. ζ2.

This allows the diameter of the cylinder equipped with the rotating head to be reduced without changing the recording pattern determined by the standard, which is 7 minutes smaller than that of the camera-integrated type.4 4.67
1 ml': In order to record the azimuth (different azimuth angles, 15H () (horizontal scanning period), that is, a double azimuth head with two gaps 667 stones apart).

The tape is approximately ! for this cylinder! 100° winding,
It is assumed that the rotating head rotates once every 1760 seconds. By setting C2 in this way, the track length and inclination angle of the track to be recorded can be made to match the standard of the β system.

However, since the cylinder has 576 windings around its circumference and rotates once every 1/AO second (2) it is not possible to record normal NTSO signals, so the image pickup tube is used as a type of memory; A video signal of field (1760 seconds) 315H is created, and the total recording track portion is 7% (; 262
．． It was designed to record 5H minutes (: thus matching the standard of the β system. For this reason, it was commercialized as a camera-integrated VTR.

However, this integrated VTR was only for recording and did not have a playback function (for playback, a separate β system VTR was required. Also, as mentioned above, normal NTSO signals cannot be recorded, The downside is that you can only take pictures with the camera.

(c) An object of the invention is to provide a VTR whose cylinder diameter is smaller than that specified by the standard, but whose recorded pattern conforms to the standard.

2) Structure of the Invention In the present invention, a standard video signal is converted into a predetermined recording signal C2 and then compressed to a predetermined ratio and recorded. During playback, the signal C2 is expanded to form the original signal (: The signal is returned to the standard video signal (converted into two. The signal is compressed and expanded in the first and second storage elements. In particular, when compressing, write with the first clock signal and read with the second clock signal, and when decompressing, do the reverse. The frequency ratio corresponds to the compression/expansion ratio.The readout control of the first and second storage elements is based on the rotational phase signal (2) of the rotary head and the head switching signal based on the rotational phase signal (2) of the rotary head. The period during which the magnetic tape is in contact with the magnetic tape is controlled by first and second gate signals, respectively, and the first and second clock signals C;

(E) Example Hereinafter, an example of the present invention will be described mainly with reference to the drawings. FIG. 1 is a plan view of the vicinity of the cylinder, and FIG. 2 is a front view of the double azimuth head.

In this example, the mechanism is the same as that commercialized as β movie, and the diameter is 44°2&) (21
1) is provided. The guide cylinder (IIC), which is a rotating cylinder, has a magnetic tape (31) wrapped around it by over 600 degrees by a leading means (4), and the tape is caused to travel at a predetermined speed by a driving means (not shown). Therefore, the angle α is a little less than 60 degrees.

The rotating cylinder is rotated by a head motor (not shown) so that it rotates once per field period (760 seconds). Also, during recording, the rotational phase of the rotating cylinder must be synchronized with the vertical synchronization signal of standard video No. 11 (for example, NTS (3 signals)) to be recorded, and during playback, a tracking method using a capstan servo should be adopted. The rotary head rotates in synchronization with the reference signal phase (-), and tape running is controlled so that the playback control signal and the reference signal are synchronized.These are the same as in a normal VTR.

(5) is a rotating cylinder (1)! - A fixed magnet forming part of the rotational phase detection means of the rotary head. The magnet (5) and the double azimuth head (2) are separated by an angle β, and the rotational phase detection signal from the pickup (not shown) is separated by the angle β from the double azimuth head (2).
The phase is ahead by the same amount. Also, in the double azimuth head f21, the first to 7F (2a) or the second head (
2b) comes into contact with the magnetic tape in a manner that is earlier than 2b).

FIG. 3 briefly explains recording and reproduction in the VTRC of the present invention. False) is a standard video signal to be recorded, and is divided into two fields.

The middle 1 represents a recording signal compressed in units of one field. In this way 1: By compressing (2), it becomes possible to record one field worth of video signal in a period of 1!60 seconds.The compressed and recorded signal can be recorded using the same type of cylinder and head. If you expand the reproduced signal for each field and convert it to A continuous video signal power 1 is obtained.

FIG. 4 is a concrete circuit block diagram, and FIG. 5 is a waveform diagram of the main part of the circuit. Figure: 2, (6) # is the terminal where the NTSO signal is input, (7) is the rotational position km detection signal σ),
(81 is the input terminal for the playback control signal, (9) is the output terminal for the final playback video signal.
Qll is a compression/expansion circuit equipped with a memory element that compresses and expands signals, and ri is a reproducing circuit (2!1) (2
b) @1, the second rotary head; ri, the compression/expansion 1 control circuit; Q41, the flip-flop which is a head switching signal generation means; ri, the two clock signal generation means; (161
+17), the first and second rotating heads each have a magnetic tape (
3) Hail the period in contact with 1st. This is means for generating the second gate signal.

The recording circuit is a luminance and color separation circuit (10a) (101)
), AGO circuit (100), clamp clip circuit (1
0(t), FM modulation circuit ('toe), AOO circuit (1
0f), frequency conversion circuit (10g), mixing circuit (10h
) etc., a recording signal determined by the β method can be obtained from the mixing circuit.

The compression/expansion circuit is the first. Second memory element (2), IJ
l, Second recording/playback selection (R/P) switch □□□C!
Provide υ. The two memory elements are OOD memory, A-D,
D-A conversion sound: Digital memory, etc. is used, and write control terminals (18a) (19a), read control terminals (1
B'b) (19b) and a clock signal i to these;
Write and read operations are controlled by this. For each memory element, the input is the common terminal of the first R/P switch, and the output is $
The two common terminals C of the 2R/P switch circles are connected. The R side terminal of the first R/P switch (a) is connected to the mixing circuit (10h) of the recording circuit, and the P side terminal is connected to the output of the playback amplifier 12 (10h).
: connected, the R side terminal of the second R/P switch C11) is connected to the input side of the recording amplifier, and the P side terminal is connected to the playback circuit t.
i'A (: connected.

The output of the recording amplifier (c) is controlled by the first head selector switch (2).
4 common terminals (two connected, the common terminal of each of the two switching terminals is '1fJ1, the second rotating head (2&) (2
b) (:, 6th and 4th R/P switches connected c!■
The remaining switching terminals of the 6th and 4th R/P switches (251) are connected to the 2nd head switching terminals (271 and 2). A common terminal of the mode selector switch Qη is connected to the reproduction amplifier 126.

The regeneration circuit is Y, 0 separation circuit (12 &) (121)),
FM demodulation circuit (12c), frequency conversion circuit (12a),
It includes a mixing circuit (12e) and the like, and the final reproduced video signal is supplied to the output terminal (9).

A flip-flop fi is a means of generating a head switching signal.
40 is supplied with a rotational phase detection signal (the same applies below in the $5 figure (&)), as well as a playback control signal from the input terminal (8) (mono multi (28 output 1/l) which is trigged from Kllm). Based on the reset pulse generation circuit (to) output 1ml is applied as a reset pulse.Flip-flop (141 output head switching signal +1i
1 is left as it is, or is inverted using inverter (7) C2, and the compression/expansion control circuit and the inverter output are as follows.
First and second gate signal generating means α61(17)l=specific output.

The means for generating the clock signal consists of a high frequency (memory element 5: related) oscillator (15B), a % frequency divider (15b) and a frequency divider (15o). The output of the oscillator (15a) is divided by % by the frequency divider (15c) to generate a first clock signal (fl).

Similarly, the % frequency divider output becomes the second clock signal (f2). Therefore, the frequency ratio between the first clock signal and the second clock signal is %, and the second clock signal has a higher frequency. The frequency ratio % corresponds to a signal compression ratio of 1.2 determined by the winding angle C2 of the magnetic tape with respect to the cylinder I.

The first and second gate signals (1 bagg) are output from the first and second gate signal generation means (161 (17). The first and second gate signals [11 (g) are head switching signals 1 ( 11,
Therefore, the rotational phase detection signal (al) is generated based on the first gate signal (1), which approximately corresponds to the contact period of the first rotary head (21L) with the magnetic tape. It rises with a delay of time (t3) from the rise,
This signal is at a high level for a time (tl). The time (tg) is the time corresponding to the angle β at . Further, the time (t5) corresponds to %ζ2 of one frame F period. The second gate signal (gl is the second rotating head (
The head switching signal (di) rises after a time (tl) delay from the fall of the head switching signal (di).The high level period is the first gate signal at time (tl). The time (tl) is the same as that of the second rotating head (2
b) lags behind the first rotary head (2a) by 1.51 seconds, so it is longer than the time (t6) by that amount.

Such a first JB2 gate signal [111g+ is a mono-multi two-stage connection circuit whose metastable period is time (t g) and time (tl) in which the head switching signal or its inverted signal is input, or a monomulti two-stage connection circuit whose metastable period is time This can be easily realized using two-stage connected n-way monomultis of (tl) and (tl).

The compression/expansion control circuit 03 includes the first to fourth analog games).
(1Ss,) to (15a), the fifth to eighth R/P switches r3D-figure are arranged and the head switching signal 111
3 and its inverted signal, first and second clock signals (fl)
(f2), the first jg2 gate signal 111 (gl is supplied, and the write control signal and read control signal of the first storage element fil, and the write control signal and read control signal of the !2 storage element ti9 are output. .These control signals are the fifth
, 7th. IS6, 8th R/P switch C311 (to) C
It is output from the common terminal of 33C3m and connected to each control terminal (18
a) (18b) (19a) (19b)c is applied.

(13a) has a head switching signal (f)
The first clock signal (ft) from the frequency divider (15o)
is applied, and the first clock signal (fl) is applied to the R side terminal of the fifth R/P switch (C31) and the P side terminal of the seventh R/P switch (during the high level period of the second head switching signal 1fl). 2nd game) (15b)
The inverted head switching signal 1h) and the % frequency divider (1h) are used.
When the first clock signal (fl) of 50) is applied,
During the high level period of the inverted signal (h), the first black signal (fl) is supplied to the R-side terminal of the sixth R/P switch and the P-side terminal of the eighth R/P switch (three superiors).

Similarly, C2 and third AND gates (130) (- are input with the first gate signal (1) and second clock signal (f2),
M5R/P switch C311 P side terminal and '@7R/P
A second clock signal (f2) is supplied to the R side terminal of the switch □□□ during the high level period of the first gate signal (gl).

The fourth gate signal (115(1)) is the second gate signal (6
) and the second clock signal (f2), the sixth R/P switch C3
The P side terminal of the side and the R side terminal of the 8th R/P switch G1 (
=Apply the second clock signal (f2).

1st to 8th R7p suiychiclJQIH25) @
C11) to C34) are switches for changing the operation mode ζ2 of the VTR, and for all switches ζ2, the R side is selected during recording, and the P side is selected during playback. Also, il,
The second head changeover switch C2 is controlled by the head changeover signal, and when the head changeover signal (a) is at a high level, the first rotary head (2a) is selected, and when the head changeover signal (a) is at a low level, the second rotary head (2a) is selected. 2b) is selected and the signal is recorded and reproduced.

Next, the operation will be explained. At the time of recording, the NTE30 standard video signal is applied to the terminal (60:, the rotational phase detection signal (-) of the rotary cylinder (1) (and ' is the rotary head) is applied to the terminal (70; standard video signal (
e) Vertical synchronization signal (Since it is controlled to rotate in synchronization with the candle, the rotation phase detection signal (ILI and vertical synchronization signal 1t
'l is a predetermined phase relationship (: exists. The phase of the vertical synchronization signal satisfies the standard of the β method.
±2H) rises and falls (-).

The compression/expansion control circuit (13c is supplied with a head switching signal (signal (same as fl) (same as +11), its inverted signal (hl), and first and second gate signals (il(g)) At the time of recording, I: is the s1 storage element (write control terminal (18 &) l:: first controller) (15 &
) Output is the readout control terminal (1ab)c third antagonist)
(150) The output is the write control terminal (191!L) of the second storage element ri, and the output of the second AND gate (1Sb) is the read control terminal (19t) !111) Output is applied. Recording circuit (
The recording signal from No. 11 is input to each storage element via the first R/P switch (a).

Each memory element is controlled so that it is in a write state and a read state in one field period.And one memory element is controlled so that it is in a write operation (Y), and the other memory element is in a read operation (2). A continuous C2 (compression operation is performed. The compression operation is performed by reading out a signal written at a low I/) frequency (fl) at a high frequency (fl).

That is, in the head switching signal (+11?) 1A, level period C:, the first rotary head (2&) preceding the first head switching switch f241C is selected, and the recording state of the compression signal (:Abe... The switching is performed during the non-contact period between the head and the tape.At this time, the write control terminal (18&)C of the first storage element aυ is applied only during the high level period of the head switching signal (f). The first clock signal (fl) from the frequency divider (15G) is supplied, and the video signal 1
In the next field period (:), the second gate signal (gLC) rises with a delay of time (tl). (151)) from the second clock signal (f
l) is the readout control terminal (181) of the first storage element α seconds)
l: is added, and the recorded signal of the previous field (summer) is compressed to a predetermined ratio and read out from the first storage element Qe.

When the head switching signal ((11) is at low level, the first head switching switch (incorporated) switches the second rotary head (2b head (21) during recording to the write control terminal (19@) of the second storage element α). The first clock signal (fl) of the high-level period % frequency divider (150) of the inverted signal (h) is applied to the field (■), and the recording signal for the field (■) is stored.

The next head switching signal (al is at high level (-).

The first rotation head F (28,) is connected to the recording amplifier C23, and the second storage element fi is connected to the first gate signal (1) at 71
The second clock signal (f2) of the level period % frequency divider (151) (2) becomes a read operation, and the compressed recording signal is transferred to the first rotary head (21!L) (:Yoshi magnetic tape (
: Recorded. When the F1 rotary head (21L) is recording, the field (I) is written in the first storage element, and the above cycle is repeated thereafter.

During playback (second, all R/P switches are switched to the P side (I), writing to each storage element with the second clock signal and reading with the first clock signal performs the opposite operation to that during recording, that is, signal expansion. It will be done.

The rotational phase detection signal 1jl is one rotation (only one out of two is detected, so the rotational head cannot be specified up to this ridge. Therefore, the reproduction control signal IKI (which has a specific relationship with the recording track and therefore with one of the rotational heads) By triggering the monomulti (281) and resetting the flip-flop (141) with a reset pulse (m) based on the monomultiple output (1) (2), the relationship between the playback control signal (Kl and head switching signal 1nl) is determined. It is specified.

Even during playback, the first and second rotating heads (2a) (2
111) is in contact with the magnetic tape during the first and second periods.
Since the gate signal is 1% 1lol, the reproduction signal from the rotary head is written to each memory element in the first and second whistles.
This is done by applying a second clock signal from the gate signal ['ll[Oroni]. The readout is controlled by the head switching signal 11)1 and its inverted signal 1rl.
This is done by supplying a clock signal. These changes are made using the 5th to 8th R/P switches (31) -C3
4) Performed by C. Each entry + F! Input to Yuko,
Output switching is performed by the first to fourth R/P switches (c) (3), and during playback, the playback signal from the single-turn head is sent to the storage element via the playback amplifier. The signal is expanded in units of one field and supplied as a continuous signal to the playback circuit (1). Nita TV (2 supplied.

In the above embodiment, the video signal is written to a storage element C having a capacity for one field without an overlap period.
I was reading data, but using a storage element with a slightly larger capacity,
Including the overlap in the writing range, the wrapping angle is also 600.
It is also possible to record in the overlap period by making the width slightly larger than 0 and making the width of the first and second gate signals wider.Also, the recording circuit and reproducing circuit I:
The circuit for VTR can be used as is.

(Effects of -4-9R) As described above, according to the present invention, a standard video signal can be compressed and recorded using a storage element, expanded and played back, and a compact VTR capable of recording and playback can be provided. be.

[Brief explanation of the drawing]

Fig. 1 is a plan view of the vicinity of the guide cylinder, Fig. 2 is a front view of the double azimuth head, Fig. 3 is a detailed explanation of the present invention, and Fig. 4 is a circuit block of one embodiment of the present invention. In the figure, the fifth factor is a waveform diagram of the main part of FIG. Explanation of the king number 1 (1)...Guide cylinder, C2 &) (2b)...
1st and 2nd rotating heads, Su...recording circuit, Su...compression/expansion circuit, 0υ(II...first and second storage elements, Su...playback circuit, ■...head switching Signal generation means 1.
Su...first and second clock signal generation means, tt61
(17)...first and second gate signal generating means,
...Compression/expansion control circuit.

Claims (1)

[Claims] (1) a guide cylinder comprising first and second rotary heads disposed close to each other; means for rotating the rotary heads in one field cycle; a recording circuit for converting a standard video signal into a predetermined recording signal; and a compression/expansion circuit comprising first and second storage elements for compressing the recording signal and expanding the reproduced signal from the rotary head. , a reproduction circuit that converts the signal from the compression/expansion circuit into a standard video signal (-), and a rotational phase detection means of 7F for the rotation,
first and second clock signals having a frequency ratio relationship determined by the rotational phase detection means (: means for creating switching signals for the first and second rotary heads based on the rotational phase detection means; and the winding angle narrowing 1 of the tape; means for generating first and second gate signals for determining periods during which the first and second rotary heads are in contact with the magnetic tape, respectively, based on the output C of the rotational phase detection means; the switching signal and the first and second
a compression/expansion control circuit that controls writing and reading operations of the first and second storage elements based on the clock signal of C, the gate signals of the first and $2, and C2; The signal and the first clock signal (2) are input into the first and second storage elements alternately, and the first and second gate signals and the second clock signal (2) are input into the first and second storage elements alternately. While one memory element is in a write operation (; reading from the other memory element in an alternating manner; compressing the ratio corresponding to the frequency ratio by the rotating spatula;
and a reproduction port inputs the reproduction signal from the rotary head to the first and second gate signals and the second clock signal (
:Writing to the first and second storage elements alternately based on the switching signal and the first clock signal. A video tape recorder characterized in that the video tape recorder is read out (expanded to a ratio of the compression ratio (2 to 2) and supplied to the playback circuit (;