JPS6066132U - AD conversion circuit - Google Patents

AD conversion circuit

Info

Publication number
JPS6066132U
JPS6066132U JP15877083U JP15877083U JPS6066132U JP S6066132 U JPS6066132 U JP S6066132U JP 15877083 U JP15877083 U JP 15877083U JP 15877083 U JP15877083 U JP 15877083U JP S6066132 U JPS6066132 U JP S6066132U
Authority
JP
Japan
Prior art keywords
conversion circuit
converter
integrator
timing signal
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15877083U
Other languages
Japanese (ja)
Inventor
嵩 安藤
Original Assignee
三洋電機株式会社
東京三洋電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 三洋電機株式会社, 東京三洋電機株式会社 filed Critical 三洋電機株式会社
Priority to JP15877083U priority Critical patent/JPS6066132U/en
Publication of JPS6066132U publication Critical patent/JPS6066132U/en
Pending legal-status Critical Current

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  • Analogue/Digital Conversion (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Abstract] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図及び第２図は従来のＡＤ変換回路を説明するため
の波形図、第３図は本考案によるＡＤ変換回路の実施例
を示すブロック図、第４図は本実施例のタイミングチャ
ートである。 主な図番の説明、１・・・発振器、ｌ・・・タイミング
信号発生回路、土・・・積分器、７，８・・・トランス
ミッションゲート、９・・・ＡＤ　変換器。1 and 2 are waveform diagrams for explaining a conventional AD conversion circuit, FIG. 3 is a block diagram showing an embodiment of the AD conversion circuit according to the present invention, and FIG. 4 is a timing chart of the present embodiment. be. Explanation of main figure numbers: 1...Oscillator, 1...Timing signal generation circuit, 7, 8...Transmission gate, 9...AD converter.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] ＡＤ変換器の前段に、変換すべきアナログ信号を入力す
る積分器を設けると共に、前記ＡＤ変換器の変換周期を
定める第１のタイミング信号に同期した第２のタイミン
グ信号を前記積分器に印加し、前記積分器で前記第２の
タイミング信号により定まる所定期間前記アナログ信号
を積分し、該積分出力を前記ＡＤ変換器でディジタル信
号に変換するようにしたことを特徴とするＡＤ変換回路
。An integrator for inputting an analog signal to be converted is provided upstream of the AD converter, and a second timing signal synchronized with a first timing signal that determines a conversion period of the AD converter is applied to the integrator. . An AD conversion circuit, characterized in that the integrator integrates the analog signal for a predetermined period determined by the second timing signal, and the integrated output is converted into a digital signal by the AD converter.
JP15877083U 1983-10-13 1983-10-13 AD conversion circuit Pending JPS6066132U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15877083U JPS6066132U (en) 1983-10-13 1983-10-13 AD conversion circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15877083U JPS6066132U (en) 1983-10-13 1983-10-13 AD conversion circuit

Publications (1)

Publication Number Publication Date
JPS6066132U true JPS6066132U (en) 1985-05-10

Family

ID=30349679

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15877083U Pending JPS6066132U (en) 1983-10-13 1983-10-13 AD conversion circuit

Country Status (1)

Country Link
JP (1) JPS6066132U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55130230A (en) * 1979-03-30 1980-10-08 Mitsubishi Electric Corp Analog-digital converter

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55130230A (en) * 1979-03-30 1980-10-08 Mitsubishi Electric Corp Analog-digital converter

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