JPS605639A - Receiving circuit in spread spectrum communication system - Google Patents

Abstract

PURPOSE:To enable correct restoration of data even when the input level of a spread signal fluctuates by comparing a correlative output of the spread spectrum signal and a false random noise code with a reference value proportional to the peak value of the correlative output. CONSTITUTION:A spread spectrum signal d(t).p(t) is inputted to a correlation circuit 1. The circuit 1 takes correlation between the signal d(t).p(t) and a false random noise PN code p(t) and outputs a correlative signal phi(t). The signal phi(t) is inputted to a peak holding circuit 2 through a delay circuit 14, and the peak value is maintained. The circuit 2 outputs a reference value SC proportional to the peak value of the signal phi(t) and inputs the SC and a value SD obtained by multiplying 18 the SC by -1, to a sample timing generating circuit 3. The circuit 3 compares the signal phi(t), reference value SC and SD by comparator circuits 15, 16 and inputs an output of the circuit 15 and a sample timing output signal SE which is a logical sum 17 of the two compared output to a restoring circuit 4. The circuit 4 samples an output of the circuit 1 by the signal SE and restores the data d(t).

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a spread spectrum communication system, and the patent covers a receiving circuit in the system.

<Prior art and its problems> The spread spectrum communication method uses a signal that is spread (broadbanded) over a frequency much wider than the minimum band required to transmit the information that can be transmitted. The spread spectrum signal S (represented by this method)
The quick report data is d (L) (binary time series signal of + 1 or -1), and the PN (pseudorandom noise) code is p (
(binary sign of +1 or -1), the carrier wave is ωcE
Then, it is calculated by the following formula.

S(lead(ri・p(t)・houseωC) [However, ωc−2πf0, fc&, is the carrier frequency.Such a spread spectrum signal S([) is transmitted from the transmitting side.Therefore, on the receiving side It is necessary to receive this spread spectrum signal +jS() and demodulate the broadcast data.One of the circuit systems for this demodulation is a matched filter system.

As shown in Fig. 1, this combined filter system mixes a spread spectrum signal S (reconstructed with a regenerated carrier wave ωct) by a mixer a, and a low-pass filter bl.
From this, a low frequency component d(s・p(ri) is extracted from the mixed output, and a PN of the same type as that on the transmitting side is extracted by a further correlation circuit C.
Correlation with the code is taken, and at the peak of the correlation output NL), the output φ(L) is sampled by a sampling circuit di to restore information data d(t). By the way, the output d (c)・1) (L
) is equal to 2 figures (a and i), as shown in 1 blue graduation data d
Depending on the sign of ([), the polarity of l) N sign + 3 (L) is inverted. Here, fi, one period (one frame) of the PNN code (L) corresponds to one bit length of the ITf information data ([). Then, the output d (t)・1〕(rito, send i; 1 of the same type as on the side)
N code - 1) (If we take the correlation with
The IQ data d(ri) will have sharp peaks of positive and negative depending on the sign. Therefore, the correlation output φ(ri) will be sampled at the sample timing shown in Fig. 2 (C) around 19y in the beat. , its l) N code [1M accordingly
Originally, as shown in Figure 2(d), [this information data d(
Rika 1M yuan [Konaru. By the way, in such a matched filter receiving circuit, the output d(S・P
(If the signal levels of RI are +1 and -1, and the number of bits of one frame of PNN code (RI is M), the correlation output φ
(The signal power at the peak of ri is multiplied by M. On the other hand, the noise power included in the output d([)・l) (t) i is multiplied by M. Therefore, the SN ratio in this receiving circuit is M2/
Since the improvement is by a factor of M-M, communication becomes "T" efficient even in the presence of M times the noise.

sample in such a receiving circuit.

It is preferable that the peak of the correlation output φ([) is generated near the center of the peak of the correlation output φ([). This can be done by determining whether it is lower.

However, in such conventional receiving circuits, the level of the reference value was constant, and the outputs d([) and p(
When the level of the correlation output φ(1) fluctuates, the peak value of the correlation output φ(1) fluctuates, and there is a risk that the sample timing will be erroneously generated due to the superposition of noise.

<Objective of the Invention> An object of the present invention is to prevent erroneous sungel timing from occurring even if the manual level of the spread signal changes, and to enable data to be restored accurately.

<Configuration and Effects of the Invention> In order to achieve such an object, the present invention includes a correlation circuit that correlates a spread spectrum signal and a PN code, a peak hold circuit that holds the peak value of the output of the correlation circuit, a sample timing generation circuit that obtains a sample timing output by comparing a reference value proportional to the output of the peak hold circuit with the output of the correlation circuit; and data that samples the output of the correlation circuit using the sample timing output and restores data. The restoring circuit constitutes a receiving circuit for spread spectrum communication. Therefore, according to the present invention, the reference value can be made to follow fluctuations in the output peak value of the correlation circuit.

Therefore, even if the input signal to the correlation circuit fluctuates, the sample timing of the output of the correlation circuit will not be incorrect.
1F [Data can definitely be restored.

<Description of Embodiment> ′ Hereinafter, detailed explanation 11 will be given based on an embodiment of the present invention shown in the drawings.
Explain.

Figure 3 shows the spread spectrum communication system according to this embodiment [
FIG. In this embodiment, a peak hold circuit 2 holds the peak value of the output φ(1) of the correlation circuit 1, a reference value signal Sc, Sl) proportional to the output of the peak hold circuit 2, and an output φ(1) of the correlation circuit 1. 1) and obtains a sample timing output signal 9 SE; and a restoration circuit 4 that samples the output of the correlation circuit 1 using the sample timing output signal Sj and others to restore data d(ri). In response to the clock from the soft clock generator 5, the blind circuit 1 generates a spread signal 'ry d (t)・l) (t)
An analog shift circuit 6 for shifting the signal, a PN code register 7, and a product-sum circuit 8 consisting of a mixer (indicated by ■ in the figure) and a synthesizer (indicated by ■ in the figure) are connected to fHi, and the spread signal d(s,
P(ri) is shifted by an analog shift circuit 6, and the correlation between each tap and the PNr+ signal is taken to output a correlation output φ(ri).

The peak hold circuit 2 includes a first multiplier 9, a first peak hold section 10 including a first diode 1]1, a first resistor R1, and a first capacitor C1, and a second diode D.
2, the second peak hold section 11 consisting of the second resistor R2 and the second capacitor C2, and the rice '51. 2nd buffer amplifier 12.13 and 3rd and 4th diodes I)3. D4
and a variable resistor R3. The peak hold circuit 2 is provided with a correlation output φ(ri) via a delay circuit 14.

The sample timing generation circuit 3 has a first . It includes a second comparison circuit 15, 16 and an OR circuit 17, and includes a first ratio EIi,
The positive phase side input part of the llX circuit 15 and the second comparison circuit 16
The negative phase side human power part - and the force correlation output φ(L) are given,
In addition, the negative phase side input section - of the first comparison circuit 15 and the positive phase side input section - of the fA2 comparison circuit 16 [this peak hold circuit 2
The output is now given. In this case, the second
The output of the peak hold circuit 2 is applied to the positive phase side input section of the comparison circuit 16 via the second multiplier 1B. The data restoration circuit 4Q is composed of, for example, a flip-flop, and the output of the first comparator circuit 15 of the sample timing generation circuit 3 is given to the manual part of this flip-flop 4.
The output of the OR circuit 17 of the circuit 3 is provided to the clock input section T of the circuit 3.

The operation of the receiving circuit shown in FIG. 3 will be briefly described with reference to the time chart shown in FIG. 4.

First, as shown in FIG. 4(a), the level of the spread signal d(s・p(t) input to the correlation circuit 1 decreases between the broken lines [, H) with the passage of time. shall be.

Then, the peak value of the correlation circuit 10 output φ([) is also
It decreases as shown by the solid line in FIG. 4(b). This correlation output φ(L) can be input to the peak hold circuit 2 via the delay circuit 14. In the first peak hold section 101 in this peak hold circuit 2, the correlation output φ (relay first diode 1) 1 delayed by the delay circuit 14
, the first resistor R+ and the first capacitor C11, the positive peak value of the correlation output φ(R) is peak-held with a time constant determined by the first resistor R1 and the first condenser C1. The delayed correlation output φ (is the first multiplier 9 in the peak bold circuit 2
From this, -1 and the multiplication are multiplied, the sign is inverted, and then the result is given to the second peak hold section 11. Similarly, in this second peak hold section 11, the correlation output is caused by the second diode D2, the second resistor 1 (2, and the second capacitor 02), and the negative peak value thereof is increased by the second resistor R2 and the second capacitor C2i. The peaks are held with a fixed time constant.The signals SA and S13 whose peaks are held in the first and second peak hold sections io and il are shown in FIG.
C) −<<sl is shown.

Both signals SA and "B are respectively connected to the first and second buffer amplifiers 12.13 and the third and fourth diodes 1) 3.1
) 4, but between the two signals SA and S13, the one with the higher level 1tf SA or ``B, or one of the diodes D3 or D4 is made conductive and output from the voltage dividing resistor Ra. The value can be output as -5c. This output signal Sc is inputted by the first comparison circuit 15 of the sample timing generation circuit 3 and then multiplied by 1 by the second multiplier 18. The sign is then inverted and input as the subsequent signal SD. Both the signals Sc and SD fluctuate in response to the fluctuations in the correlation output φ([), as shown by the broken line σ in FIG. Therefore, in both comparison circuits 15 and 16, the reference value signal σ shown by the broken line is 4
Since the four-value signals Sc and SI) exist, the comparison output signal SE is outputted via the OR circuit 17 at the timing shown in FIG. 4(e). The input section 1) of the flip-flop 4 as a data restoration circuit is supplied with the output of the first ratio one-bit circuit 15, and the output section 1 of the flip-flop 4 is supplied with a signal SL as a sample timing output. Since the flip-flop 40 output bait ≦ mutual, the data shown in Figure 4 (f month) is output and restored σ.

[Brief explanation of drawings]

Fig. 1 is a receiving circuit diagram of a conventional example, Fig. 2 is a time chart of signals of various parts of the receiving circuit of 1st Terminal 1, Fig. 3 is a receiving circuit diagram of an embodiment of the present invention, and Fig. 4 3 is a time chart of signals of various parts by the receiving circuit of FIG. 3. 1... Correlation circuit, 2... Peak hold circuit, 3.
...Sample timing generation circuit, 4...Data restoration circuit. Applicant Tateishi Electric Co., Ltd. Agent Pu1 Ritooka I F Kazuhide

Claims (1)

[Claims] (1) A correlation circuit that correlates the spread spectrum signal with the N code, a peak hold circuit that holds the peak value of the output of the correlation circuit, and a reference value that is proportional to the output of the peak hold circuit and the correlation circuit. The present invention is characterized in that it includes a sample timing generation circuit that compares the sample timing output with the output to generate a sample timing output, and a data recovery circuit that samples the output of the correlation circuit based on the sample timing output and recovers data. , a receiving circuit in a spread spectrum communication system.