JPS6039235B2 - video display control device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a video display control device that is interposed between a host device and a video display device and supplies a video signal and a synchronization signal to the video display device, and in particular enables diagnosis by a program. The present invention relates to a video display device.

Conventional video display control devices generally display a fixed pattern on the screen of the video display device by operating a diagnostic switch provided on the device panel, or receive a diagnostic character pattern from a host device to control the video display device. The operation of the video display device is diagnosed by projecting it on the screen and visually observing the screen, and it is not possible to diagnose it programmatically from the host device, and furthermore, normal operation must be stopped during diagnosis. . Therefore, an object of the present invention is to provide a video display control device whose operation can be checked and diagnosed programmatically from a host device.

That is, in recent years, in terminal systems in which video display devices are often used, the video display control unit is controlled by the input/output control bus of a microprocessor or minicomputer, as the terminal functions have become diversified. Considering that it is a program-controlled mirror as one of the input/output devices of the processing device, a diagnostic counter is provided in the video display control device, and according to the diagnostic command sent from the host device via the input/output bus, The diagnostic counter counts the video signal or synchronization signal sent to the video display device and sends the counted value of this counter to the host device via an input/output bus. Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a configuration diagram of a video display control device in an integrated terminal control device that is an embodiment of the present invention.

The host device 1 of the video display control device 6 includes a processing device 2 and a main storage device 3, and the processing device 2 has a programmable timer mechanism 4. The processing device 2 has input/output buses 5, 22 for connecting input/output devices, and the video display control device 6 is connected via the input/output buses 5, 22. Of course, other input/output devices 18 (line control device, disk device, etc.) can also be connected to the input/output buses 5, 22. The bus control signal line 5 entering the video display control device 6 enters the command control circuit 7, and the control circuit 7 receives display data (character codes) for one screen or several display lines sent via the data signal line 22. It performs storage and update control of the fresh memory 8.

The command control circuit 7 also controls the operation of the diagnostic control circuit 13. The beam position counter 1 measures the beam position of the video display device 17, the read/write address and timing of the refresh memory 8, the timing of setting the character generator 9, and the synchronization signal generation circuit 1.
This is to regulate the timing of generation of the second synchronizing signal. The character code read from the refresh memory 8 enters the character generator 9;
outputs dot information corresponding to the character code and beam position.

The dot register 10 converts the parallel dot information taken out from the character generator 9 into serial video information 24 (dot pulse train) and sends it to the video display device 17 via the cable 15.

The synchronization signal generation circuit 12 generates a specified synchronization signal 23,
It is sent via cable 16 to video display device 17 . The diagnostic control circuit 13 sends a reset signal 20 to the diagnostic counter 14 in accordance with the instruction of the control signal from the command control circuit 7, and also sends a synchronization signal 23 or a video signal 24 to the diagnostic counter 14 as a count-up signal 21. Send. The output of the diagnostic counter 14 is connected to the data signal line 22 of the input/output bus. Next, the normal operation of this embodiment will be explained.

When the device is powered on, the video display control device 6
The oscillation circuit in the beam position counter 11 (hereinafter referred to as VDC) is automatically activated, and transmission of the synchronization signal 23 and video signal 24 from VDC 6 begins.

When changing the display contents, the processing device 2 issues an input/output command and then sends out update data (character code). V.D.
Command control circuit 7 of C6 decodes the input/output command and controls refresh memory 8 to write update data. Here, the synchronization signal 24 and the video signal 24 will be explained with reference to FIG.

An industrial monitor television is generally used as the video display device (hereinafter referred to as CRT) 17, and the interface signal provided to the CRT complies with the radio equipment regulations of the Radio Law. According to this rule, the synchronization signal 23 includes a horizontal synchronization pulse 26, an equivalent pulse 27, and a vertical synchronization pulse 28.
These pulses per unit time 26, 27,
The number of times 28 is issued is determined by the number of screen scans per unit time, and is a known value at the time the VDC 6 was designed.

Further, the video signal 24 changes depending on the displayed characters and the dot configuration of the characters, but if the display content is known, the number of video pulses 29 to be sent per unit time is also a known value. Next, the diagnostic operation will be explained.

First, when diagnosing the synchronization signal generation circuit 12, the processing device 2 is operated as shown in FIG.

- In accordance with the chart, a diagnosis start command is issued along with identification information indicating that the signal to be diagnosed is the synchronization signal 23.
Under the control of the command control circuit 7, the diagnostic control circuit 13 outputs a reset signal 20 to first reset the diagnostic counter 14, and then converts the synchronization signal 23 into a count-up signal 2.
It is added to the counter 14 as 1. Counter 14 begins counting the number of pulses in synchronization signal 23. The processing device 2 monitors time using the timer mechanism 4 or other instructions (branch instructions) from the time when the diagnosis start instruction is issued, and issues a diagnosis stop instruction after one second has elapsed. As a result, the diagnostic control circuit 13 stops sending out the count-up signal 21 and holds the value of the diagnostic counter 14. Subsequently, the processing unit 2 issues a counter read command, whereby the contents (count value) of the diagnostic counter 14 are output to the data signal line 22 of the input/output bus. The processing device 2 determines the normality of the synchronization signal generation circuit 12 by comparing whether the calculated count value is within the range of expected values. Note that the range of the expected value of the counted value must be determined in consideration of the accuracy of time monitoring. For example, the precision of the timer mechanism of the processing device 4 is relatively low, and there is usually an error of several tens of seconds to several milliseconds with respect to the set time, and the upper and lower eyes of the expected value must be determined accordingly. Refresh memory 8, character generator 9
When diagnosing a video signal system including the dot register 10, the processing device 2 issues a diagnosis start command together with identification information indicating that the signal to be diagnosed is the video signal 24.

After the diagnostic control circuit 13 sends out the reset signal 20,
A video signal 24 is sent out as a count-up signal 21. The subsequent processing procedure is the same as described above. One screen has 525 scanning lines, and this scanning line is the first scanning line according to the Radio Law.
When divided into screen field and second screen field, 1
The number of pulses of the synchronization signal per second is fixed at 1611, and even if the time monitoring error of the processing device 2 is taken into consideration, it is sufficient for the diagnostic counter 14 to have 16 bits.

In the case of checking the video signal, the diagnostic display screen may be constructed so that these 16 bits are enough. Figure 3 shows
A video display control device 6 which mixes the video signal 24 and the synchronization signal 23 using the mixing circuit 3 to create a composite video signal 25 (see FIG. 4) and sends it to the video display device 17 through one cable 31. The configuration is shown below.

Other than this, it is exactly the same as FIG. 1. As described above, the video display control device of the present invention can be diagnosed by a program on the host installation side, and diagnosis of the synchronization signal system, etc. can be performed while normal display operations are continued.

[Brief Description of the Drawings] Fig. 1 is a block diagram showing one embodiment of the present invention, Fig. 2 is a flowchart of diagnostic processing in the same embodiment, and Fig. 3 is a part showing another embodiment of the present invention. FIG. 4 is a time chart showing a video signal, a synchronization signal, and a composite video signal. 1. Host device, 2. Processing device, 5, 22. Input/output bus, 6. Video display control device, 7. Command control circuit, 8. Refresh memory, 9. Character generator. - Evening, 10... Dot Regis Evening, 11...
・Beam position counter, 12...Synchronization signal generation circuit, 1
3...Diagnostic control circuit, 14...Diagnostic counter, 17.
-Video display device, 23...Synchronization signal, 24...
・Video signal. Figure 1 Figure 2 Figure 3 Figure 4

Claims (1)

[Claims] 1 A video device connected between a host device and a video display device, and under the control of the host device, supplies the video display device with a synchronization signal and a video signal corresponding to display data received from the host device via an input/output bus. The display control device is provided with a diagnostic counter and a control circuit that causes the diagnostic counter to count the video signal or the synchronization signal according to a diagnostic command from the host device, and counts the count value of the diagnostic counter according to the diagnostic command. A video display control device characterized in that it is configured to send data to the host device through an input/output bus.