JPS6034041A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS6034041A JPS6034041A JP58143368A JP14336883A JPS6034041A JP S6034041 A JPS6034041 A JP S6034041A JP 58143368 A JP58143368 A JP 58143368A JP 14336883 A JP14336883 A JP 14336883A JP S6034041 A JPS6034041 A JP S6034041A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- electrode
- semiconductor device
- semiconductor substrate
- adhered
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/11—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01013—Aluminum [Al]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01015—Phosphorus [P]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01047—Silver [Ag]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Electrodes Of Semiconductors (AREA)
Abstract
Description
【発明の詳細な説明】
〔発明の属する技術分野〕
本発明に、ビンダイオード、バラクタダイオード等のよ
うにバンプ電極を有する半導体装置に関する0
〔従来技術〕
ビンダイオードやバラクタダイオード等高周波帯で使用
さh−るダイオード素子のパッケージは諸%注及び製造
コストの点等からガラス封止パッケージが広く使用され
ている。こわに第1図に示すように金属リードl、2間
九ペレット31−Jさみ、こわ全ガラススリーブ4 r
cて融着する構造奮とっているために、この型のダイオ
ード素子のペレットにメッキ等【よって形成されたバン
グ電極余有している。[Detailed Description of the Invention] [Technical Field to Which the Invention Pertains] The present invention relates to semiconductor devices having bump electrodes such as bin diodes and varactor diodes. Glass-sealed packages are widely used as packages for diode elements due to various factors and manufacturing costs. As shown in Fig. 1, there is a metal lead L, 2 between 9 pellets 31-J, and a full glass sleeve 4R.
Since the structure of this type of diode element is fusion-bonded, the pellet of this type of diode element is plated, etc. [Thus, a bang electrode is formed.
一般に半導体素子の電極金属とじては、アルミニウム電
極が広く使用されているが、ガラス封止型ダイオードの
ベレットでに、アルミニウム上に直接バング電極全形改
することが困難であるため、種々の電極構造が検討さi
−1使用されているが、いずわも製造工程的に複雑なも
のである。Generally, aluminum electrodes are widely used as the electrode metal for semiconductor devices, but in the case of glass-sealed diode pellets, it is difficult to completely modify the bang electrode directly on the aluminum, so various electrodes are used. The structure is considered
-1 is used, but the manufacturing process is complicated.
その例として第2図に従来より使用さhているガラス封
止型ダイオードペレットの電極構造を示す。これに所定
の半導体基板5に酸化膜6をマスク(して半導体基板5
と反対の導電型を有する拡散層7が形成されている。こ
の拡散層7界面(白金全蒸着、熱処理を施すことによっ
て白金シリ丈イド層8を形成する。その後、チタン層9
.白金層10.金層it等の金属M’に順次蒸着、スパ
ッタ等の手段?用いて形成させたのち、その上だメッキ
等に裏って銀バンプ電極12i形既し′fcものである
。As an example, FIG. 2 shows the electrode structure of a conventionally used glass-sealed diode pellet. Then, mask the oxide film 6 on the predetermined semiconductor substrate 5 (and mask the semiconductor substrate 5).
A diffusion layer 7 having an opposite conductivity type is formed. A platinum silicide layer 8 is formed by performing platinum full vapor deposition and heat treatment at the interface of this diffusion layer 7. Then, a titanium layer 9 is formed.
.. Platinum layer 10. Means such as sequential vapor deposition or sputtering on metal M' such as gold layer it? After forming the silver bump electrode 12i on the back of the plated layer, a silver bump electrode 12i is formed.
これに半導体層と上部金属層とのオーミック比を艮好屹
するために白金シリ丈イド層8′f!:形成したり、銀
バング電極12とチタン、白金層Q 10の密着を良好
にするためにAu層11t=介したりする必要があるた
め、非常に複雑な構造となり、そわだけ製造工程が複雑
となると共九白金、金等の高価な貴金属を使用するので
、ベレットヲ安価に供給することが困難であるという欠
点があった〇〔発明の目的〕
本発明の目的に、特注?損なうことなく上記欠点を解消
したところのバング電極を有する半導体装置全提供する
ことにある。In addition, in order to improve the ohmic ratio between the semiconductor layer and the upper metal layer, a platinum silicate layer 8'f! In order to improve adhesion between the silver bang electrode 12 and the titanium and platinum layer Q10, it is necessary to interpose the Au layer 11t, resulting in a very complicated structure, and the manufacturing process is complicated. In this case, expensive precious metals such as platinum and gold are used, so it is difficult to supply pellets at a low price. The object of the present invention is to provide an entire semiconductor device having a bang electrode in which the above-mentioned drawbacks are eliminated without any damage.
本第1発明の半導体装置に、バンブ電極を有する半導体
装置において、前記バング電極が半導体基板上丸形5y
、されたアルミニウム層と、該アルミニウム海上に形成
されたニッケル層と、該ニッケル層上(形5y、された
銀パン1電極とから構1111ざハる○
又、本第2発明の半導体装置に、パン111L極を有す
る半導体装置(おいて、前記バンブ電極が半導体基板上
に形成さねたアルミニウム層と、該アルミニウム層上に
形成されたチタン層と、該チタン層上に形成されたニッ
ケル層と、該ニッケル層上に形成された銀バング電極と
から構成される0〔実施例の説明〕
以下、本発明の実施例rcついて図IIIIヲ参照して
説明する。In the semiconductor device of the first aspect of the present invention, in the semiconductor device having a bump electrode, the bump electrode has a round shape 5y on the semiconductor substrate.
, a nickel layer formed on the aluminum layer, and a silver pan 1 electrode formed on the nickel layer (shaped 5y). , a semiconductor device having a pan 111L pole (in which the bump electrode includes an aluminum layer formed on the semiconductor substrate, a titanium layer formed on the aluminum layer, and a nickel layer formed on the titanium layer). and a silver bang electrode formed on the nickel layer [Explanation of Example] Hereinafter, Example rc of the present invention will be described with reference to FIG. III.
第3図に本第1発明の一実施例の要部を示す断面図であ
る。FIG. 3 is a sectional view showing a main part of an embodiment of the first invention.
本実施例は、第1図の従来例に本M1発明を適用したも
ので、半導体基板5上の拡散層7上に蒸着法又はスパッ
タ法により形成された厚さ約1μmのアルミニウム層1
3と、このアルミニウム層13上に蒸着法rcより形成
された厚さ約0.3〜0.5μmのニッケル層14と、
このニッケル層14上に形成された電気メツキ法により
形[Eされた銀バンプ電極12とから構5y、されるパ
ン1電極紮有している0
すなわち、本実施例が有するバング電極に、アルミニウ
ム海上
7とのオーミック犬舎も容易に得ることができ、更に、
ニッケル層13i介することによって、容易に銀バング
電極12t−形成でき、銀パン1電極12Uニッケル層
13を介して、アルミニウム層13と密着させられる。In this embodiment, the present M1 invention is applied to the conventional example shown in FIG.
3, a nickel layer 14 with a thickness of about 0.3 to 0.5 μm formed on the aluminum layer 13 by rc vapor deposition,
A silver bump electrode 12 is formed on the nickel layer 14 by electroplating, and a pan 1 electrode slit is formed. Ohmic kennel with Maritime 7 can be easily obtained, and furthermore,
By interposing the nickel layer 13i, the silver bang electrode 12t can be easily formed, and the silver bang electrode 12U can be brought into close contact with the aluminum layer 13 via the nickel layer 13.
従って本実施例ycよると、電極とじでの必要な、オー
ミック注、固着注等の特注を損うことなく、簡単な構成
でしかも従来のように白金、金等の貴金属を用いないの
で、安価にベレットを供給することができる0
第4図に本第2発明の一実施例の要部を示す断面図であ
る。Therefore, according to this embodiment yc, it does not impair special orders such as ohmic injection and fixed injection necessary for electrode binding, has a simple structure, and does not use precious metals such as platinum or gold as in the conventional case, so it is inexpensive. FIG. 4 is a sectional view showing a main part of an embodiment of the second invention.
本実施例に、第3図の本第1発明の一実施例において、
アルミニウム層14とニッケル層15の間に、約O91
μmの厚さのチタン層15を蒸着法又はスパッタ法に裏
V形成したものである。このチタン層15にアルミニウ
ム層13とニッケル層14との結合層としで働くので、
本実施例によるとより強固なバンブ電極を有する半導体
装置が得られる0
〔発明の効果〕
以上詳細九説明したとおり、本発明(工りば、本発明の
半導体装置に、従来のように白金、金等の貴金属?用い
ることなく、より簡単な構造からなるバンプ電極?有し
ているので、特8:會損うことなく安価にペレットに供
給でさるという効果が得られる。In this embodiment, in an embodiment of the first invention shown in FIG.
Approximately O91 between the aluminum layer 14 and the nickel layer 15
A titanium layer 15 with a thickness of .mu.m is formed with a back V by vapor deposition or sputtering. Since this titanium layer 15 acts as a bonding layer between the aluminum layer 13 and the nickel layer 14,
According to this embodiment, a semiconductor device having a stronger bump electrode can be obtained. [Effects of the Invention] As described above in detail, the semiconductor device of the present invention can be manufactured using platinum, Since the bump electrode has a simpler structure without using noble metals such as gold, it is possible to obtain the effect of feature 8: being able to supply pellets at low cost without causing any damage.
第1図は従来の半導体装置の一例の構造?示す断面図、
第2図げ従来の半導体装置の一例の要部を示す断面図、
第3図に本第1発明の一実施例の要部を示す断面図、第
4図に本第2発明の一実施例の要部を示す断面図である
。
1、 2・・・金属リード、3・・・ペレット、4・・
・カラススリーブ、訃・・半導体基板、6・・・酸化膜
、7・・・拡散層、8・・・白金シリ丈イド層、9・・
・チタン層、lO・−・白金層−11・・・金層、12
・・・銀バンプ電極、13・・・アルミニウム層、14
・・・ニッケル層、15・・・チタン層。
芳1図 第2区
第3図
第4図Figure 1 shows the structure of an example of a conventional semiconductor device? A sectional view showing,
FIG. 2 is a sectional view showing a main part of an example of a conventional semiconductor device;
FIG. 3 is a sectional view showing a main part of an embodiment of the first invention, and FIG. 4 is a sectional view showing a main part of an embodiment of the second invention. 1, 2...metal lead, 3...pellet, 4...
・Crow sleeve, end...Semiconductor substrate, 6...Oxide film, 7...Diffusion layer, 8...Platinum silicide layer, 9...
・Titanium layer, IO・-・Platinum layer-11... Gold layer, 12
... Silver bump electrode, 13 ... Aluminum layer, 14
...Nickel layer, 15...Titanium layer. Figure 1, Section 2, Figure 3, Figure 4
Claims (2)
ング電極が半導体基板上【形成されたアルミニウム層と
、該アルミニウム層上に形成されたニッケル層と、該ニ
ッケル層上に形成された銀バング電極とから構成される
こと?!−特徴とする半導体装置。(1) In a semiconductor device having a bang electrode, the bang electrode includes an aluminum layer formed on a semiconductor substrate, a nickel layer formed on the aluminum layer, and a silver bang electrode formed on the nickel layer. What does it consist of? ! -Featured semiconductor device.
ンプ電極が半導体基板上に形成されたアルミニウム層と
、該アルミニウム層上丸形酸されたチタン層と、該チタ
ン層上に形成されたニッケル層と〜該ニッケル層上【形
Fy、さhた銀バング電極とから構成されることを特徴
とする半導体装置。(2) On a semiconductor substrate having a bump electrode, the bump electrode includes an aluminum layer formed on the semiconductor substrate, a titanium layer formed on the aluminum layer, and a nickel layer formed on the titanium layer. A semiconductor device comprising a layer and a silver bang electrode formed on the nickel layer.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58143368A JPS6034041A (en) | 1983-08-05 | 1983-08-05 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP58143368A JPS6034041A (en) | 1983-08-05 | 1983-08-05 | Semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6034041A true JPS6034041A (en) | 1985-02-21 |
Family
ID=15337154
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP58143368A Pending JPS6034041A (en) | 1983-08-05 | 1983-08-05 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6034041A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH02303164A (en) * | 1989-05-18 | 1990-12-17 | Nec Kansai Ltd | Semiconductor device |
US5071787A (en) * | 1989-03-14 | 1991-12-10 | Kabushiki Kaisha Toshiba | Semiconductor device utilizing a face-down bonding and a method for manufacturing the same |
-
1983
- 1983-08-05 JP JP58143368A patent/JPS6034041A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5071787A (en) * | 1989-03-14 | 1991-12-10 | Kabushiki Kaisha Toshiba | Semiconductor device utilizing a face-down bonding and a method for manufacturing the same |
JPH02303164A (en) * | 1989-05-18 | 1990-12-17 | Nec Kansai Ltd | Semiconductor device |
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