JPS60193350A - Wire bonding - Google Patents
Wire bondingInfo
- Publication number
- JPS60193350A JPS60193350A JP59049822A JP4982284A JPS60193350A JP S60193350 A JPS60193350 A JP S60193350A JP 59049822 A JP59049822 A JP 59049822A JP 4982284 A JP4982284 A JP 4982284A JP S60193350 A JPS60193350 A JP S60193350A
- Authority
- JP
- Japan
- Prior art keywords
- capillary
- ceramic substrate
- wedge
- substrate
- metal wire
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
- H01L24/78—Apparatus for connecting with wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/78—Apparatus for connecting with wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/78—Apparatus for connecting with wire connectors
- H01L2224/7825—Means for applying energy, e.g. heating means
- H01L2224/783—Means for applying energy, e.g. heating means by means of pressure
- H01L2224/78301—Capillary
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/8512—Aligning
- H01L2224/85148—Aligning involving movement of a part of the bonding apparatus
- H01L2224/85169—Aligning involving movement of a part of the bonding apparatus being the upper part of the bonding apparatus, i.e. bonding head, e.g. capillary or wedge
- H01L2224/8518—Translational movements
- H01L2224/85181—Translational movements connecting first on the semiconductor or solid-state body, i.e. on-chip, regular stitch
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/852—Applying energy for connecting
- H01L2224/85201—Compression bonding
- H01L2224/85205—Ultrasonic bonding
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/85909—Post-treatment of the connector or wire bonding area
- H01L2224/85951—Forming additional members, e.g. for reinforcing
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/156—Material
- H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
- H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は、ワイアボンディング方法(;おける基板の固
定方法に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for fixing a substrate in a wire bonding method.
従来、ワイアボンディング方法としては、アルミワイア
を装着したウェッジに超背波、荷重を印加する超音波ボ
ンディング方式(USB)、金属ワイアを装着したキャ
ピラリに超音波荷重および熱を印加するサーモソニック
ボンディング方式(TSB)等がある。Conventional wire bonding methods include the ultrasonic bonding method (USB), which applies an ultrasonic wave and load to a wedge fitted with aluminum wire, and the thermosonic bonding method (USB), which applies ultrasonic load and heat to a capillary fitted with metal wire. TSB) etc.
今、従来例について、第1図〜第3図に示されているサ
ーモソニックボンディング方式(TSB)による方法に
ついて説明する。Now, as a conventional example, a method using the thermosonic bonding method (TSB) shown in FIGS. 1 to 3 will be described.
第1図及び第2図において、キャピラリ1に装着された
金属ワイア2の下端部2′は、キャピラリ1の下方にあ
るトーチ棒3に臨んでいる。第3図において、キャピラ
リ1の中央部に金属ワイア2が装着されて、金属ワイア
2はキャピラリ1を貫通している。第1図において、テ
ーブル6の上面にセラミック基板5が載置してあり、セ
ラミック基板5の上面左側には、半導体素子4が取付け
である。In FIGS. 1 and 2, the lower end 2' of the metal wire 2 attached to the capillary 1 faces the torch bar 3 below the capillary 1. In FIG. 3, a metal wire 2 is attached to the center of the capillary 1, and the metal wire 2 passes through the capillary 1. In FIG. 1, a ceramic substrate 5 is placed on the top surface of a table 6, and a semiconductor element 4 is attached to the left side of the top surface of the ceramic substrate 5.
そして、1s6図の状態にあるキャピラリ1(又はウェ
ッジ)に、金属ワイア2を貫通して装着したものに、第
2図に示すように、金属ワイア2の下端部2′にトーチ
棒6を臨ませて、このトープ棒6に高電圧を印加して、
高電圧の放電によって、金属ワイア2の下端部2′を溶
融して球状下端部2′を形成する。すなわち、この下端
部2′は、表面張力によりボール状に形成される。その
後、第1図の左側に示すように、キャピラリ1が、半導
体素子4の上面まで降下し、前記金属ワイア2の球状の
下端部が半導体素子4の上面の電極に圧着接合される。Then, as shown in FIG. 2, the torch rod 6 is attached to the lower end 2' of the metal wire 2, which is attached to the capillary 1 (or wedge) in the state shown in FIG. Then, apply a high voltage to this tope rod 6,
The high voltage discharge melts the lower end 2' of the metal wire 2 to form a spherical lower end 2'. That is, this lower end portion 2' is formed into a ball shape due to surface tension. Thereafter, as shown on the left side of FIG. 1, the capillary 1 is lowered to the upper surface of the semiconductor element 4, and the spherical lower end of the metal wire 2 is crimped to the electrode on the upper surface of the semiconductor element 4.
これによって、第1ポンデイングが形成される。As a result, a first ponding is formed.
それから、次の工程において、第1図の右側に示すよう
に、キャピラリ1は、金属ワイア2に装着されているの
で、キャピラリ1は金属ワイア2の上を摺動させられて
、セラミック基板5の上面にある所定の電極上に降下し
、キャピラリ1に超音波振動及び荷重が、又、前記セラ
ミック基板5の下面に固着されているテープ/I/6に
は、熱が、それぞれ、印加される。それによって、キャ
ピラリ1は、セラミック基板5の上面(二ある所定の電
極上に圧着接合されて、第2ボンデイングが形成される
。そして、更に、第1図の右側に示されているように、
第2ボンデイングの接合面で、金属ワイア2を破断し、
これによりワイアボンディングが完了する。Then, in the next step, as shown on the right side of FIG. Ultrasonic vibration and load are applied to the capillary 1 which falls on a predetermined electrode on the upper surface, and heat is applied to the tape /I/6 fixed to the lower surface of the ceramic substrate 5, respectively. . Thereby, the capillary 1 is crimped and bonded onto the upper surface (two predetermined electrodes) of the ceramic substrate 5, forming a second bonding.As shown on the right side of FIG.
Breaking the metal wire 2 at the joint surface of the second bonding,
This completes wire bonding.
このようなワイアボンディング方法においては、基板5
は真空チャック等によりテーブル6上に固着されている
。しかし、セラミック基板のソリ、異物等により、基板
とテーブルとの間に間隙があると、セラミック基板がバ
ネとして作用し、荷重。In such a wire bonding method, the substrate 5
is fixed on the table 6 using a vacuum chuck or the like. However, if there is a gap between the board and the table due to warping of the ceramic board or foreign objects, the ceramic board will act as a spring, causing a load.
超音波振動を吸収するため、金属ワイアと電極の接合が
十分でなく、歩留、信頼度が低下する欠点がみられた。In order to absorb ultrasonic vibrations, the bonding between the metal wire and the electrode was insufficient, resulting in a decrease in yield and reliability.
そこで1本発明は、キャピラリ、或いは、ウェッジの動
作に連動して、セラミック基板を上から押えつけ、セラ
ミック基板をボンディング装置に用いるテーブルに固着
させること(二より、セラミック基板のバネ作用をなく
シ、信頼性のあるワイアボンディング及び接合が得られ
るようなボンディング装置を提供するものである。Therefore, one aspect of the present invention is to press down the ceramic substrate from above in conjunction with the operation of the capillary or wedge and fix the ceramic substrate to the table used in the bonding device (secondly, to eliminate the spring action of the ceramic substrate The present invention provides a bonding device that enables reliable wire bonding and joining.
本発明の構成は、直径数10ミクロン程度の金属ワイア
をウェッジ、或いは、キャピラリに装着させて、該金属
ワイアの下端部を球状に形成し、前記ウェッジ、或いは
、キャピラリを降下させて、この球状の下端部を、セラ
ミック基板の上面に固着した半導体素子上面の電極に接
合させて第1ボンデイングを形成させ、次に前記ウェッ
ジ或いは、キャピラリを金属ワイア上に摺動させて、前
記セラミック基板の上面の所定の電極ζ二位置させ、前
記ウェッジ或いは、キャピラリに超音波振動及び荷重を
、前記セラミック基板の下面に固着したテーブルに熱を
、それぞれ印加させて、前記ウェッジ−或いは−キャビ
ラリをセラミック基板の上面の所定の電極に溶着接合さ
せて、第2ボンデイングを形成させるよう1二するワイ
アボンディング方法ζ;おいて、前記ウェッジ、或いは
、キャピラリの降下する動作に連動して、前記セラミッ
ク基板を押えて固定させるためのクランプ機構を、セラ
ミック基板の上面に降下させてセラミック基板を固定さ
せることを特徴とするものである。The structure of the present invention is to attach a metal wire with a diameter of about 10 microns to a wedge or a capillary, form the lower end of the metal wire into a spherical shape, and lower the wedge or capillary to form this spherical shape. The lower end of the semiconductor element is bonded to the electrode on the upper surface of the semiconductor element fixed to the upper surface of the ceramic substrate to form a first bonding, and then the wedge or capillary is slid onto the metal wire to connect the upper surface of the ceramic substrate. The wedge or capillary is placed at a predetermined electrode ζ2, and ultrasonic vibration and load are applied to the wedge or capillary, and heat is applied to a table fixed to the bottom surface of the ceramic substrate, so that the wedge or capillary is connected to the ceramic substrate. A wire bonding method ζ in which the ceramic substrate is welded to a predetermined electrode on the upper surface to form a second bond; A clamp mechanism for fixing the ceramic substrate is lowered onto the upper surface of the ceramic substrate to fix the ceramic substrate.
次に、本発明の実施例ζ:ついて、図面を参照して説明
する。第5図は本発明によるワイアボンディング方法に
よってなされているボンディング接合中のキャピラリ位
置を示すものである。11はキャピラリであり、セラミ
ック基板の表面に圧着接合しである。14はセラミック
基板15の表面の左側口接合しである半導体素子であり
、半導体素子14上の電極には、金属ワイア120ボー
ル状端部12′が接合している。この金属ワイア12は
わん曲し【キャピラリ11の底部から、キャピラリ11
の中央部分を貫通して装着されている。Next, embodiment ζ of the present invention will be described with reference to the drawings. FIG. 5 shows the position of the capillary during bonding made by the wire bonding method according to the present invention. 11 is a capillary, which is pressure-bonded to the surface of the ceramic substrate. Reference numeral 14 denotes a semiconductor element which is bonded to the left side of the surface of the ceramic substrate 15, and a ball-shaped end 12' of a metal wire 120 is bonded to an electrode on the semiconductor element 14. This metal wire 12 is curved [from the bottom of the capillary 11 to
It is installed through the central part of the
セラミック基板15の下面には、テーブル16が固着さ
れている。セラミック基板15の上面右側 ′には、押
え棒17が設けられている。この押え棒17は、セラミ
ック基板を上から押圧して固定するためのクランプ機構
の一実施例である。A table 16 is fixed to the lower surface of the ceramic substrate 15. A presser bar 17 is provided on the right side of the upper surface of the ceramic substrate 15 . This presser bar 17 is an example of a clamp mechanism for pressing and fixing the ceramic substrate from above.
第4図は、ボンディング方法によって、金属ワイア12
の下端部を半導体素子14の所定の電極に接合して第1
ボンデイングを形成して、第2ボンデイングの直前のキ
ャピラリの位置を示している。FIG. 4 shows how the metal wire 12 is bonded by the bonding method.
The lower end of the semiconductor element 14 is joined to a predetermined electrode of the first
A bond is formed to show the position of the capillary just before the second bond.
キャピラリ11と前記押え棒17はセラミック基[15
の右側上方にある。そして、キャピラリ11は押え棒1
7より内側にある。セラミック基[15の上面左側には
、半導体素子14が固着されていて、半導体14の上面
には、第5図と同様に、金属ワイア12のボール状の下
端部12′が接合されている。そして、押え棒17は、
セラミック基板に対して、その上方において、キャピラ
リ11よりも近い距離にある。第4図で、押え棒17は
キャピラリ11と連動するようにしである。押え棒17
は、セラミック基板15の上方)二ある。The capillary 11 and the presser rod 17 are made of ceramic base [15
It's on the upper right side. And the capillary 11 is the presser rod 1
It is inside from 7. A semiconductor element 14 is fixed to the left side of the upper surface of the ceramic base [15], and a ball-shaped lower end 12' of a metal wire 12 is bonded to the upper surface of the semiconductor 14, as in FIG. And the presser bar 17 is
It is located above the ceramic substrate at a closer distance than the capillary 11. In FIG. 4, the presser bar 17 is designed to interlock with the capillary 11. Presser bar 17
are located above the ceramic substrate 15).
そして、キャピラリ11がセラミック基板15の表面上
に降下すると同時に、キャピラリ11と平行に押え棒1
7も降下する。しかしながら、押え棒17はセラミック
基板15に対して、キャピラリ11より近い距離にある
から、押え棒17は、キャピラリ11よりも光書;セラ
ミック基板15に接触する。fs5図に示すように、押
え棒17はセラミック基板15を圧着し接合する。それ
故に、押え棒17に荷重を附加することにより、セラミ
ック基板15は十分(二抑えつけられており、セラミッ
ク基板15にソリがあっても、テーブル16との間1;
間隙が生じることがなく、また、セラミック基板15が
バネとして作用することがないので、荷重、超音波振動
を吸収することがなく、金属ワイアと電極との接合が十
分であり、ボンディング時の超音波振動、荷重の低下を
防止できる。Then, at the same time as the capillary 11 descends onto the surface of the ceramic substrate 15, the presser bar 1 is placed parallel to the capillary 11.
7 also descends. However, since the presser rod 17 is closer to the ceramic substrate 15 than the capillary 11, the presser rod 17 comes into contact with the ceramic substrate 15 more than the capillary 11 does. As shown in Figure fs5, the presser rod 17 presses and joins the ceramic substrate 15. Therefore, by applying a load to the presser bar 17, the ceramic substrate 15 is sufficiently held down, and even if the ceramic substrate 15 warps, there is a gap between it and the table 16.
Since no gaps are created and the ceramic substrate 15 does not act as a spring, it does not absorb loads or ultrasonic vibrations, and the metal wires and electrodes are sufficiently bonded to each other. It can prevent sonic vibration and load drop.
ここで、押え棒17の位置は、第4図の第1ポンデイン
グの位置から、第5図のs2ポンディングの位置に、キ
ャピラリ11が移動するような進行方向にあり、押え棒
17はセラミック基板15に対して、キャピラリ11よ
りも近い距離(二あり。Here, the position of the presser bar 17 is in the advancing direction such that the capillary 11 moves from the first pounding position in FIG. 4 to the s2 pounding position in FIG. 15, the distance is closer than the capillary 11 (there are two).
また、押え棒17はセラミック基1i151:対して、
キャビツリ11よりも外側で、かつ、キャピラリ11の
近傍に配置すれば、半導体素子14.或1,1は、他の
ワイアボンディングを傷つけることなく、セラミック基
板15を押えつけることカーできる。In addition, the presser bar 17 has a ceramic base 1i151:
If placed outside the cavity 11 and near the capillary 11, the semiconductor element 14. Alternatively, the wires 1 and 1 can be pressed against the ceramic substrate 15 without damaging other wire bondings.
尚、本発明の実施例は、キャピラリを用すまたサーモン
ニツクワイアボンデイング方式(=つ(、Xて説明した
が、キャピラリの代りにウェッジを用V)だ超音波ワイ
アボンディング方式等、他の方式でも同様の効果が得ら
れることは明らかである。The embodiments of the present invention may also be applied to other methods such as the salmon wire bonding method using a capillary, the ultrasonic wire bonding method, etc. However, it is clear that similar effects can be obtained.
本発明は、以上説明したように、キャピラリ、或いは、
連動してセラミック基板を押え固定する、例えば、押え
棒のような、クランプ機構を有することで、ワイアボン
ディングの接合48頼性および歩留を向上させる効果が
ある。As explained above, the present invention is directed to a capillary or
Providing a clamp mechanism, such as a presser bar, that presses and fixes the ceramic substrate in conjunction with each other has the effect of improving the reliability of the wire bonding bonding 48 and the yield.
第1図は、従来例のサーモソニックワイアボンディング
装置、第2図は従来のサーモソニックワイアポンディン
グ装置におけるキャピラリとトー側面図、第4図及び第
5図は、本発明の一実施例を示す側面図。
1;キャピラリ、 11;キャピラリー、2;金属ワイ
ア、 12;金属ワイア、6;トーチ棒、 14;半導
体素子、
4;半導体素子、 15;セラミック基板、5;セラミ
ック基板、16;テーブル、6;テーブル、 17;押
え棒、
2′;金属ワイアの下端部。
第1図
第2図
第 3 因
第5図FIG. 1 shows a conventional thermosonic wire bonding device, FIG. 2 shows a side view of a capillary and toe in a conventional thermosonic wire bonding device, and FIGS. 4 and 5 show an embodiment of the present invention. Side view. 1; Capillary, 11; Capillary, 2; Metal wire, 12; Metal wire, 6; Torch rod, 14; Semiconductor element, 4; Semiconductor element, 15; Ceramic substrate, 5; Ceramic substrate, 16; Table, 6; Table , 17; presser bar, 2'; lower end of metal wire. Figure 1 Figure 2 Figure 3 Cause Figure 5
Claims (1)
はキャピラリに装着させて、該金属ワイアの下端部を球
状に形成し、前記ウェッジ或いはキャピラリを降下させ
て、この球状の下端部を、セラミック基板の上面に固着
した半導体素子上面の電極に接合させて第1ボンデイン
グを形成させ、次に前記ウェッジ或いは、キャピラリを
金属ワイア上に摺動させて、前記セラミック基板の上面
の所定の電極に位置させ、前記ウエツジ或いは、キャピ
ラリに超音波振動及び荷重を、前記セラミック基板の下
面に固着したテーブルに熱を、それぞれ印加させて、前
記ウェッジ或いは、キャピラリをセラミック基板の上面
の所定の電極礪二熔着接合させて、第2ボンデイングを
形成させるようにするワイアボンディング方法において
、前記ウェッジ、或いは、キャピラリの降下する動作に
連動して、前記セラミック基板を押えて固定させるため
のクランプ機構を、セラミック基板の上面に降下させて
、セラミック基板を固定させることを特徴とするワイア
ボンディング方法。A metal wire with a diameter of about 10 microns is attached to a wedge or a capillary, the lower end of the metal wire is formed into a spherical shape, and the wedge or capillary is lowered to connect the spherical lower end to the upper surface of the ceramic substrate. to form a first bonding to an electrode on the upper surface of the semiconductor element fixed to the ceramic substrate, and then slide the wedge or capillary onto the metal wire to position it at a predetermined electrode on the upper surface of the ceramic substrate; The wedge or capillary is welded to a predetermined electrode on the upper surface of the ceramic substrate by applying ultrasonic vibration and load to the wedge or capillary and applying heat to a table fixed to the lower surface of the ceramic substrate. In the wire bonding method, a clamp mechanism is provided on the upper surface of the ceramic substrate for holding and fixing the ceramic substrate in conjunction with the downward movement of the wedge or the capillary. A wire bonding method characterized by lowering and fixing a ceramic substrate.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59049822A JPS60193350A (en) | 1984-03-15 | 1984-03-15 | Wire bonding |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP59049822A JPS60193350A (en) | 1984-03-15 | 1984-03-15 | Wire bonding |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS60193350A true JPS60193350A (en) | 1985-10-01 |
Family
ID=12841792
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP59049822A Pending JPS60193350A (en) | 1984-03-15 | 1984-03-15 | Wire bonding |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS60193350A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5060841A (en) * | 1985-12-25 | 1991-10-29 | Hitachi, Ltd. | wire bonding method and apparatus and method of producing semiconductor device by use of wire bonding apparatus |
-
1984
- 1984-03-15 JP JP59049822A patent/JPS60193350A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5060841A (en) * | 1985-12-25 | 1991-10-29 | Hitachi, Ltd. | wire bonding method and apparatus and method of producing semiconductor device by use of wire bonding apparatus |
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