JPS5964914A - Channel selecting device - Google Patents

Abstract

PURPOSE:To simplify both channel selecting and channel replacing operations by skipping the position of the read-out tuning data if this data is equal to the channel skipping data. CONSTITUTION:When a position-up key 11 or a position-down key 12 is pushed, the tuning voltage data is read out of a semiconductor memory 3. This tuning voltage is converted into rough and fine control pulses and applied to a pulse superposing circuit MIX for superposition via wave shaping circuits 7 and 9. The superposed pulse output is converted 31 into the DC voltage and applied to an electronic tuner 32. Then a preset channel is received. In this case, if a non- signal or weak signal picture exists, a switch 15 connected to a microcomputer 1 is turned on to set a storage mode. Thus the channel skip data is transferred to the memory 3 to be stored. Then the positions where the skip data are stored are successively skipped.

Description

[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to, for example, a channel selection device for a television receiver.
This invention relates to a channel selection Mffi that improves the operation of placing a predetermined channel (station) at a position for station placement.

[Technical background of the invention]

The method for selecting channels on a television receiver is a rotary set (
There are two main types: mechanical tuners (mechanical tuners) and electronic types (lightning single-tuned tuners) that use variable capacitance diodes in the tuning circuit to electrically select channels. The features of this electronic tuner are that it is easy to adapt to the remote control tuning system that has become rapidly popular in recent years, and that the tuning function that generates the tuning voltage has a wide variety of configurations.

Currently, the tuning function of electronic tuners is classified into three types: potentiometer method, voltage synthesizer method, and 9-frequency synthesizer method.In the potentiometer method, the tuning voltage is set for each channel using a variable resistor, and the channel you want to receive when selecting a station is used. is specified by a predetermined operation, and in the pressure synthesizer method, the tuning voltage is preset digitally without using a potentiometer. Therefore, in the potentiometer method, as the number of channels increases, the number of variable resistors also increases, which poses a problem in arrangement. That's naive. With the voltage synthesizer method, even if the number of channels increases, the tuning voltage is stored electrically, so it does not take up much space, but
There is a problem in that a battery backup or non-volatile memory must be used as a standby memory.

In this way, in the two methods, the number of receiving stations corresponds to the position for the receiving station (corresponding to the variable resistor in the potentiometer method, and the storage area for one station in the memory in the voltage synthesizer method). By selecting a predetermined position, a channel preset for each position is received.

-Also, in the frequency synthesizer method, the receiving frequency needle is determined from the division ratio of the local oscillation frequency, so there is no need to preset the tuning voltage, but recently, direct tuning operation (numeric keypad operation) has been changed to a single action. In order to realize In order to eliminate the trouble of adjusting the difference with the frequency division ratio mentioned above when the frequency division ratio is different from the above frequency division ratio when A method of keeping it is used.

Channel data (same;
The preset method that presets il# i positive data, frequency division ratio specification data, etc.) has the advantage of being able to select the receiving channel (receiving only stations with good reception conditions), and also allows for so-called one-touch channel selection. It is possible. This one-touch tuning is a type of direct tuning, and is much more convenient than direct tuning.

For example, when direct channel selection is to receive the first channel, it requires a two-action operation of pressing the keys in the order of mouth → l on the numeric keypad, whereas +7 y I Sochi channel selection requires the above-mentioned station position. This is because it becomes possible to perform one action by simply pressing the key to select the item. In addition to the above-mentioned method, the R1 channel method also includes a K i1 = clear channel selection operation.

This method selects a station by sequentially increasing or decreasing each station position or reception channel, and has the advantage that it can be selected without looking at the operation panel.

[Missing points in the background technology]

There are two methods when performing a station setting operation in the above-mentioned channel selection device. The first is a method in which the receiver determines whether or not to work while observing the minority status and locates the station, and the second is a method in which the receiver automatically locates the station using a circuit that detects the broadcast signal. In the first method, you preset while checking only the channels that can be well received, so you will not make the mistake of placing the station on a channel with weak JAW waves, but you will have to preset to the best reception point, which is extremely difficult. It is time consuming and troublesome. In the second method, the 9 preset channels are automatically selected, so it is convenient, and the criterion for deciding whether to preset or not depends on the detection sensitivity of the signal detection circuit. If there is a difference between the receiver's judgment criteria and the channel is not well received even with the preset settings, the channel may not be received well.
On the other hand, channels with good reception conditions may not be received.

These problems also occur regionally; for example, in areas where a particular channel has a strong electric field, the detection sensitivity is constant, so weak electric field channels cannot be memorized, and therefore can only be received directly. Ta.

Therefore, since there is no need for a key to erase or change the preset data, conventionally a memory key is provided to be used during preset (also called memory mode). This memory is necessary when resetting previously preset data to another channel data, but is not needed during image reception operation (also called image reception mode), resulting in wasted space.

Furthermore, this memory key cannot compensate for the drawbacks of the second method. In other words, in the sequential channel selection method, there is no function to skip channels with poor reception conditions or positions with no signal where there is no input from a VTR or the like and no station is placed. The disadvantages are that they generate noise when passing through the channels and take a long time to select channels.

[Purpose of the invention]

The present invention has been made in view of the above circumstances, and the present invention has been made in such a way that the channel data corresponding to the tuning voltage or frequency division ratio preset at the station position is sequentially selected by r (by pressing the channel selection key). During operation, depending on the signal status of the station corresponding to the above channel data, it is possible to change the channel data by 1 degree to another channel data, or to rewrite it to data for channel skipping. This selection skips the station position where the channel skip data has been rewritten to shorten the station selection time, and also eliminates the conventional memory and reduces the number of keys, making station positioning operations easier. The purpose is to provide station equipment.

[Summary of the invention]

That is, in the present invention, an area for storing one receiving channel is set as a position for station placement, and tuning data such as tuning voltage data or frequency division ratio setting data is accessed by positioning this area. Provide memory for
The tuning data stored in the storage area of the memory is read out using the tuning keys for sequentially shifting positions in accordance with the position data, and if the read tuning data is channel skip data, This position is skipped and the tuning data stored in the next position is extracted.The conditions for rewriting to the channel skip data correspond to the tuning data at the time of image reception. The mode is manually or automatically switched to the storage mode depending on the signal condition of the station, and in the case of no signal or weak signal, the data for the same town is rewritten to data for channel skipping.

[Embodiment 1 of the Invention] An embodiment of the present invention will be described below based on the drawings. FIG. 1 is a circuit diagram showing a circuit of a channel selection device according to an embodiment of the present invention, and the tuning data is a tuning voltage whose Norms width corresponds to the tuning voltage in the Raisho Shin-Seven Sizer method. This is an example in which data is stored in memory. Also,
This actual example describes a channel selection device for a television receiver, but it can also be used in other receiving devices, and it can also be used to store data for setting a frequency division ratio of 1, such as in a frequency-converging synthesizer method. It is also possible to use it in a tuner device.

First, the configuration of FIG. 1 will be explained. A microcomputer 1 is used as a channel selection controller which is the central part of the apparatus. This microcomputer 1 has external terminals such as a power supply terminal VDD, an input/output port 100, IOl, IO2,
IO3, IO4 and data output ports PWMI, P
It has WM2 etc. The voltage terminal VDD is connected to the external voltage supply terminal 2, and the input/output port IOI is connected to the 4-pit data terminals 01 (φ) to IO) and the data terminal of the semiconductor memory 3 provided externally.

- D3 are connected by an I10 line 4, and the data output ports PWMI and PWM2 are connected to the input section of a second waveform shaping circuit 9 comprising a transistor sheath resistor 8a and a capacitor 8b, respectively.

The converter 1 is configured such that the low power terminals TO:3(B), l03(1) of the lower two bits of the input/output port IO3 supply the external voltage of the supply η1 terminal 2 via the pull-up resistor 13.14. It is also connected to the ground via the sequential position up key 11 and down key 12, both of which have new functions according to the present invention. The microcomputer 1 determines whether or not the up key 11 and the down key L2 are pressed manually.

Further, the microcomputer 1 has the input/output board I
A switch 15 is interposed between the y bit terminal I04ω) of O4 and ground for setting whether the image is being received or channel storage adjustment is being performed (storage mode). When this switch 15 is open, 1iiJ terminal I04
(IJ) is applied with a voltage at the power supply end 2 determined by a resistor 16, and in the image receiving mode, the switch 15 is opened, and in the mode 1., the same switch 15 is It is something that is opened.
Data is exchanged between the semiconductor memory 3 and the microcomputer 1 through a line 4a connecting the load terminal LD and the input/output port l00(φ).

On the other hand, the tuning and pressure data taken out from the data output terminals PWMI and PWM2 are outputted as pulse width modulation molding corresponding to a tuning voltage that can be converted into a DC voltage by a filter means to be described later, and the terminal PWMI is a so-called rough The terminal PWM2 outputs fine-tuning pulse data. These coarse adjustment data and fine adjustment data are passed through the first and second waveform shaping circuits 7 and 9 to a first operational amplifier 17 and a second operational amplifier 18, respectively.
is applied to each non-inverting input terminal of . This 1. The first and second operational amplifiers 17 and 18 first amplify the fine-tuning pulse in the first operational amplifier 17, and then apply the amplified output to the second operational amplifier 18 together with the coarse-tuning pulse via the resistor 17F. , constitutes an N pre-circuit MIX for coarse adjustment pulses and fine adjustment pulses. however.

做λ1. The L1 pulse is applied to the resistor 19. between the transistor 8 and the first operational amplifier 17. It is superimposed via a buffer circuit consisting of a diode and a 20° capacitor 21. Talent, number one. The second operational amplifiers 17 and 18 each have one power supply terminal connected to the power supply terminal 22 and grounded.
Further, the power supply terminal 22 supplies lightning source voltage to the transistor 8 as well as to the transistors 5 and 6 through resistors 23 and 24, respectively.

MR circuit Δ where fine adjustment and coarse adjustment pulses are superimposed as described above
'The output of IIX is resistor 25, capacitor 26, resistor 27, capacitor 28. as well as resistor 29 and capacitor 3
Each set of 0 is converted into the same 614 DC voltage by a low-pass filter 31 connected in a ladder shape, and applied to the variable capacitance diode 33 forming the tuning circuit 41' of the electronic tuner 32. It has become.

An example of the microcomputer 1 used in this actual Mli f+lJ will be described below.

FIG. 2 shows a block diagram of the microcomputer 1.

This microcomputer 1 is a so-called one-chip microcomputer (h'), and its internal configuration is shown in conceptual blocks. This chip has input/output port 10
0 to IO4, output ports OTO to 0T31 oscillator connection terminal XIN, basic clock output terminal X0UT, subroutine ff-up terminal R8T, interrupt signal terminal INT,
It has a memory check terminal TEST as an external terminal, and the internal system configuration includes an arithmetic circuit ALU, a program memory ROM, and a data memory RAM.
Furthermore, a source address register SA for specifying a source register that sends data to be operated on to the arithmetic circuit ALU %same<1ffit specifies a location (hereinafter referred to as destination register) where the arithmetic results of the arithmetic circuit ALU are to be stored. No destination address register DA'f.

The microcomputer 1 still has a program counter PC,!, which controls the execution address of the program in the program memory ROIVI. :, this program counter 1) has a built-in stack 5TK below register c for storing the contents of 1)C, and a data counter 1)C for reading fixed data from the program memory ROM. Furthermore, the front 5 self-dake memory RAM stores its address in the RAM address register (H register HR%).
L+/Sister LR) It has the function specified by K, and can also be specified by memory address register MA. Furthermore, there is a status register SR that holds data specified in the processing process of the microcomputer 1, and the contents of the status register SR are a carry flag C11i+, a contingency flag F, an interrupt mask flag (IM), and a general-purpose flag G. Consists of 4
It is held in a bit register. In addition, the microcomputer 1 has a built-in oscillation circuit O8C, and a basic clock of a predetermined frequency can be obtained by simply connecting an ml oscillator. It also includes a timing generator TO that generates various timing signals in synchronization with the oscillation circuit O8C. Furthermore, the accumulator AC (!
: An instruction register IR is also built in to store instructions read from the address of the program memory OM specified by the program counter PC.

Here, the channel selection data for one station stored in the data memory RAM will be explained. The following table shows data memory R
This is a memory map showing the data contents stored in the AM θ page.

(Leaving space below) In this table, one page of the data memory IJ RAM consists of 167-words with 4 bits, and the page is addressed by the H register HR, and the words within the page are addressed by the L register LR. . Bit 0 of the 0th word stores a channel selection mode flag, and bit 1K of the same word stores a position up/down flag. This channel selection mode flag is set to a reset state at the time of initialization (a state in which manual input of up/down keys 11 and 12 can be accepted), and the selection mode is set to a set state before entering the traversing operation. This is the reference signal for station mode. Still, this flag is stored in bit G4 of the status register SR, and a predetermined jump instruction is executed.

Next, 0 pages, 0 words, and 1 bits of data memory RAM (hereinafter RAM [0, 0] (expressed as 11))
Up/down flags r and l are stored at the address. This up/down flag is a reference signal for whether the A/' key 11 or the DOWN key 12 is being pressed. In the quaternary channel selection method, the presence or absence of key manual input may be configured to correspond to the set state or unset state of the flag. Further, this flag is stored in bit F of the status register SI, so that a predetermined branch instruction is executed.

The data memory RAM also has 4-bit capacity position data stored at addresses AM[0 and 13. Depending on the position data of this content (d), it is possible to locate reception channels at a maximum of 16 locations. This position data is merged with the tuning voltage data and stored in the same page, for example in RAM.
Position data at address [0, 1] ('tX) makes it possible to access the tuning voltage data stored in a predetermined storage area of the semiconductor memory 3 corresponding to this position data. In this case, the above-mentioned frost pressure data is from 2nd word address to 5th word address on the same page.
It is stored at a word address and has a capacity of 16 bits. The 16-bit contents are composed of data necessary for switching the output voltage and data sufficient to cover the variable range of the training voltage. In addition, the next position data is written at address RAh=IC0, 61E, and the training voltage data of the next channel corresponding to this position data is stored in 4-word distribution. Therefore, data for three channels can be stored in one page.

Next, please refer to Figure 1 for the channel selection operation procedure according to the present invention.
'l+'l After simply explaining, the movement of data actually exchanged within the microcomputer 1 on the circuit will be explained in the third section.
The process will be explained in detail in correspondence with the above procedure with reference to the flowchart shown in the figure.

First, the semiconductor memory 3 stores the training voltage applied to the electronic tuner 32 as tuning voltage data converted into a digital A signal. In this case, the semiconductor memory 3 has a storage area corresponding to the number of reception channels, and this storage area can be designated by the position data from the data memo IJ RAM, which is derived from the input/output capacitor (input/output capo), and is stored in this area. Tuning voltage data 75; accessed.

In the above description, it is assumed that the channel selection operation knob is provided with at least an up key 11 and a down key 12, which sequentially change positions to adjacent positions. However, in some cases, a position designation key corresponding to the number of reception channels or a numeric keypad for direct channel selection using this position designation key in combination may be provided.

First, when the position up key 11, which corresponds to the channel selection key according to the present invention, is pressed, the 0 bit terminal I03 (0
) becomes the key human power of logic ゛0〃.

A certain channel is received by this key human power, and the image is a normal image, or a no signal image (the image when the empty position is selected) or a weak signal image (an antenna human power lightning, receiving a weak channel in the field) image). This allows the operator to receive the channel as is if the image is normal. Read from the semiconductor memory 3 in this case h fc same 111? The lf pressure data is converted into a coarse pulse, a fine pulse, and a fine pulse with a pulse width corresponding to the tuning voltage in the microcomputer 1, and each coarse pulse and pulse are output from the microcomputer 1. The signals are output from terminals PWM1 and PWM2, respectively.

Furthermore, the rough adjustment pulse is waveform-shaped by the first e-shaped shaping circuit 7, and then the pulse width superimposition circuit il! Applied to i5MIX. Further, the fine adjustment pulse is waveform-shaped by the second waveform shaping circuit 9 and applied to the pulse width superimposing circuit MIX. This superimposition circuit MIX current-superimposes the coarse adjustment pulse and the fine adjustment pulse, and sends the superimposed pulse output to the filter circuit 31 by 4 mf. The filter circuit 31 outputs the output of the superimposing circuit MIX converted into a DC voltage. This DC voltage becomes the tuning voltage of the electronic tuner 32 and is applied to the variable capacitance diode 33, and the preset channel stored corresponding to the position selected by the up key 11 or the down key 12 is received.

In addition, in the case of no signal or weak signal image, turn on the switch 15 connected to the input/output port IO4/0 bit terminal of the microcomputer and record 1. Set to mode. When this switch 15 is pressed, the microcomputer transfers, for example, channel skip data in which all 16 pits are ``qXXO'' from the data memory IJ RAM to the semiconductor memory 3. Lesson 1: The channel skip data will be recorded in the corresponding storage area of the semiconductor memory 3 where the pressure data was stored.Then, this channel skip data will be recorded in the memory area 1.0. The position 7 will be skipped when Jim misses the next game.

The above operation will be explained in detail by referring to the flowchart in Figure 3 and then explaining the i4K system in detail.

The program ROMK of the microcomputer stores instructions for executing the third and first flowcharts.
Program counter P that changes in synchronization with the basic clock
The instruction is read by the value of C. First, an execution address ADI for initialization is set in the program counter PC, and initial values of the data memory RAM, etc. are set. At this time, the RAM of the data memory RAM
(0, O) A channel selection mode flag of logic "0" is set at address (0) (see Figure 2).Next execution address AD
2, the content of the channel selection mode flag is 110” or XX11
If the 1st channel selection mode flag is NO, the program counter PC becomes the execution address of AD3. This command specifies the input/output port IO3 as the source address register, and determines whether the up key 11 has been pressed by determining the lower 2 bits of the input/output port IO3. It is determined.

If the up key 11 is not pressed, a down key manpower check N3 is performed to determine the key power of the down key 12 at execution address AD4.

Both station selection keys 11 and 12 are not pressed (NO
), branch 35 is selected and program counter PC returns to AD2. The microcomputer 1 repeatedly performs the key manual check operations AD2 to AD4 described above.

During execution of the above program, if the up key 11 or the down key 12 is pressed, data of logic "1" is loaded into the F bit of the status register SR. This F bit data is loaded. Then, the content of the F bit of the status register SR is determined by the subsequent branch command, and if the up key 11 is pressed, the branch is to branch 36, and if the down key 12 is pressed, the jump command N4 is used to jump to AD22. Jump to.

The program after branch 36 determines the key power of the up key 11 and sets the program counter PC to AI)9.
In AD9, the H register f (H is loaded with immediate data rlJ, L registers I and R are loaded with immediate data rlOJ, and the data memory RAM RAM [0, 0) specified by these registers is loaded.
(Sets the position up/down flag stored at address υ to logic ゝも1' N5. When this up/down flag is set, the program counter PC
IO, and image reception/storage mode determination N6 is performed.

If the switch 15 shown in FIG. 1 is closed at the time of this determination, it is the storage mode, and if it is open, it is the image reception mode.
) Calculates the state of switch 15 input to l040 pit φ, and stores the result in bit F of status register SR.
Load it into . That is, in the storage mode, "1" is set in the hit F of the status register SR.

When in the image reception mode, the bit F is reset to 10". After this, the flag of bit F of the AfJ status register SR is determined by a branch instruction, and when in the storage mode, the program counter PC is set to AL)11. and branches to branch 37 in the image reception mode.

Here, assuming that the switch 15 is set to the storage mode which is closed, the program counter PC is
Increment to ll and perform memory processing N7. This memory processing N7.

The same-r stored per channel of the semiconductor memory 3
, + Voltage data is accessed, and its circuit operation is performed manually by pressing the up key 11. The position data at the RAM address [φ, 1] with (word designation) ゝゝ1〃 is read from the data memory RAM and further transferred to the input/output port ■01.

The address of the semiconductor memory 3 is accessed using this transferred position data. This accessed /ζ address of the semiconductor memory 3 is assigned to the RAM of the data memory RAM.
Tuning voltage data at addresses M[0,2] to [0,5) is transferred. As a result, the same Md tn:pressure data of the position data corresponding to the key manual force of the up key 11 is stored in the half-N11 body memory 3. Therefore, in the case of nAM[0,
2] to [0, 5] addresses (not corresponding to the position data at the time of Briscent), or channel skip data where the contents of '16 bits are all 10', for example. You can also change 1ml.
Becomes J Noh.

In the next AD12, by pressing the up key 11, the position data at the RAM address [φ, 1] and the imitate data "1" are added (4) to the arithmetic circuit ALU.
The results are stored in RAIVI of data memory RAM.
Transfer to CO, address 11. This process is position data increment N8. By incrementing this position data, the original function of the up key 11 (to advance the contents of the position data by the number of positions) is executed, and the program counter PC is set to AD13. The address of AD13 is used to determine the image reception/storage mode determination N9 from the program editor (OM).The circuit operation is controlled by the source register S.
Specify Ota Kaboto I04 and its IO4(φ)
If the terminal is "1", reset the bit F of the status register SR. If the terminal is "φ", reset the bit F of the status register SR.
Set to . As a result, if the content of bit F is 11'', it is determined that the storage mode is in effect, the content of program counter PC is set to AD17, and the content of pit F is ゝゝφ〃. If so, it is determined that the image receiving mode is in effect, and the contents of the program counter PC can be set to AD14.

Here, if the operator does not turn off the switch 15, it is determined that the Kiichi-ni mode is in effect, so the program counter PC becomes AD17, and the channel selection mode flag set 1<
Do 1°. This is to set the channel selection mode flag stored in bit 0 of the data memory RAM to "1". That vt, hD18 jump instruction N1
．． 1 address AD2 to the program counter PC by
Return to In this AD2, the program counter PC is set to AD6 due to the tuning mode flag set to "1" in the previous process since the tuning mode flag determination N1 is not performed. This A
In D G, data memory RAM RAM [0, 1E
Pressure data of the same precept 11 stored at the access address of the semiconductor memory 3 accessed by the position data of the address is output to the data output terminals PWMI and PWM2. This process is the channel selection process N1 of AD6. Then, the channel selection mode flag stored in the RAM (φ) bit of the data memory RAM is reset (N13L), and then jump command N14 of AD2 is executed to jump to AD2.

Next, the operation in the image reception mode in which the switch 15 is open will be described. In this reception fh,l mode, the program counter PC branches to branch 37 and executes the address of AD12, except that ADIO determination N6 is performed by setting the up/down flag N5. This AD12 decrements the position data N8 and moves on to the next 10'1'' constant N. This judgment is N, then the input/output capo) Depending on the contents of the bit φ terminal of IO2, the reception 1, 1? Set the mode (flJ) and reset the status register (SR). By resetting bit F of status register SR, program counter PC
]5.

The above memo 'J Fr7'l: Extraction processing N15 performs the opposite operation to the memory processing N7 of execution address ADII. That is, by the position data increment N8, the position data is stored in the RAM of the data memory RAM.
[(J, 1) The data stored in the back is read out and transferred to the input/output capacitor), and furthermore, the address of the semiconductor memory 3 is specified and the tuning voltage data written in that address is read out. Transfer to addresses AM[0,2] to [0,5] of data memory 1AfvI.

This transferred tuning voltage data is the same kL' of AD15.
l 'kt I''E is determined by the data publication determination a.

This -1'1j constant is all 1 in the memory processing N7.
0” and/or data for position skip, or
This is to judge whether it is normal tuning voltage data that includes even a small amount of logic ゝもも1.
Set it to D17 and set the channel selection mode flag 7 soto N1o → jump command N,! →Tuning mode flag determination Nl→Tuning selection processing N12→... The tuning voltage data determined is the data output terminal PWlull.

2wM2. In addition, if it is determined that the data is for channel skip (all SS o//), the program counter Pc becomes AD16, and the position up/down flag stored in the data memory RAM [0, 0) (11) is determined. Perform N17.

The circuit operation of this judgment N17 is to specify the address of the data memory RAM (7) RAM CO, O''J in the source register SR, and if the content of bit 1 is ``1'', set ``o'' to the status. Reset bit F of register SR, and if ((0//), set 51" to bit F of the same status register SR. This judgment N+7
This is because, as will be described later, the determination of the image reception/storage mode when the down key 12 is pressed and the same determination when the up key 11 is pressed are the same on the flowchart.

Now, when the d-up key 11 is pressed, the up-down flag judgment Nty is up, and the program counter PC jumps to AD12 N1g.

Here, the position data is incremented again, and 6 ic of the 81st IY pressure depletion is read out from the semiconductor memory 3 accessed by the next position data. This same training voltage data (lj) and data judgment N16 are repeated, and this subroutine (AD13 to AD16) is repeated until the data of the weak electric field channel or empty position is obtained.This operation This realizes the channel skip function.

Next, the operation when the down key 12 is pressed will be explained. If there is a key force on the down key 12, the jump command N4 of the program counter PcdAD5 will cause
Set to AD22. This AD address t”1,
Reset the up/down flag N1s. The operation in this case is similar to that of the up/down flag set N5. A branch instruction by resetting this flag causes
An image reception/storage mode determination N20 is performed, and if storage is a mote, memory processing N21 of AD24 is performed, and if it is an image reception mode, branching to branch 38 and AD25c7) position data decrement N2□ is performed. In order for the decremented position data of Jin to read out tuning voltage data corresponding to this data from the semiconductor memory 3, the program counter PC performs a jump N23 by position increment processing N22 (& AD26).
L, set to AD13. The processing after AD13 is to perform image reception/storage mode determination N, then read memory N15→tuning voltage deterioration determination N1. →Up/down flags are executed in the order of 5ZN17. This judgment N17
In.

If the tuning voltage data is all 11'', it is determined to be down and branches to branch 39, where the AD25 position data decrement N22 is executed again.This subroutine (AD25→AD26MAD13→AD16) receives the normal signal. It is repeated until it is done.

Through the above series of processing, skipping of positions where empty channels or weak signal channels are preset,
Data can be loaded into the semiconductor memory 3 using the same keys, that is, the up key 11 and the down key 12.

In addition, switching between the image reception mode and the storage mode of the switch 15 is as follows.
11'4 to be turned on and off by the signal detection circuit.
It is possible to accomplish something.

〔Effect of the invention〕

As described above, according to the present invention, the channel placed at the position for station placement may be affected by weak electric current, interference in the field, cheering, etc.
It has a memo 1j-processing function that rewrites data related to channel reception into channel skip data, and has the effect that the position where the channel is preset can be skipped based on the judgment result of this rewritten data. It has the advantage of being very easy to perform channel selection operations and H station placement operations.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing the channel selection fold tq of the present invention, and FIG. 21S2 is a conceptual block diagram of the internal configuration when a 1-chip microcomputer is used as the channel selection controller used in the channel selection device of the present invention. FIG. 3 is a flowchart showing a flowchart of channel selection and station placement operations that can be performed according to the present invention. 1...Microcomputer, IOI~IO4...
Input/output hold, PWMI, PWM2...data output terminal, 3...semiconductor memory, 4...
I10 line, 7.9... Waveform shaping circuit, 11.
...Up key. 12... Down key, MIX... superimposition circuit,
3.1...Low pass filter, 32...Electronic tuner, N7...Memory processing, N1. ... Tuning voltage data judgment.

Claims (1)

[Scope of Claims] A memory in which position data designated by a channel selection key is read out by a variable data memory RAM, and tuning data corresponding to this position data is stored in a predetermined storage area based on the read position data. A mode setting means for switching and setting whether or not to rewrite the contents of the memory; When the means is set to the memory storage and exchange mode, the variable data memo I
writing means for setting predetermined designated data in the J RAM, reading out the designated data and writing it into the memory according to position data designated by the channel selection key; and writing means for setting the designated data in the memory by the writing means; and a data discrimination means for discriminating the content of the data, and when the discriminated data is specific data for position skipping, the storage area of the memory in which the specific data is stored is skipped and shifted to the next position. A channel selection device characterized by: